This patchset enables basic support for RoseapplePi, relying exclusively
on the existing infrastructure for the Actions Semi Sxx SoCs (thank you
Andreas and Manni for making this possible).
The SBC is powered by the Actions Semi S500 SoC and comes with 2GB RAM,
uSD slot and optional eMMC storage. For more details, please check:
http://roseapplepi.org/index.php/spec/
The upcoming patches will improve this initial support by adding the
missing bits and pieces to the S500 clock management unit, which is a
prerequisite for providing an S500 pinctrl and gpio driver, in order to
eventually enable access to additional functionality like I2C and MMC.
Thanks and regards,
Cristian Ciocaltea
Cristian Ciocaltea (4):
arm: dts: owl-s500: Fix incorrect PPI interrupt specifiers
dt-bindings: Add vendor prefix for RoseapplePi.org
dt-bindings: arm: actions: Document RoseapplePi
arm: dts: owl-s500: Add RoseapplePi
.../devicetree/bindings/arm/actions.yaml | 1 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 +++++++++++++++++++
arch/arm/boot/dts/owl-s500.dtsi | 6 +--
5 files changed, 54 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
--
2.27.0
Add devicetree vendor prefix for RoseapplePi.org Foundation.
Website: http://roseapplepi.org/
Signed-off-by: Cristian Ciocaltea <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index d3891386d671..e58dbe719fcd 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -864,6 +864,8 @@ patternProperties:
description: Ronbo Electronics
"^roofull,.*":
description: Shenzhen Roofull Technology Co, Ltd
+ "^roseapplepi,.*":
+ description: RoseapplePi.org
"^samsung,.*":
description: Samsung Semiconductor
"^samtec,.*":
--
2.27.0
Add a Device Tree for the RoseapplePi SBC.
Signed-off-by: Cristian Ciocaltea <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/owl-s500-roseapplepi.dts | 47 ++++++++++++++++++++++
2 files changed, 48 insertions(+)
create mode 100644 arch/arm/boot/dts/owl-s500-roseapplepi.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e8dd99201397..d0712e7275da 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -856,6 +856,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb \
+ owl-s500-roseapplepi.dtb \
owl-s500-sparky.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
new file mode 100644
index 000000000000..c61fbaa3821e
--- /dev/null
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Roseapple Pi
+ *
+ * Copyright (c) 2020 Cristian Ciocaltea <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "owl-s500.dtsi"
+
+/ {
+ compatible = "roseapplepi,roseapplepi", "actions,s500";
+ model = "Roseapple Pi";
+
+ aliases {
+ serial2 = &uart2;
+ };
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x80000000>; /* 2GB */
+ };
+
+ uart2_clk: uart2-clk {
+ compatible = "fixed-clock";
+ clock-frequency = <921600>;
+ #clock-cells = <0>;
+ };
+};
+
+&twd_timer {
+ status = "okay";
+};
+
+&timer {
+ clocks = <&hosc>;
+};
+
+&uart2 {
+ status = "okay";
+ clocks = <&uart2_clk>;
+};
--
2.27.0
The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
Signed-off-by: Cristian Ciocaltea <[email protected]>
---
arch/arm/boot/dts/owl-s500.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 5ceb6cc4451d..1dbe4e8b38ac 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -84,21 +84,21 @@ scu: scu@b0020000 {
global_timer: timer@b0020200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0xb0020200 0x100>;
- interrupts = <GIC_PPI 0 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
twd_timer: timer@b0020600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0xb0020600 0x20>;
- interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
twd_wdt: wdt@b0020620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0xb0020620 0xe0>;
- interrupts = <GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
+ interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
status = "disabled";
};
--
2.27.0
Define compatible strings for RoseapplePi, a SBC manufactured
in Taiwan, based on Actions Semi S500 reference design.
Signed-off-by: Cristian Ciocaltea <[email protected]>
---
Documentation/devicetree/bindings/arm/actions.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml
index ace3fdaa8396..787cd1b4f26c 100644
--- a/Documentation/devicetree/bindings/arm/actions.yaml
+++ b/Documentation/devicetree/bindings/arm/actions.yaml
@@ -18,6 +18,7 @@ properties:
- enum:
- allo,sparky # Allo.com Sparky
- cubietech,cubieboard6 # Cubietech CubieBoard6
+ - roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi
- const: actions,s500
- items:
- enum:
--
2.27.0
On Mon, 15 Jun 2020 03:19:10 +0300, Cristian Ciocaltea wrote:
> Define compatible strings for RoseapplePi, a SBC manufactured
> in Taiwan, based on Actions Semi S500 reference design.
>
> Signed-off-by: Cristian Ciocaltea <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/actions.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring <[email protected]>
On Mon, 15 Jun 2020 03:19:09 +0300, Cristian Ciocaltea wrote:
> Add devicetree vendor prefix for RoseapplePi.org Foundation.
> Website: http://roseapplepi.org/
>
> Signed-off-by: Cristian Ciocaltea <[email protected]>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>
>>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
> The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
> Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
> Signed-off-by: Cristian Ciocaltea <[email protected]>
Reviewed-by: Peter Korsgaard <[email protected]>
--
Bye, Peter Korsgaard
>>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
> Add a Device Tree for the RoseapplePi SBC.
> Signed-off-by: Cristian Ciocaltea <[email protected]>
Reviewed-by: Peter Korsgaard <[email protected]>
On a related note: There is now an owl-mmc driver for the s900. From a
quick look at the datasheet it looks compatible with the controller on
the s500. Did you have a look at hooking that up?
--
Bye, Peter Korsgaard
On Thu, Aug 27, 2020 at 08:29:06AM +0200, Peter Korsgaard wrote:
> >>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
>
> > The PPI interrupts for cortex-a9 were incorrectly specified, fix them.
> > Fixes: fdfe7f4f9d85 ("ARM: dts: Add Actions Semi S500 and LeMaker Guitar")
> > Signed-off-by: Cristian Ciocaltea <[email protected]>
>
> Reviewed-by: Peter Korsgaard <[email protected]>
>
> --
> Bye, Peter Korsgaard
Thanks,
Cristi
Hi Peter,
Thanks for the review!
On Thu, Aug 27, 2020 at 08:44:40AM +0200, Peter Korsgaard wrote:
> >>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
>
> > Add a Device Tree for the RoseapplePi SBC.
> > Signed-off-by: Cristian Ciocaltea <[email protected]>
>
> Reviewed-by: Peter Korsgaard <[email protected]>
>
> On a related note: There is now an owl-mmc driver for the s900. From a
> quick look at the datasheet it looks compatible with the controller on
> the s500. Did you have a look at hooking that up?
Yes, please see:
https://lore.kernel.org/lkml/[email protected]/
The clock related patches have been already applied to v5.9 and
hopefully the pinctrl driver will follow in v5.10.
> --
> Bye, Peter Korsgaard
Regards,
Cristi
>>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
> Hi Peter,
> Thanks for the review!
> On Thu, Aug 27, 2020 at 08:44:40AM +0200, Peter Korsgaard wrote:
>> >>>>> "Cristian" == Cristian Ciocaltea <[email protected]> writes:
>>
>> > Add a Device Tree for the RoseapplePi SBC.
>> > Signed-off-by: Cristian Ciocaltea <[email protected]>
>>
>> Reviewed-by: Peter Korsgaard <[email protected]>
>>
>> On a related note: There is now an owl-mmc driver for the s900. From a
>> quick look at the datasheet it looks compatible with the controller on
>> the s500. Did you have a look at hooking that up?
> Yes, please see:
> https://lore.kernel.org/lkml/[email protected]/
> The clock related patches have been already applied to v5.9 and
> hopefully the pinctrl driver will follow in v5.10.
Cool, I must have missed that series Great, thanks!
--
Bye, Peter Korsgaard