Hi All,
This patch series adds FCPF, FCPV and VSP nodes to r8a774e1
SoC dtsi. Patches apply on top of series [1].
[1] https://patchwork.kernel.org/project/linux-renesas-soc/
list/?series=319563
Cheers,
Prabhakar
Marian-Cristian Rotariu (2):
arm64: dts: renesas: r8a774e1: Add FCPF and FCPV instances
arm64: dts: renesas: r8a774e1: Add VSP instances
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 130 ++++++++++++++++++++++
1 file changed, 130 insertions(+)
--
2.17.1
From: Marian-Cristian Rotariu <[email protected]>
Add FCPF and FCPV instances to the r8a774e1 dtsi.
Signed-off-by: Marian-Cristian Rotariu <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 64 +++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index d08a1385dc27..1954a07f3e85 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -2374,6 +2374,70 @@
status = "disabled";
};
+ fcpf0: fcp@fe950000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 615>;
+ };
+
+ fcpf1: fcp@fe951000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe951000 0 0x200>;
+ clocks = <&cpg CPG_MOD 614>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 614>;
+ };
+
+ fcpvb0: fcp@fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 607>;
+ };
+
+ fcpvb1: fcp@fe92f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe92f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 606>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 606>;
+ };
+
+ fcpvi0: fcp@fe9af000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 611>;
+ };
+
+ fcpvi1: fcp@fe9bf000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9bf000 0 0x200>;
+ clocks = <&cpg CPG_MOD 610>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 610>;
+ };
+
+ fcpvd0: fcp@fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ };
+
+ fcpvd1: fcp@fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ };
+
csi20: csi2@fea80000 {
compatible = "renesas,r8a774e1-csi2";
reg = <0 0xfea80000 0 0x10000>;
--
2.17.1
From: Marian-Cristian Rotariu <[email protected]>
The RZ/G2H (R8A774E1) has 6 VSP instances.
Based on the work done for r8a7795 SoC.
Signed-off-by: Marian-Cristian Rotariu <[email protected]>
Signed-off-by: Lad Prabhakar <[email protected]>
---
arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 66 +++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
index 1954a07f3e85..8f762bd2c9aa 100644
--- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
@@ -2374,6 +2374,72 @@
status = "disabled";
};
+ vspbc: vsp@fe920000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 624>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 624>;
+
+ renesas,fcp = <&fcpvb1>;
+ };
+
+ vspbd: vsp@fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb1>;
+ };
+
+ vspd0: vsp@fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x5000>;
+ interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+ resets = <&cpg 623>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
+ vspd1: vsp@fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x5000>;
+ interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 622>;
+ power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+ resets = <&cpg 622>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
+ vspi0: vsp@fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
+ };
+
+ vspi1: vsp@fe9b0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9b0000 0 0x8000>;
+ interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 630>;
+ power-domains = <&sysc R8A774E1_PD_A3VP>;
+ resets = <&cpg 630>;
+
+ renesas,fcp = <&fcpvi1>;
+ };
+
fcpf0: fcp@fe950000 {
compatible = "renesas,fcpf";
reg = <0 0xfe950000 0 0x200>;
--
2.17.1
Hi Prabhakar,
On Mon, Aug 10, 2020 at 11:22 AM Lad Prabhakar
<[email protected]> wrote:
> From: Marian-Cristian Rotariu <[email protected]>
>
> The RZ/G2H (R8A774E1) has 6 VSP instances.
>
> Based on the work done for r8a7795 SoC.
>
> Signed-off-by: Marian-Cristian Rotariu <[email protected]>
> Signed-off-by: Lad Prabhakar <[email protected]>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> @@ -2374,6 +2374,72 @@
> status = "disabled";
> };
>
> + vspbc: vsp@fe920000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfe920000 0 0x8000>;
> + interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 624>;
> + power-domains = <&sysc R8A774E1_PD_A3VP>;
> + resets = <&cpg 624>;
> +
> + renesas,fcp = <&fcpvb1>;
> + };
> +
> + vspbd: vsp@fe960000 {
> + compatible = "renesas,vsp2";
> + reg = <0 0xfe960000 0 0x8000>;
> + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 626>;
> + power-domains = <&sysc R8A774E1_PD_A3VP>;
> + resets = <&cpg 626>;
> +
> + renesas,fcp = <&fcpvb1>;
According to "FCPVB0 (for VSPBD): H' FE96_F000", this should be
renesas,fcp = <&fcpvb0>;
? If you agree, I can fix that while applying.
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Hi Geert,
Thank you for the review.
On Mon, Aug 10, 2020 at 11:29 AM Geert Uytterhoeven
<[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Mon, Aug 10, 2020 at 11:22 AM Lad Prabhakar
> <[email protected]> wrote:
> > From: Marian-Cristian Rotariu <[email protected]>
> >
> > The RZ/G2H (R8A774E1) has 6 VSP instances.
> >
> > Based on the work done for r8a7795 SoC.
> >
> > Signed-off-by: Marian-Cristian Rotariu <[email protected]>
> > Signed-off-by: Lad Prabhakar <[email protected]>
>
> Thanks for your patch!
>
> > --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi
> > @@ -2374,6 +2374,72 @@
> > status = "disabled";
> > };
> >
> > + vspbc: vsp@fe920000 {
> > + compatible = "renesas,vsp2";
> > + reg = <0 0xfe920000 0 0x8000>;
> > + interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 624>;
> > + power-domains = <&sysc R8A774E1_PD_A3VP>;
> > + resets = <&cpg 624>;
> > +
> > + renesas,fcp = <&fcpvb1>;
> > + };
> > +
> > + vspbd: vsp@fe960000 {
> > + compatible = "renesas,vsp2";
> > + reg = <0 0xfe960000 0 0x8000>;
> > + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&cpg CPG_MOD 626>;
> > + power-domains = <&sysc R8A774E1_PD_A3VP>;
> > + resets = <&cpg 626>;
> > +
> > + renesas,fcp = <&fcpvb1>;
>
> According to "FCPVB0 (for VSPBD): H' FE96_F000", this should be
>
> renesas,fcp = <&fcpvb0>;
>
> ? If you agree, I can fix that while applying.
>
Agreed should be fcpvb0, thank you for taking care of it.
Cheers,
Prabhakar
> Reviewed-by: Geert Uytterhoeven <[email protected]>
> i.e. will queue in renesas-devel for v5.10.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
On Mon, Aug 10, 2020 at 11:22 AM Lad Prabhakar
<[email protected]> wrote:
> From: Marian-Cristian Rotariu <[email protected]>
>
> Add FCPF and FCPV instances to the r8a774e1 dtsi.
>
> Signed-off-by: Marian-Cristian Rotariu <[email protected]>
> Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.10.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds