LinuxLists.cc - [PATCH 00/13] iMX 8 - Another round of cleanups

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Subject: [PATCH 01/13] dt-bindings: power: fsl,imx-gpcv2: Document interrupt controller properties

The i.MX General Power Controller v2 is also an interrupt controller so
document additional properties to fix dtbs_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
'#interrupt-cells', 'interrupt-controller' do not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
index bde09a0b2da3..a96e6dbf1858 100644
--- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
+++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
@@ -33,6 +33,10 @@ properties:
interrupts:
maxItems: 1

+ interrupt-controller: true
+ '#interrupt-cells':
+ const: 3
+
pgc:
type: object
description: list of power domains provided by this controller.
--
2.17.1

2020-09-04 14:55:06

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Subject: [PATCH 02/13] dt-bindings: display: bridge: nwl-dsi: Add common properties

Add common properties appearing in DTSes (assigned-clocks and others) to
fix dtbs_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: mipi-dsi@30a00000:
'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: '^panel@[0-9]+$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
index 04099f5bea3f..b8ba6eb482a1 100644
--- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml
@@ -30,6 +30,10 @@ properties:
'#size-cells':
const: 0

+ assigned-clock-parents: true
+ assigned-clock-rates: true
+ assigned-clocks: true
+
clocks:
items:
- description: DSI core clock
--
2.17.1

2020-09-04 14:55:22

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Subject: [PATCH 04/13] dt-bindings: gpu: vivante,gc: Add common properties

Add common properties appearing in DTSes (cooling-cells, assigned-clocks
and others) to fix dtbs_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpu@38000000:
'#cooling-cells', 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
index 4843df1ddbb6..67b71cad7b3b 100644
--- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
+++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
@@ -21,6 +21,13 @@ properties:
interrupts:
maxItems: 1

+ '#cooling-cells':
+ const: 2
+
+ assigned-clock-parents: true
+ assigned-clock-rates: true
+ assigned-clocks: true
+
clocks:
items:
- description: AXI/master interface clock
--
2.17.1

2020-09-04 14:55:35

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Subject: [PATCH 05/13] dt-bindings: gpu: vivante,gc: Remove trailing whitespace

Remove whitespace at the end of line.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
index 67b71cad7b3b..3ed172629974 100644
--- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
+++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
@@ -33,7 +33,7 @@ properties:
- description: AXI/master interface clock
- description: GPU core clock
- description: Shader clock (only required if GPU has feature PIPE_3D)
- - description: AHB/slave interface clock (only required if GPU can gate
+ - description: AHB/slave interface clock (only required if GPU can gate
slave interface independently)
minItems: 1
maxItems: 4
--
2.17.1

2020-09-04 14:55:37

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Subject: [PATCH 06/13] dt-bindings: mfd: rohm,bd71837-pmic: Add common properties

Add common properties appearing in DTSes (clock-names,
clock-output-names) to fix dtbs_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml:
pmic@4b: 'clock-names', 'clock-output-names', do not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/mfd/rohm,bd71837-pmic.yaml | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
index 65018a019e1d..ecce0d5e3a95 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
@@ -32,9 +32,15 @@ properties:
clocks:
maxItems: 1

+ clock-names:
+ maxItems: 1
+
"#clock-cells":
const: 0

+ clock-output-names:
+ maxItems: 1
+
# The BD718x7 supports two different HW states as reset target states. States
# are called as SNVS and READY. At READY state all the PMIC power outputs go
# down and OTP is reload. At the SNVS state all other logic and external
--
2.17.1

2020-09-04 14:57:32

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Subject: [PATCH 03/13] dt-bindings: arm: fsl: Fix matching Purism Librem5 phones

All Purism Librem5 phones have three compatibles so they need their own
entry to fix dbts_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is not valid under any of the given schemas

arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is too long

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/arm/fsl.yaml | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index 37cef8653541..edef7a9f4e36 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -377,12 +377,18 @@ properties:
- fsl,imx8mq-evk # i.MX8MQ EVK Board
- google,imx8mq-phanbell # Google Coral Edge TPU
- purism,librem5-devkit # Purism Librem5 devkit
- - purism,librem5r2 # Purism Librem5 phone "Chestnut"
- - purism,librem5r3 # Purism Librem5 phone "Dogwood"
- solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse
- technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk
- const: fsl,imx8mq

+ - description: Purism Librem5 phones
+ items:
+ - enum:
+ - purism,librem5r2 # Purism Librem5 phone "Chestnut"
+ - purism,librem5r3 # Purism Librem5 phone "Dogwood"
+ - const: purism,librem5
+ - const: fsl,imx8mq
+
- description: Zodiac Inflight Innovations Ultra Boards
items:
- enum:
--
2.17.1

2020-09-04 14:57:33

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Subject: [PATCH 10/13] arm64: dts: imx8mq: Add missing interrupts to GPC

The i.MX General Power Controller v2 device node was missing interrupts
property necessary to route its interrupt to GIC. This also fixes the
dbts_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
{'compatible': ... '$nodename': ['gpc@303a0000']} is not valid under any of the given schemas
arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: 'interrupts' is a required property

Fixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index aad3b9f2f35c..5e0e7d0f1bc4 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -623,6 +623,7 @@
gpc: gpc@303a0000 {
compatible = "fsl,imx8mq-gpc";
reg = <0x303a0000 0x10000>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <3>;
--
2.17.1

2020-09-04 14:58:27

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Subject: [PATCH 09/13] arm64: dts: imx8mp-evk: Align pin configuration group names with schema

Device tree schema expects pin configuration groups to end with 'grp'
suffix, otherwise dtbs_check complain with a warning like:

... 'usdhc3grp-100mhz', 'usdhc3grp-200mhz' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 3d535f1b3440..ad66f1286d95 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -157,7 +157,7 @@
>;
};

- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
>;
@@ -182,7 +182,7 @@
>;
};

- pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
@@ -194,7 +194,7 @@
>;
};

- pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
@@ -206,7 +206,7 @@
>;
};

- pinctrl_usdhc2_gpio: usdhc2grp-gpio {
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
>;
@@ -228,7 +228,7 @@
>;
};

- pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
+ pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
@@ -244,7 +244,7 @@
>;
};

- pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
+ pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
fsl,pins = <
MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6
--
2.17.1

2020-09-04 14:58:30

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Subject: [PATCH 08/13] arm64: dts: imx8mm-var-som-symphony: Use newer interrupts property

The int-gpios was deprecated in favor of generic interrupts property.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
index 0bca737964d5..fe3abd9d002f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
@@ -113,7 +113,7 @@
extcon_usbotg1: typec@3d {
compatible = "nxp,ptn5150";
reg = <0x3d>;
- int-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ interrupts = <&gpio1 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ptn5150>;
status = "okay";
--
2.17.1

2020-09-04 14:58:54

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Subject: [PATCH 13/13] arm64: dts: imx8mq-librem5: Add interrupt-names to ti,tps6598x

The ti,tps6598x binding requires interrupt-names property. The driver
does not really use it but the hardware could have more interrupt lines
connected. This fixes dtbs_check warning:

arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: usb-pd@3f: 'interrupt-names' is a required property

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index a78584086fa9..56295dd2fa8f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -605,6 +605,7 @@
pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
interrupt-parent = <&gpio1>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";

connector {
ports {
--
2.17.1

2020-09-04 14:59:26

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Subject: [PATCH 07/13] dt-bindings: mfd: rohm,bd71847-pmic: Add common clock-names

Add common 'clock-names' property which might appear in DTSes. This
makes it consistent with rohm,bd71837-pmic dtschema.

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 3 +++
1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
index 5d531051a153..6328163fc32a 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
@@ -35,6 +35,9 @@ properties:
clocks:
maxItems: 1

+ clock-names:
+ maxItems: 1
+
"#clock-cells":
const: 0

--
2.17.1

2020-09-04 14:59:49

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Subject: [PATCH 11/13] arm64: dts: imx8mq-librem5: Align regulator names with schema

Device tree schema expects regulator names to be lowercase. This fixes
dtbs_check warnings like:

pmic@4b: regulators:LDO1:regulator-name:0: 'LDO1' does not match '^ldo[1-7]$'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../boot/dts/freescale/imx8mq-librem5.dtsi | 30 +++++++++----------
1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index c3e290703fe8..4e50cb62654d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -645,7 +645,7 @@

regulators {
buck1_reg: BUCK1 {
- regulator-name = "BUCK1";
+ regulator-name = "buck1";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <1250>;
@@ -656,7 +656,7 @@
};

buck2_reg: BUCK2 {
- regulator-name = "BUCK2";
+ regulator-name = "buck2";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <1250>;
@@ -666,7 +666,7 @@
};

buck3_reg: BUCK3 {
- regulator-name = "BUCK3";
+ regulator-name = "buck3";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
rohm,dvs-run-voltage = <900000>;
@@ -674,42 +674,42 @@
};

buck4_reg: BUCK4 {
- regulator-name = "BUCK4";
+ regulator-name = "buck4";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1300000>;
rohm,dvs-run-voltage = <1000000>;
};

buck5_reg: BUCK5 {
- regulator-name = "BUCK5";
+ regulator-name = "buck5";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};

buck6_reg: BUCK6 {
- regulator-name = "BUCK6";
+ regulator-name = "buck6";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};

buck7_reg: BUCK7 {
- regulator-name = "BUCK7";
+ regulator-name = "buck7";
regulator-min-microvolt = <1605000>;
regulator-max-microvolt = <1995000>;
regulator-always-on;
};

buck8_reg: BUCK8 {
- regulator-name = "BUCK8";
+ regulator-name = "buck8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
regulator-always-on;
};

ldo1_reg: LDO1 {
- regulator-name = "LDO1";
+ regulator-name = "ldo1";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
/* leave on for snvs power button */
@@ -717,7 +717,7 @@
};

ldo2_reg: LDO2 {
- regulator-name = "LDO2";
+ regulator-name = "ldo2";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
/* leave on for snvs power button */
@@ -725,14 +725,14 @@
};

ldo3_reg: LDO3 {
- regulator-name = "LDO3";
+ regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};

ldo4_reg: LDO4 {
- regulator-name = "LDO4";
+ regulator-name = "ldo4";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
@@ -740,7 +740,7 @@

ldo5_reg: LDO5 {
/* VDD_PHY_0V9 - MIPI and HDMI domains */
- regulator-name = "LDO5";
+ regulator-name = "ldo5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
@@ -748,7 +748,7 @@

ldo6_reg: LDO6 {
/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
- regulator-name = "LDO6";
+ regulator-name = "ldo6";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
@@ -756,7 +756,7 @@

ldo7_reg: LDO7 {
/* VDD_PHY_3V3 - USB domain */
- regulator-name = "LDO7";
+ regulator-name = "ldo7";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
--
2.17.1

2020-09-04 14:59:49

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Subject: Re: [PATCH 01/13] dt-bindings: power: fsl,imx-gpcv2: Document interrupt controller properties

On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 is also an interrupt controller so
> document additional properties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
> '#interrupt-cells', 'interrupt-controller' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Lucas Stach <[email protected]>

> ---
> Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> index bde09a0b2da3..a96e6dbf1858 100644
> --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> @@ -33,6 +33,10 @@ properties:
> interrupts:
> maxItems: 1
>
> + interrupt-controller: true
> + '#interrupt-cells':
> + const: 3
> +
> pgc:
> type: object
> description: list of power domains provided by this controller.

2020-09-04 14:59:53

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Subject: [PATCH 12/13] arm64: dts: imx8mq-librem5: Drop interrupt-names in PMIC

The 'interrupt-names' property is not described in dtschema, not used by
the driver and does not really make sense as its value is simple 'irq'.
Drop it to fix dtbs_check warnings like:

arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dt.yaml:
pmic@4b: 'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 1 -
arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 1 -
2 files changed, 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
index 10f30ff85fd3..cce1b595e2d6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
@@ -289,7 +289,6 @@
clock-output-names = "pmic_clk";
interrupt-parent = <&gpio1>;
interrupts = <3 GPIO_ACTIVE_LOW>;
- interrupt-names = "irq";
rohm,reset-snvs-powered;

regulators {
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 4e50cb62654d..a78584086fa9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -640,7 +640,6 @@
clock-output-names = "pmic_clk";
interrupt-parent = <&gpio1>;
interrupts = <7 GPIO_ACTIVE_LOW>;
- interrupt-names = "irq";
rohm,reset-snvs-powered;

regulators {
--
2.17.1

2020-09-04 15:00:00

[permalink] [raw]

Subject: Re: [PATCH 04/13] dt-bindings: gpu: vivante,gc: Add common properties

On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (cooling-cells, assigned-clocks
> and others) to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpu@38000000:
> '#cooling-cells', 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Lucas Stach <[email protected]>

> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> index 4843df1ddbb6..67b71cad7b3b 100644
> --- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> @@ -21,6 +21,13 @@ properties:
> interrupts:
> maxItems: 1
>
> + '#cooling-cells':
> + const: 2
> +
> + assigned-clock-parents: true
> + assigned-clock-rates: true
> + assigned-clocks: true
> +
> clocks:
> items:
> - description: AXI/master interface clock

2020-09-04 15:01:20

[permalink] [raw]

Subject: Re: [PATCH 09/13] arm64: dts: imx8mp-evk: Align pin configuration group names with schema

On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> Device tree schema expects pin configuration groups to end with 'grp'
> suffix, otherwise dtbs_check complain with a warning like:
>
> ... 'usdhc3grp-100mhz', 'usdhc3grp-200mhz' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Lucas Stach <[email protected]>

> ---
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 3d535f1b3440..ad66f1286d95 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -157,7 +157,7 @@
> >;
> };
>
> - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc {
> + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41
> >;
> @@ -182,7 +182,7 @@
> >;
> };
>
> - pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
> + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
> MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
> @@ -194,7 +194,7 @@
> >;
> };
>
> - pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
> + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
> fsl,pins = <
> MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
> MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
> @@ -206,7 +206,7 @@
> >;
> };
>
> - pinctrl_usdhc2_gpio: usdhc2grp-gpio {
> + pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> fsl,pins = <
> MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
> >;
> @@ -228,7 +228,7 @@
> >;
> };
>
> - pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
> + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
> fsl,pins = <
> MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194
> MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4
> @@ -244,7 +244,7 @@
> >;
> };
>
> - pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
> + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
> fsl,pins = <
> MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196
> MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6

2020-09-04 15:02:45

[permalink] [raw]

Subject: Re: [PATCH 05/13] dt-bindings: gpu: vivante,gc: Remove trailing whitespace

On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> Remove whitespace at the end of line.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Lucas Stach <[email protected]>

> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> index 67b71cad7b3b..3ed172629974 100644
> --- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml
> @@ -33,7 +33,7 @@ properties:
> - description: AXI/master interface clock
> - description: GPU core clock
> - description: Shader clock (only required if GPU has feature PIPE_3D)
> - - description: AHB/slave interface clock (only required if GPU can gate
> + - description: AHB/slave interface clock (only required if GPU can gate
> slave interface independently)
> minItems: 1
> maxItems: 4

2020-09-04 15:05:28

[permalink] [raw]

Subject: Re: [PATCH 10/13] arm64: dts: imx8mq: Add missing interrupts to GPC

On Fr, 2020-09-04 at 16:53 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 device node was missing interrupts
> property necessary to route its interrupt to GIC. This also fixes the
> dbts_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
> {'compatible': ... '$nodename': ['gpc@303a0000']} is not valid under any of the given schemas
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: 'interrupts' is a required property
>
> Fixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains")
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Reviewed-by: Lucas Stach <[email protected]>

> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index aad3b9f2f35c..5e0e7d0f1bc4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -623,6 +623,7 @@
> gpc: gpc@303a0000 {
> compatible = "fsl,imx8mq-gpc";
> reg = <0x303a0000 0x10000>;
> + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-parent = <&gic>;
> interrupt-controller;
> #interrupt-cells = <3>;

2020-09-13 01:21:12

by Shawn Guo

[permalink] [raw]

Subject: Re: [PATCH 08/13] arm64: dts: imx8mm-var-som-symphony: Use newer interrupts property

On Fri, Sep 04, 2020 at 04:53:07PM +0200, Krzysztof Kozlowski wrote:
> The int-gpios was deprecated in favor of generic interrupts property.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>

Applied patch #8 ~ #13, thanks.

2020-09-14 22:32:31

[permalink] [raw]

Subject: Re: [PATCH 01/13] dt-bindings: power: fsl, imx-gpcv2: Document interrupt controller properties

On Fri, 04 Sep 2020 16:53:00 +0200, Krzysztof Kozlowski wrote:
> The i.MX General Power Controller v2 is also an interrupt controller so
> document additional properties to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000:
> '#interrupt-cells', 'interrupt-controller' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>

Applied, thanks!

2020-09-14 22:34:28

[permalink] [raw]

Subject: Re: [PATCH 02/13] dt-bindings: display: bridge: nwl-dsi: Add common properties

On Fri, 04 Sep 2020 16:53:01 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (assigned-clocks and others) to
> fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: mipi-dsi@30a00000:
> 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: '^panel@[0-9]+$', 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml | 4 ++++
> 1 file changed, 4 insertions(+)
>

Applied, thanks!

2020-09-14 22:35:10

[permalink] [raw]

Subject: Re: [PATCH 04/13] dt-bindings: gpu: vivante,gc: Add common properties

On Fri, 04 Sep 2020 16:53:03 +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (cooling-cells, assigned-clocks
> and others) to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpu@38000000:
> '#cooling-cells', 'assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 7 +++++++
> 1 file changed, 7 insertions(+)
>

Applied, thanks!

2020-09-14 22:36:57

[permalink] [raw]

Subject: Re: [PATCH 03/13] dt-bindings: arm: fsl: Fix matching Purism Librem5 phones

On Fri, 04 Sep 2020 16:53:02 +0200, Krzysztof Kozlowski wrote:
> All Purism Librem5 phones have three compatibles so they need their own
> entry to fix dbts_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
> compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is not valid under any of the given schemas
>
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml: /:
> compatible: ['purism,librem5r2', 'purism,librem5', 'fsl,imx8mq'] is too long
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/arm/fsl.yaml | 10 ++++++++--
> 1 file changed, 8 insertions(+), 2 deletions(-)
>

Reviewed-by: Rob Herring <[email protected]>

I expect Shawn to pick this one up as this file gets touched a fair
amount.

2020-09-14 22:37:57

[permalink] [raw]

Subject: Re: [PATCH 05/13] dt-bindings: gpu: vivante, gc: Remove trailing whitespace

On Fri, 04 Sep 2020 16:53:04 +0200, Krzysztof Kozlowski wrote:
> Remove whitespace at the end of line.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/gpu/vivante,gc.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>

Applied, thanks!

2020-09-14 22:45:23

[permalink] [raw]

Subject: Re: [PATCH 06/13] dt-bindings: mfd: rohm,bd71837-pmic: Add common properties

On Fri, Sep 04, 2020 at 04:53:05PM +0200, Krzysztof Kozlowski wrote:
> Add common properties appearing in DTSes (clock-names,
> clock-output-names) to fix dtbs_check warnings like:
>
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml:
> pmic@4b: 'clock-names', 'clock-output-names', do not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/mfd/rohm,bd71837-pmic.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> index 65018a019e1d..ecce0d5e3a95 100644
> --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> @@ -32,9 +32,15 @@ properties:
> clocks:
> maxItems: 1
>
> + clock-names:
> + maxItems: 1

Needs to define what the name is.

> +
> "#clock-cells":
> const: 0
>
> + clock-output-names:
> + maxItems: 1

Ideally this one too, but we've been more flexible on it.

> +
> # The BD718x7 supports two different HW states as reset target states. States
> # are called as SNVS and READY. At READY state all the PMIC power outputs go
> # down and OTP is reload. At the SNVS state all other logic and external
> --
> 2.17.1
>

2020-09-14 22:45:51

[permalink] [raw]

Subject: Re: [PATCH 07/13] dt-bindings: mfd: rohm,bd71847-pmic: Add common clock-names

On Fri, Sep 04, 2020 at 04:53:06PM +0200, Krzysztof Kozlowski wrote:
> Add common 'clock-names' property which might appear in DTSes. This
> makes it consistent with rohm,bd71837-pmic dtschema.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
> index 5d531051a153..6328163fc32a 100644
> --- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
> +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml
> @@ -35,6 +35,9 @@ properties:
> clocks:
> maxItems: 1
>
> + clock-names:
> + maxItems: 1

Need to define the name.

> +
> "#clock-cells":
> const: 0
>
> --
> 2.17.1
>

2020-09-15 06:37:42

by Matti Vaittinen

[permalink] [raw]

Subject: Re: [PATCH 06/13] dt-bindings: mfd: rohm,bd71837-pmic: Add common properties

Hello All,

On Mon, 2020-09-14 at 16:44 -0600, Rob Herring wrote:
> On Fri, Sep 04, 2020 at 04:53:05PM +0200, Krzysztof Kozlowski wrote:
> > Add common properties appearing in DTSes (clock-names,
> > clock-output-names) to fix dtbs_check warnings like:
> >
> > arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml:
> > pmic@4b: 'clock-names', 'clock-output-names', do not match any
> > of the regexes: 'pinctrl-[0-9]+'
> >
> > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> > ---
> > .../devicetree/bindings/mfd/rohm,bd71837-pmic.yaml | 6
> > ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-
> > pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-
> > pmic.yaml
> > index 65018a019e1d..ecce0d5e3a95 100644
> > --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> > +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> > @@ -32,9 +32,15 @@ properties:
> > clocks:
> > maxItems: 1
> >
> > + clock-names:
> > + maxItems: 1
>
> Needs to define what the name is.

Someone once told me that "naming is hard".
Do we have some good common convention for 32K oscillator input naming?
Or should it just be dropped?

>
> > +
> > "#clock-cells":
> > const: 0
> >
> > + clock-output-names:
> > + maxItems: 1
>
> Ideally this one too, but we've been more flexible on it.

Data-sheet for BD71837 uses pin name "C32k_OUT". So maybe this would be
good?

BD71838 uses "bd71828-32k-out" . so we could also go with this same
convention and use "bd71837-32k-out". Or - we could take a risk and
*assume* typical use case for this clk (as this is typically used with
i.MX8 I'd guess the 32k is used for RTC) and name it accordingly.

Br,
Matti Vaittinen

--
Matti Vaittinen, Linux device drivers
ROHM Semiconductors, Finland
SWDC
Kiviharjunlenkki 1E
90220 OULU
FINLAND

~~~ "I don't think so," said Rene Descartes. Just then he vanished ~~~

Simon says - in Latin please.
"non cogito me" dixit Rene Descarte, deinde evanescavit

(Thanks for the translation Simon)

2020-09-15 15:13:18

[permalink] [raw]

Subject: Re: [PATCH 06/13] dt-bindings: mfd: rohm,bd71837-pmic: Add common properties

On Tue, Sep 15, 2020 at 12:34 AM Vaittinen, Matti
<[email protected]> wrote:
>
>
> Hello All,
>
> On Mon, 2020-09-14 at 16:44 -0600, Rob Herring wrote:
> > On Fri, Sep 04, 2020 at 04:53:05PM +0200, Krzysztof Kozlowski wrote:
> > > Add common properties appearing in DTSes (clock-names,
> > > clock-output-names) to fix dtbs_check warnings like:
> > >
> > > arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dt.yaml:
> > > pmic@4b: 'clock-names', 'clock-output-names', do not match any
> > > of the regexes: 'pinctrl-[0-9]+'
> > >
> > > Signed-off-by: Krzysztof Kozlowski <[email protected]>
> > > ---
> > > .../devicetree/bindings/mfd/rohm,bd71837-pmic.yaml | 6
> > > ++++++
> > > 1 file changed, 6 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-
> > > pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-
> > > pmic.yaml
> > > index 65018a019e1d..ecce0d5e3a95 100644
> > > --- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> > > +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
> > > @@ -32,9 +32,15 @@ properties:
> > > clocks:
> > > maxItems: 1
> > >
> > > + clock-names:
> > > + maxItems: 1
> >
> > Needs to define what the name is.
>
> Someone once told me that "naming is hard".
> Do we have some good common convention for 32K oscillator input naming?

No.

> Or should it just be dropped?

Yes, having a name for a single entry in *-names is kind of pointless IMO.

> > > +
> > > "#clock-cells":
> > > const: 0
> > >
> > > + clock-output-names:
> > > + maxItems: 1
> >
> > Ideally this one too, but we've been more flexible on it.
>
> Data-sheet for BD71837 uses pin name "C32k_OUT". So maybe this would be
> good?

What's in all the dts files? I'd go with that if there's any clear
winner. If it's already a random free-for-all, then just leave it
as-is.

>
> BD71838 uses "bd71828-32k-out" . so we could also go with this same
> convention and use "bd71837-32k-out". Or - we could take a risk and
> *assume* typical use case for this clk (as this is typically used with
> i.MX8 I'd guess the 32k is used for RTC) and name it accordingly.

It should be aligned with what the output is called, not what it is
connected to.

Rob

2020-09-16 06:40:25