On Mon, Oct 19, 2020 at 11:47:11AM +0200, Marek Szyprowski wrote:
> From: Jaehoon Chung <[email protected]>
>
> Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433
> variant).
The title has typo and actually entire "Doc" should be dropped. Just
"dt-bindings: pci:". This applies to all DT patches.
>
> Signed-off-by: Jaehoon Chung <[email protected]>
> [mszyprow: updated the binding to latest driver changes, rewrote it in yaml,
> rewrote commit message]
If you wrote them in YAML it should be a new patch of yours. It is the
same then as converting TXT to YAML.
> Signed-off-by: Marek Szyprowski <[email protected]>
> ---
> .../bindings/pci/samsung,exynos-pcie.yaml | 106 ++++++++++++++++++
> 1 file changed, 106 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> new file mode 100644
> index 000000000000..48fb569c238c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> @@ -0,0 +1,104 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung SoC series PCIe Host Controller Device Tree Bindings
> +
> +maintainers:
> + - Jaehoon Chung <[email protected]>
> +
> +description: |+
> + Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
> + PCIe IP and thus inherits all the common properties defined in
> + designware-pcie.txt.
> +
> +allOf:
> + - $ref: /schemas/pci/pci-bus.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - samsung,exynos5433-pcie
const, not enum
> +
> + reg:
> + items:
> + - description: External Local Bus interface (ELBI) registers.
> + - description: Data Bus Interface (DBI) registers.
> + - description: PCIe configuration space region.
> +
> + reg-names:
> + items:
> + - const: elbi
> + - const: bdi
> + - const: config
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: PCIe bridge clock
> + - description: PCIe bus clock
> +
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> +
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + const: pcie-phy
> +
> + vdd10-supply:
> + description:
> + Phandle to a regulator that provides 1.0V power to the PCIe block.
> +
> + vdd18-supply:
> + description:
> + Phandle to a regulator that provides 1.8V power to the PCIe block.
> +
> +required:
> + - reg
> + - reg-names
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - phys
> + - phy-names
> + - vdd10-supply
additionalProperties: false
Best regards,
Krzysztof
On Mon, 19 Oct 2020 at 12:12, Krzysztof Kozlowski <[email protected]> wrote:
>
> On Mon, Oct 19, 2020 at 11:47:11AM +0200, Marek Szyprowski wrote:
> > From: Jaehoon Chung <[email protected]>
> >
> > Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433
> > variant).
>
> The title has typo and actually entire "Doc" should be dropped. Just
> "dt-bindings: pci:". This applies to all DT patches.
>
> >
> > Signed-off-by: Jaehoon Chung <[email protected]>
> > [mszyprow: updated the binding to latest driver changes, rewrote it in yaml,
> > rewrote commit message]
>
> If you wrote them in YAML it should be a new patch of yours. It is the
> same then as converting TXT to YAML.
>
> > Signed-off-by: Marek Szyprowski <[email protected]>
> > ---
> > .../bindings/pci/samsung,exynos-pcie.yaml | 106 ++++++++++++++++++
> > 1 file changed, 106 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> > new file mode 100644
> > index 000000000000..48fb569c238c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
> > @@ -0,0 +1,104 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Samsung SoC series PCIe Host Controller Device Tree Bindings
> > +
> > +maintainers:
> > + - Jaehoon Chung <[email protected]>
> > +
> > +description: |+
> > + Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
> > + PCIe IP and thus inherits all the common properties defined in
> > + designware-pcie.txt.
> > +
> > +allOf:
> > + - $ref: /schemas/pci/pci-bus.yaml#
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - samsung,exynos5433-pcie
>
> const, not enum
>
> > +
> > + reg:
> > + items:
> > + - description: External Local Bus interface (ELBI) registers.
> > + - description: Data Bus Interface (DBI) registers.
> > + - description: PCIe configuration space region.
> > +
> > + reg-names:
> > + items:
> > + - const: elbi
> > + - const: bdi
> > + - const: config
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + items:
> > + - description: PCIe bridge clock
> > + - description: PCIe bus clock
> > +
> > + clock-names:
> > + items:
> > + - const: pcie
> > + - const: pcie_bus
> > +
> > + phys:
> > + maxItems: 1
> > +
> > + phy-names:
> > + const: pcie-phy
> > +
> > + vdd10-supply:
> > + description:
> > + Phandle to a regulator that provides 1.0V power to the PCIe block.
> > +
> > + vdd18-supply:
> > + description:
> > + Phandle to a regulator that provides 1.8V power to the PCIe block.
> > +
> > +required:
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - interrupt-names
> > + - clocks
> > + - clock-names
> > + - phys
> > + - phy-names
> > + - vdd10-supply
>
> additionalProperties: false
This can be unevaluatedProperties, since you include pci-bus schema.
However still you should either include designware schema or include
it's properties here.
Best regards,
Krzysztof
Hi Krzysztof,
On 19.10.2020 12:18, Krzysztof Kozlowski wrote:
> On Mon, 19 Oct 2020 at 12:12, Krzysztof Kozlowski <[email protected]> wrote:
>> On Mon, Oct 19, 2020 at 11:47:11AM +0200, Marek Szyprowski wrote:
>>> From: Jaehoon Chung <[email protected]>
>>>
>>> Add dt-bindings for the Samsung Exynos PCIe controller (Exynos5433
>>> variant).
>> The title has typo and actually entire "Doc" should be dropped. Just
>> "dt-bindings: pci:". This applies to all DT patches.
>>
>>> Signed-off-by: Jaehoon Chung <[email protected]>
>>> [mszyprow: updated the binding to latest driver changes, rewrote it in yaml,
>>> rewrote commit message]
>> If you wrote them in YAML it should be a new patch of yours. It is the
>> same then as converting TXT to YAML.
>>
>>> Signed-off-by: Marek Szyprowski <[email protected]>
>>> ---
>>> .../bindings/pci/samsung,exynos-pcie.yaml | 106 ++++++++++++++++++
>>> 1 file changed, 106 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>> new file mode 100644
>>> index 000000000000..48fb569c238c
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml
>>> @@ -0,0 +1,104 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: https://protect2.fireeye.com/v1/url?k=a6caf3f8-fb18e55d-a6cb78b7-0cc47a31bee8-bb3776dee0a03bbb&q=1&e=5f1b0c1e-e4d1-4ae2-b527-8cd5ec52695f&u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fpci%2Fsamsung%2Cexynos-pcie.yaml%23
>>> +$schema: https://protect2.fireeye.com/v1/url?k=591573a2-04c76507-5914f8ed-0cc47a31bee8-bd08b2eac7a5040d&q=1&e=5f1b0c1e-e4d1-4ae2-b527-8cd5ec52695f&u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23
>>> +
>>> +title: Samsung SoC series PCIe Host Controller Device Tree Bindings
>>> +
>>> +maintainers:
>>> + - Jaehoon Chung <[email protected]>
>>> +
>>> +description: |+
>>> + Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare
>>> + PCIe IP and thus inherits all the common properties defined in
>>> + designware-pcie.txt.
>>> +
>>> +allOf:
>>> + - $ref: /schemas/pci/pci-bus.yaml#
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - samsung,exynos5433-pcie
>> const, not enum
>>
>>> +
>>> + reg:
>>> + items:
>>> + - description: External Local Bus interface (ELBI) registers.
>>> + - description: Data Bus Interface (DBI) registers.
>>> + - description: PCIe configuration space region.
>>> +
>>> + reg-names:
>>> + items:
>>> + - const: elbi
>>> + - const: bdi
>>> + - const: config
>>> +
>>> + interrupts:
>>> + maxItems: 1
>>> +
>>> + clocks:
>>> + items:
>>> + - description: PCIe bridge clock
>>> + - description: PCIe bus clock
>>> +
>>> + clock-names:
>>> + items:
>>> + - const: pcie
>>> + - const: pcie_bus
>>> +
>>> + phys:
>>> + maxItems: 1
>>> +
>>> + phy-names:
>>> + const: pcie-phy
>>> +
>>> + vdd10-supply:
>>> + description:
>>> + Phandle to a regulator that provides 1.0V power to the PCIe block.
>>> +
>>> + vdd18-supply:
>>> + description:
>>> + Phandle to a regulator that provides 1.8V power to the PCIe block.
>>> +
>>> +required:
>>> + - reg
>>> + - reg-names
>>> + - interrupts
>>> + - interrupt-names
>>> + - clocks
>>> + - clock-names
>>> + - phys
>>> + - phy-names
>>> + - vdd10-supply
>> additionalProperties: false
> This can be unevaluatedProperties, since you include pci-bus schema.
> However still you should either include designware schema or include
> it's properties here.
Frankly, I would like to include designware-pci bindling/schema, but it
has not been converted to yaml yet. I don't feel that I know PCI enough
to do that conversion...
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
On Wed, Oct 21, 2020 at 01:59:25PM +0200, Marek Szyprowski wrote:
>>> +required:
> >>> + - reg
> >>> + - reg-names
> >>> + - interrupts
> >>> + - interrupt-names
> >>> + - clocks
> >>> + - clock-names
> >>> + - phys
> >>> + - phy-names
> >>> + - vdd10-supply
> >> additionalProperties: false
> > This can be unevaluatedProperties, since you include pci-bus schema.
> > However still you should either include designware schema or include
> > it's properties here.
>
> Frankly, I would like to include designware-pci bindling/schema, but it
> has not been converted to yaml yet. I don't feel that I know PCI enough
> to do that conversion...
I think you need then include all properties in your dtschema. Otherwise
DTS will not pass (neither the example here) the checks.
Best regards,
Krzysztof