2020-10-26 06:48:43

by Zhiqiang Hou

Subject: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a

From: Xiaowei Bao <[email protected]>

Add PCIe EP node for ls1088a to support EP mode.

Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>
---
V9:
- Rebase the patch since V8 patch was not accepted due to conflict.
- Correct the number of outbound windows.
- Add lables for EP nodes.

.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index ff5805206a28..8d8e610acba6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -517,6 +517,17 @@
status = "disabled";
};

+ pcie_ep1: pcie-ep@3400000 {
+ compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+ reg = <0x00 0x03400000 0x0 0x00100000
+ 0x20 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <24>;
+ num-ob-windows = <256>;
+ max-functions = /bits/ 8 <2>;
+ status = "disabled";
+ };
+
pcie2: pcie@3500000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
@@ -543,6 +554,16 @@
status = "disabled";
};

+ pcie_ep2: pcie-ep@3500000 {
+ compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+ reg = <0x00 0x03500000 0x0 0x00100000
+ 0x28 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
+ status = "disabled";
+ };
+
pcie3: pcie@3600000 {
compatible = "fsl,ls1088a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
@@ -569,6 +590,16 @@
status = "disabled";
};

+ pcie_ep3: pcie-ep@3600000 {
+ compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
+ reg = <0x00 0x03600000 0x0 0x00100000
+ 0x30 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ib-windows = <6>;
+ num-ob-windows = <6>;
+ status = "disabled";
+ };
+
smmu: iommu@5000000 {
compatible = "arm,mmu-500";
reg = <0 0x5000000 0 0x800000>;
--
2.17.1

2020-11-01 08:57:15

by Shawn Guo

Subject: Re: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a

On Mon, Oct 26, 2020 at 12:27:59PM +0800, Zhiqiang Hou wrote:
> From: Xiaowei Bao <[email protected]>
>
> Add PCIe EP node for ls1088a to support EP mode.
>
> Signed-off-by: Xiaowei Bao <[email protected]>
> Signed-off-by: Hou Zhiqiang <[email protected]>
> Reviewed-by: Andrew Murray <[email protected]>
> ---
> V9:
> - Rebase the patch since V8 patch was not accepted due to conflict.
> - Correct the number of outbound windows.
> - Add lables for EP nodes.
>
> .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index ff5805206a28..8d8e610acba6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -517,6 +517,17 @@
> status = "disabled";
> };
>
> + pcie_ep1: pcie-ep@3400000 {
> + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";

Missing space in between compatibles.

Shawn

> + reg = <0x00 0x03400000 0x0 0x00100000
> + 0x20 0x00000000 0x8 0x00000000>;
> + reg-names = "regs", "addr_space";
> + num-ib-windows = <24>;
> + num-ob-windows = <256>;
> + max-functions = /bits/ 8 <2>;
> + status = "disabled";
> + };
> +
> pcie2: pcie@3500000 {
> compatible = "fsl,ls1088a-pcie";
> reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
> @@ -543,6 +554,16 @@
> status = "disabled";
> };
>
> + pcie_ep2: pcie-ep@3500000 {
> + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> + reg = <0x00 0x03500000 0x0 0x00100000
> + 0x28 0x00000000 0x8 0x00000000>;
> + reg-names = "regs", "addr_space";
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> + status = "disabled";
> + };
> +
> pcie3: pcie@3600000 {
> compatible = "fsl,ls1088a-pcie";
> reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
> @@ -569,6 +590,16 @@
> status = "disabled";
> };
>
> + pcie_ep3: pcie-ep@3600000 {
> + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> + reg = <0x00 0x03600000 0x0 0x00100000
> + 0x30 0x00000000 0x8 0x00000000>;
> + reg-names = "regs", "addr_space";
> + num-ib-windows = <6>;
> + num-ob-windows = <6>;
> + status = "disabled";
> + };
> +
> smmu: iommu@5000000 {
> compatible = "arm,mmu-500";
> reg = <0 0x5000000 0 0x800000>;
> --
> 2.17.1
>

2020-11-02 04:03:38

by Zhiqiang Hou

Subject: RE: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a

Hi Shawn,

Thanks a lot for your comments!

> -----Original Message-----
> From: Shawn Guo <[email protected]>
> Sent: 2020??11??1?? 16:55
> To: Z.q. Hou <[email protected]>
> Cc: [email protected]; [email protected];
> [email protected]; [email protected]; Leo Li
> <[email protected]>; Xiaowei Bao <[email protected]>
> Subject: Re: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a
>
> On Mon, Oct 26, 2020 at 12:27:59PM +0800, Zhiqiang Hou wrote:
> > From: Xiaowei Bao <[email protected]>
> >
> > Add PCIe EP node for ls1088a to support EP mode.
> >
> > Signed-off-by: Xiaowei Bao <[email protected]>
> > Signed-off-by: Hou Zhiqiang <[email protected]>
> > Reviewed-by: Andrew Murray <[email protected]>
> > ---
> > V9:
> > - Rebase the patch since V8 patch was not accepted due to conflict.
> > - Correct the number of outbound windows.
> > - Add lables for EP nodes.
> >
> > .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31
> +++++++++++++++++++
> > 1 file changed, 31 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > index ff5805206a28..8d8e610acba6 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> > @@ -517,6 +517,17 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep1: pcie-ep@3400000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
>
> Missing space in between compatibles.

Will fix in v10.

Regards,
Zhiqiang

>
> Shawn
>
> > + reg = <0x00 0x03400000 0x0 0x00100000
> > + 0x20 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <24>;
> > + num-ob-windows = <256>;
> > + max-functions = /bits/ 8 <2>;
> > + status = "disabled";
> > + };
> > +
> > pcie2: pcie@3500000 {
> > compatible = "fsl,ls1088a-pcie";
> > reg = <0x00 0x03500000 0x0 0x00100000 /* controller
> registers */
> > @@ -543,6 +554,16 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep2: pcie-ep@3500000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > + reg = <0x00 0x03500000 0x0 0x00100000
> > + 0x28 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <6>;
> > + num-ob-windows = <6>;
> > + status = "disabled";
> > + };
> > +
> > pcie3: pcie@3600000 {
> > compatible = "fsl,ls1088a-pcie";
> > reg = <0x00 0x03600000 0x0 0x00100000 /* controller
> registers */
> > @@ -569,6 +590,16 @@
> > status = "disabled";
> > };
> >
> > + pcie_ep3: pcie-ep@3600000 {
> > + compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> > + reg = <0x00 0x03600000 0x0 0x00100000
> > + 0x30 0x00000000 0x8 0x00000000>;
> > + reg-names = "regs", "addr_space";
> > + num-ib-windows = <6>;
> > + num-ob-windows = <6>;
> > + status = "disabled";
> > + };
> > +
> > smmu: iommu@5000000 {
> > compatible = "arm,mmu-500";
> > reg = <0 0x5000000 0 0x800000>;
> > --
> > 2.17.1
> >