GPIOs that attempt to use interrupts get thwarted with a message like:
"pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
owned by ACPI.
Signed-off-by: Evan Green <[email protected]>
Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin
controller support")
Cc: [email protected]
---
drivers/pinctrl/intel/pinctrl-jasperlake.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/intel/pinctrl-jasperlake.c b/drivers/pinctrl/intel/pinctrl-jasperlake.c
index 9bd0e8e6310c3..283698cf0dc7d 100644
--- a/drivers/pinctrl/intel/pinctrl-jasperlake.c
+++ b/drivers/pinctrl/intel/pinctrl-jasperlake.c
@@ -16,7 +16,7 @@
#define JSL_PAD_OWN 0x020
#define JSL_PADCFGLOCK 0x080
-#define JSL_HOSTSW_OWN 0x0b0
+#define JSL_HOSTSW_OWN 0x0c0
#define JSL_GPI_IS 0x100
#define JSL_GPI_IE 0x120
--
2.26.2
On Tue, Nov 10, 2020 at 3:48 PM Andy Shevchenko
<[email protected]> wrote:
>
>
>
> On Wednesday, November 11, 2020, Evan Green <[email protected]> wrote:
>>
>> GPIOs that attempt to use interrupts get thwarted with a message like:
>> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
>> the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
>> owned by ACPI.
>
>
> Funny, I have created a similar patch few hours ago. Are you sure this is enough? In mine I have also padcfglock updated. But I have to confirm that, that’s why I didn’t send it out.
Oh weird! I didn't check padcfglock since it didn't happen to be
involved in the bug I was tracking down. I was trying to clean out
some skeletons in my kernel closet [1] and debugged it down to this.
If you want to smash the two patches together I'm fine with that. Let
me know, and CC me if you do post something.
-Evan
[1] https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/master/overlay-dedede/sys-kernel/chromeos-kernel-5_4/files/0001-CHROMIUM-pinctrl-intel-Allow-pin-as-IRQ-even-in-ACPI.patch
On Tue, Nov 10, 2020 at 04:03:57PM -0800, Evan Green wrote:
> On Tue, Nov 10, 2020 at 3:48 PM Andy Shevchenko
> <[email protected]> wrote:
> > On Wednesday, November 11, 2020, Evan Green <[email protected]> wrote:
> >>
> >> GPIOs that attempt to use interrupts get thwarted with a message like:
> >> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> >> the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
> >> owned by ACPI.
> >
> >
> > Funny, I have created a similar patch few hours ago. Are you sure this is enough? In mine I have also padcfglock updated. But I have to confirm that, that’s why I didn’t send it out.
>
> Oh weird! I didn't check padcfglock since it didn't happen to be
> involved in the bug I was tracking down. I was trying to clean out
> some skeletons in my kernel closet [1] and debugged it down to this.
>
> If you want to smash the two patches together I'm fine with that. Let
> me know, and CC me if you do post something.
Can you test that 0x90 is correct value for padcfglock offset?
> [1] https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/master/overlay-dedede/sys-kernel/chromeos-kernel-5_4/files/0001-CHROMIUM-pinctrl-intel-Allow-pin-as-IRQ-even-in-ACPI.patch
--
With Best Regards,
Andy Shevchenko
On Tue, Nov 10, 2020 at 02:49:49PM -0800, Evan Green wrote:
> GPIOs that attempt to use interrupts get thwarted with a message like:
> "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
Simply HOSTSW_OWN, and same spelling in the subject, please.
> owned by ACPI.
> Signed-off-by: Evan Green <[email protected]>
> Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin
> controller support")
It must be one line, and put it first in the tag block
> Cc: [email protected]
This is second one...
Fixes: ...
Cc: ...
SoB: ...
--
With Best Regards,
Andy Shevchenko
On Wed, Nov 11, 2020 at 2:13 PM Andy Shevchenko
<[email protected]> wrote:
>
> On Tue, Nov 10, 2020 at 02:49:49PM -0800, Evan Green wrote:
> > GPIOs that attempt to use interrupts get thwarted with a message like:
> > "pin 161 cannot be used as IRQ" (for instance with SD_CD). This is because
> > the JSL_HOSTSW_OWN offset is incorrect, so every GPIO looks like it's
>
> Simply HOSTSW_OWN, and same spelling in the subject, please.
>
> > owned by ACPI.
>
>
> > Signed-off-by: Evan Green <[email protected]>
>
> > Fixes: e278dcb7048b1 ("pinctrl: intel: Add Intel Jasper Lake pin
> > controller support")
>
> It must be one line, and put it first in the tag block
>
>
> > Cc: [email protected]
>
> This is second one...
>
> Fixes: ...
> Cc: ...
> SoB: ...
Thanks, will fix these things, spinning now.
-Evan