From: Klaus Jensen <[email protected]>
Since NVMe v1.4 the Controller Memory Buffer must be explicitly enabled
by the host.
Signed-off-by: Klaus Jensen <[email protected]>
---
drivers/nvme/host/pci.c | 13 ++++++++++++-
include/linux/nvme.h | 6 ++++++
2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 50d9a20568a2..62eb83030a5a 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -23,6 +23,7 @@
#include <linux/t10-pi.h>
#include <linux/types.h>
#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/io-64-nonatomic-hi-lo.h>
#include <linux/sed-opal.h>
#include <linux/pci-p2pdma.h>
@@ -1787,7 +1788,7 @@ static u32 nvme_cmb_size(struct nvme_dev *dev)
static void nvme_map_cmb(struct nvme_dev *dev)
{
- u64 size, offset;
+ u64 size, offset, cmbmsc;
resource_size_t bar_size;
struct pci_dev *pdev = to_pci_dev(dev->dev);
int bar;
@@ -1795,6 +1796,9 @@ static void nvme_map_cmb(struct nvme_dev *dev)
if (dev->cmb_size)
return;
+ if (NVME_CAP_CMBS(dev->ctrl.cap))
+ writel(NVME_CMBMSC_CRE, dev->bar + NVME_REG_CMBMSC);
+
dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ);
if (!dev->cmbsz)
return;
@@ -1808,6 +1812,13 @@ static void nvme_map_cmb(struct nvme_dev *dev)
if (offset > bar_size)
return;
+ if (NVME_CAP_CMBS(dev->ctrl.cap)) {
+ cmbmsc = pci_bus_address(pdev, bar) + offset;
+ cmbmsc |= (NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE);
+
+ hi_lo_writeq(cmbmsc, dev->bar + NVME_REG_CMBMSC);
+ }
+
/*
* Controllers may support a CMB size larger than their BAR,
* for example, due to being behind a bridge. Reduce the CMB to
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index d92535997687..bfed36e342cc 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -116,6 +116,9 @@ enum {
NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer
* Location
*/
+ NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory
+ * Space Control
+ */
NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */
NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */
NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */
@@ -135,6 +138,7 @@ enum {
#define NVME_CAP_CSS(cap) (((cap) >> 37) & 0xff)
#define NVME_CAP_MPSMIN(cap) (((cap) >> 48) & 0xf)
#define NVME_CAP_MPSMAX(cap) (((cap) >> 52) & 0xf)
+#define NVME_CAP_CMBS(cap) (((cap) >> 57) & 0x1)
#define NVME_CMB_BIR(cmbloc) ((cmbloc) & 0x7)
#define NVME_CMB_OFST(cmbloc) (((cmbloc) >> 12) & 0xfffff)
@@ -192,6 +196,8 @@ enum {
NVME_CSTS_SHST_OCCUR = 1 << 2,
NVME_CSTS_SHST_CMPLT = 2 << 2,
NVME_CSTS_SHST_MASK = 3 << 2,
+ NVME_CMBMSC_CRE = 1 << 0,
+ NVME_CMBMSC_CMSE = 1 << 1,
};
struct nvme_id_power_state {
--
2.30.0
On Jan 15 07:30, Klaus Jensen wrote:
> From: Klaus Jensen <[email protected]>
>
> Since NVMe v1.4 the Controller Memory Buffer must be explicitly enabled
> by the host.
>
Sorry, messed up and missed adding the changes for v2.
v2:
- Do not explicitly check the NVMe version, rely on the presence of
the new register instead. (Christoph)
- Use hi_lo_writeq. (Christoph, Keith)
- Fix missing offset and use pci_bus_address(). (Keith)
Thanks,
applied to nvme-5.11 with a little tweak to remove the cmbmsc local
variable and a comment explaining what is going on.
On Jan 18 18:59, Christoph Hellwig wrote:
> Thanks,
>
> applied to nvme-5.11 with a little tweak to remove the cmbmsc local
> variable and a comment explaining what is going on.
>
Sweet. Thanks!