Add support for the Ebang EBAZ4205 board. This board was once used as a
control board for a bitcoin mining device. Nowawdays it is sold as a cheap
Zynq-7000 eval board.
Michael Walle (3):
dt-bindings: add ebang vendor prefix
dt-bindings: arm: add Ebang EBAZ4205 board
ARM: dts: add Ebang EBAZ4205 device tree
.../devicetree/bindings/arm/xilinx.yaml | 1 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/zynq-ebaz4205.dts | 109 ++++++++++++++++++
4 files changed, 113 insertions(+)
create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
--
2.20.1
Add the Ebang EBAZ4205 board to the Zynq-7000 board category.
Signed-off-by: Michael Walle <[email protected]>
---
Documentation/devicetree/bindings/arm/xilinx.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml
index e0c6787f6e94..aaca69d0199f 100644
--- a/Documentation/devicetree/bindings/arm/xilinx.yaml
+++ b/Documentation/devicetree/bindings/arm/xilinx.yaml
@@ -22,6 +22,7 @@ properties:
- adapteva,parallella
- digilent,zynq-zybo
- digilent,zynq-zybo-z7
+ - ebang,ebaz4205
- xlnx,zynq-cc108
- xlnx,zynq-zc702
- xlnx,zynq-zc706
--
2.20.1
Add vendor prefix for Zhejiang Ebang Communication Co., Ltd.
Signed-off-by: Michael Walle <[email protected]>
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index e8c773478f54..f23ea04e0a86 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -311,6 +311,8 @@ patternProperties:
description: Dyna-Image
"^ea,.*":
description: Embedded Artists AB
+ "^ebang,.*":
+ description: Zhejiang Ebang Communication Co., Ltd
"^ebs-systart,.*":
description: EBS-SYSTART GmbH
"^ebv,.*":
--
2.20.1
The Ebang EBAZ4205 is a simple board based on the Xilinx Zynq-7000 SoC.
Its features are:
- one serial port
- 256 MB RAM
- 128 MB NAND flash
- SDcard slot
- IP101GA 10/100 Mbit Ethernet PHY (connected to PL IOs)
- two LEDs (connected to PL IOs)
- one Push Button (connect to PL IOs)
- (optional) RTC
- (optional) Input voltage supervisor
The NAND flash is not supported in mainline linux yet. Unfortunately,
the PHY is connected via the PL, thus for working ethernet the FPGA has
to be configured. Also, depending on the board variant, the PHY has no
external crystal and its clock needs to be driven by the PL. FCLK3 is
used for this and is kept enabled.
Signed-off-by: Michael Walle <[email protected]>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/zynq-ebaz4205.dts | 109 ++++++++++++++++++++++++++++
2 files changed, 110 insertions(+)
create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bf80fd901f61..03ac2e665241 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1312,6 +1312,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
wm8850-w70v2.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
+ zynq-ebaz4205.dtb \
zynq-microzed.dtb \
zynq-parallella.dtb \
zynq-zc702.dtb \
diff --git a/arch/arm/boot/dts/zynq-ebaz4205.dts b/arch/arm/boot/dts/zynq-ebaz4205.dts
new file mode 100644
index 000000000000..e802d4ae8804
--- /dev/null
+++ b/arch/arm/boot/dts/zynq-ebaz4205.dts
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Michael Walle <[email protected]>
+ */
+/dts-v1/;
+/include/ "zynq-7000.dtsi"
+
+/ {
+ model = "Ebang EBAZ4205";
+ compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
+
+ aliases {
+ ethernet0 = &gem0;
+ serial0 = &uart1;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x10000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&clkc {
+ ps-clk-frequency = <33333333>;
+ fclk-enable = <8>;
+};
+
+&gem0 {
+ status = "okay";
+ phy-mode = "mii";
+ phy-handle = <&phy>;
+
+ /* PHY clock */
+ assigned-clocks = <&clkc 18>;
+ assigned-clock-rates = <25000000>;
+
+ phy: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&pinctrl0 {
+ pinctrl_sdhci0_default: sdhci0-default {
+ mux {
+ groups = "sdio0_2_grp";
+ function = "sdio0";
+ };
+
+ conf {
+ groups = "sdio0_2_grp";
+ io-standard = <3>;
+ slew-rate = <0>;
+ bias-disable;
+ };
+
+ mux-cd {
+ groups = "gpio0_34_grp";
+ function = "sdio0_cd";
+ };
+
+ conf-cd {
+ groups = "gpio0_34_grp";
+ io-standard = <3>;
+ slew-rate = <0>;
+ bias-high-impedance;
+ bias-pull-up;
+ };
+ };
+
+ pinctrl_uart1_default: uart1-default {
+ mux {
+ groups = "uart1_4_grp";
+ function = "uart1";
+ };
+
+ conf {
+ groups = "uart1_4_grp";
+ io-standard = <3>;
+ slew-rate = <0>;
+ };
+
+ conf-rx {
+ pins = "MIO25";
+ bias-high-impedance;
+ };
+
+ conf-tx {
+ pins = "MIO24";
+ bias-disable;
+ };
+ };
+};
+
+&sdhci0 {
+ status = "okay";
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdhci0_default>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+};
--
2.20.1
Hi
On 1/20/21 8:40 PM, Michael Walle wrote:
> Add support for the Ebang EBAZ4205 board. This board was once used as a
> control board for a bitcoin mining device. Nowawdays it is sold as a cheap
> Zynq-7000 eval board.
>
> Michael Walle (3):
> dt-bindings: add ebang vendor prefix
> dt-bindings: arm: add Ebang EBAZ4205 board
> ARM: dts: add Ebang EBAZ4205 device tree
>
> .../devicetree/bindings/arm/xilinx.yaml | 1 +
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/zynq-ebaz4205.dts | 109 ++++++++++++++++++
> 4 files changed, 113 insertions(+)
> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>
any link with schematics?
I will let dt guys to comment 1/3 but series look good to me.
The board doesn't look interesting from description point of view that's
why all the time thinking if makes sense to add it to kernel.
Thanks,
Michal
Hi Michal,
Am 2021-01-21 10:25, schrieb Michal Simek:
> On 1/20/21 8:40 PM, Michael Walle wrote:
>> Add support for the Ebang EBAZ4205 board. This board was once used as
>> a
>> control board for a bitcoin mining device. Nowawdays it is sold as a
>> cheap
>> Zynq-7000 eval board.
>>
>> Michael Walle (3):
>> dt-bindings: add ebang vendor prefix
>> dt-bindings: arm: add Ebang EBAZ4205 board
>> ARM: dts: add Ebang EBAZ4205 device tree
>>
>> .../devicetree/bindings/arm/xilinx.yaml | 1 +
>> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
>> arch/arm/boot/dts/Makefile | 1 +
>> arch/arm/boot/dts/zynq-ebaz4205.dts | 109
>> ++++++++++++++++++
>> 4 files changed, 113 insertions(+)
>> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>>
>
> any link with schematics?
https://github.com/xjtuecho/EBAZ4205, looks like these are
reverse engineered (from a layout file?) though.
> I will let dt guys to comment 1/3 but series look good to me.
> The board doesn't look interesting from description point of view
> that's
> why all the time thinking if makes sense to add it to kernel.
What do you want to tell me? That for the time being, it didn't
appear to you to add the board yourself - or do you thing it
doesn't make sense at all. If its the latter, what would be
actual reason to have a board in mainline?
-michael
Hi,
On 1/21/21 10:35 AM, Michael Walle wrote:
> Hi Michal,
>
> Am 2021-01-21 10:25, schrieb Michal Simek:
>> On 1/20/21 8:40 PM, Michael Walle wrote:
>>> Add support for the Ebang EBAZ4205 board. This board was once used as a
>>> control board for a bitcoin mining device. Nowawdays it is sold as a
>>> cheap
>>> Zynq-7000 eval board.
>>>
>>> Michael Walle (3):
>>> dt-bindings: add ebang vendor prefix
>>> dt-bindings: arm: add Ebang EBAZ4205 board
>>> ARM: dts: add Ebang EBAZ4205 device tree
>>>
>>> .../devicetree/bindings/arm/xilinx.yaml | 1 +
>>> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
>>> arch/arm/boot/dts/Makefile | 1 +
>>> arch/arm/boot/dts/zynq-ebaz4205.dts | 109 ++++++++++++++++++
>>> 4 files changed, 113 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>>>
>>
>> any link with schematics?
>
> https://github.com/xjtuecho/EBAZ4205, looks like these are
> reverse engineered (from a layout file?) though.
Interesting but at least something.
>
>> I will let dt guys to comment 1/3 but series look good to me.
>> The board doesn't look interesting from description point of view that's
>> why all the time thinking if makes sense to add it to kernel.
>
> What do you want to tell me? That for the time being, it didn't
> appear to you to add the board yourself - or do you thing it
> doesn't make sense at all. If its the latter, what would be
> actual reason to have a board in mainline?
I have bad experience with for example Avnet boards which people add and
none is really updating them and they are in the same state for years.
Long time ago we agreed that doesn't make sense to describe PL in
upstream projects and we only describe PS part. It means you likely miss
several things which are useful and the reason for using these SoCs is PL.
As you likely know Xilinx has Versal device and I didn't push any device
tree to any upstream project and thinking not to add any description for
boards and stay in sort of space that "virtual" description for SoC
should be enough. Maybe just versal.dtsi and one kitchen sink DT should
be added but not description for all boards.
The same is if make sense to push all DTs for all standard xilinx zynqmp
evaluation boards. If there is something interesting/new I thought it
makes sense to add it as pattern to follow. But for boards which looks
very similar from PS point of view I don't think there is real value to
add and invest time for maintaining.
Back to your case. Board is cheap which is not all the time case for any
xilinx board but you have only uart, sd and partially described ethernet
which doesn't work without PL. Is it worth to have this described?
Especially when it is visible that you need to describe custom PL and DT
overlays are not solid yet.
Thanks,
Michal
Hi,
Am 2021-01-21 10:57, schrieb Michal Simek:
> Hi,
>
> On 1/21/21 10:35 AM, Michael Walle wrote:
>> Hi Michal,
>>
>> Am 2021-01-21 10:25, schrieb Michal Simek:
>>> On 1/20/21 8:40 PM, Michael Walle wrote:
>>>> Add support for the Ebang EBAZ4205 board. This board was once used
>>>> as a
>>>> control board for a bitcoin mining device. Nowawdays it is sold as a
>>>> cheap
>>>> Zynq-7000 eval board.
>>>>
>>>> Michael Walle (3):
>>>> dt-bindings: add ebang vendor prefix
>>>> dt-bindings: arm: add Ebang EBAZ4205 board
>>>> ARM: dts: add Ebang EBAZ4205 device tree
>>>>
>>>> .../devicetree/bindings/arm/xilinx.yaml | 1 +
>>>> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
>>>> arch/arm/boot/dts/Makefile | 1 +
>>>> arch/arm/boot/dts/zynq-ebaz4205.dts | 109
>>>> ++++++++++++++++++
>>>> 4 files changed, 113 insertions(+)
>>>> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>>>>
>>>
>>> any link with schematics?
>>
>> https://github.com/xjtuecho/EBAZ4205, looks like these are
>> reverse engineered (from a layout file?) though.
>
> Interesting but at least something.
>
>>
>>> I will let dt guys to comment 1/3 but series look good to me.
>>> The board doesn't look interesting from description point of view
>>> that's
>>> why all the time thinking if makes sense to add it to kernel.
>>
>> What do you want to tell me? That for the time being, it didn't
>> appear to you to add the board yourself - or do you thing it
>> doesn't make sense at all. If its the latter, what would be
>> actual reason to have a board in mainline?
>
> I have bad experience with for example Avnet boards which people add
> and
> none is really updating them and they are in the same state for years.
Wouldn't it be better then to pull the plug at some time and remove
these
boards.
TBH I was a bit disappointed by your statement. It sounded like "nah
this board isn't worth it". Esp. because it is just one (small) file.
But more below.
> Long time ago we agreed that doesn't make sense to describe PL in
> upstream projects and we only describe PS part. It means you likely
> miss
> several things which are useful and the reason for using these SoCs is
> PL.
>
> As you likely know Xilinx has Versal device and I didn't push any
> device
> tree to any upstream project and thinking not to add any description
> for
> boards and stay in sort of space that "virtual" description for SoC
> should be enough. Maybe just versal.dtsi and one kitchen sink DT should
> be added but not description for all boards.
>
> The same is if make sense to push all DTs for all standard xilinx
> zynqmp
> evaluation boards. If there is something interesting/new I thought it
> makes sense to add it as pattern to follow. But for boards which looks
> very similar from PS point of view I don't think there is real value to
> add and invest time for maintaining.
>
> Back to your case. Board is cheap which is not all the time case for
> any
> xilinx board but you have only uart, sd and partially described
> ethernet
> which doesn't work without PL. Is it worth to have this described?
I got your point. But it is at least a jump start for the users if that
board boots out of the box. And yes, its unfortunate, that ethernet
just works if the PL is configured. This is already done by the
bootloader, because there I do have the same problem.
> Especially when it is visible that you need to describe custom PL and
> DT
> overlays are not solid yet.
>
> Thanks,
> Michal
--
-michael
Hi,
On 1/21/21 11:13 AM, Michael Walle wrote:
> Hi,
>
> Am 2021-01-21 10:57, schrieb Michal Simek:
>> Hi,
>>
>> On 1/21/21 10:35 AM, Michael Walle wrote:
>>> Hi Michal,
>>>
>>> Am 2021-01-21 10:25, schrieb Michal Simek:
>>>> On 1/20/21 8:40 PM, Michael Walle wrote:
>>>>> Add support for the Ebang EBAZ4205 board. This board was once used
>>>>> as a
>>>>> control board for a bitcoin mining device. Nowawdays it is sold as a
>>>>> cheap
>>>>> Zynq-7000 eval board.
>>>>>
>>>>> Michael Walle (3):
>>>>> dt-bindings: add ebang vendor prefix
>>>>> dt-bindings: arm: add Ebang EBAZ4205 board
>>>>> ARM: dts: add Ebang EBAZ4205 device tree
>>>>>
>>>>> .../devicetree/bindings/arm/xilinx.yaml | 1 +
>>>>> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
>>>>> arch/arm/boot/dts/Makefile | 1 +
>>>>> arch/arm/boot/dts/zynq-ebaz4205.dts | 109
>>>>> ++++++++++++++++++
>>>>> 4 files changed, 113 insertions(+)
>>>>> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>>>>>
>>>>
>>>> any link with schematics?
>>>
>>> https://github.com/xjtuecho/EBAZ4205, looks like these are
>>> reverse engineered (from a layout file?) though.
>>
>> Interesting but at least something.
>>
>>>
>>>> I will let dt guys to comment 1/3 but series look good to me.
>>>> The board doesn't look interesting from description point of view
>>>> that's
>>>> why all the time thinking if makes sense to add it to kernel.
>>>
>>> What do you want to tell me? That for the time being, it didn't
>>> appear to you to add the board yourself - or do you thing it
>>> doesn't make sense at all. If its the latter, what would be
>>> actual reason to have a board in mainline?
>>
>> I have bad experience with for example Avnet boards which people add and
>> none is really updating them and they are in the same state for years.
>
> Wouldn't it be better then to pull the plug at some time and remove these
> boards.
>
> TBH I was a bit disappointed by your statement. It sounded like "nah
> this board isn't worth it". Esp. because it is just one (small) file.
> But more below.
>
>> Long time ago we agreed that doesn't make sense to describe PL in
>> upstream projects and we only describe PS part. It means you likely miss
>> several things which are useful and the reason for using these SoCs is
>> PL.
>>
>> As you likely know Xilinx has Versal device and I didn't push any device
>> tree to any upstream project and thinking not to add any description for
>> boards and stay in sort of space that "virtual" description for SoC
>> should be enough. Maybe just versal.dtsi and one kitchen sink DT should
>> be added but not description for all boards.
>>
>> The same is if make sense to push all DTs for all standard xilinx zynqmp
>> evaluation boards. If there is something interesting/new I thought it
>> makes sense to add it as pattern to follow. But for boards which looks
>> very similar from PS point of view I don't think there is real value to
>> add and invest time for maintaining.
>>
>> Back to your case. Board is cheap which is not all the time case for any
>> xilinx board but you have only uart, sd and partially described ethernet
>> which doesn't work without PL. Is it worth to have this described?
>
> I got your point. But it is at least a jump start for the users if that
> board boots out of the box. And yes, its unfortunate, that ethernet
> just works if the PL is configured. This is already done by the
> bootloader, because there I do have the same problem.
Zynq/ZynqMP boards can use U-Boot SPL. "Advantage" of this solution
especially for Zynq is that in u-boot there is open a way for adding
ps7_init file which is determined by device tree name.
I think it would make sense to add these DTs and also ps7_init to U-Boot
project and wire it up with zynq_virt platform and then you can boot
Linux with using U-Boot's DT pointed by $fdtcontroladdr.
Then you will get support from scratch to be able to boot.
Thanks,
Michal
Hi,
Am 2021-01-21 11:23, schrieb Michal Simek:
>>> Back to your case. Board is cheap which is not all the time case for
>>> any
>>> xilinx board but you have only uart, sd and partially described
>>> ethernet
>>> which doesn't work without PL. Is it worth to have this described?
>>
>> I got your point. But it is at least a jump start for the users if
>> that
>> board boots out of the box. And yes, its unfortunate, that ethernet
>> just works if the PL is configured. This is already done by the
>> bootloader, because there I do have the same problem.
>
> Zynq/ZynqMP boards can use U-Boot SPL. "Advantage" of this solution
> especially for Zynq is that in u-boot there is open a way for adding
> ps7_init file which is determined by device tree name.
> I think it would make sense to add these DTs and also ps7_init to
> U-Boot
> project and wire it up with zynq_virt platform and then you can boot
> Linux with using U-Boot's DT pointed by $fdtcontroladdr.
> Then you will get support from scratch to be able to boot.
I already have patches for u-boot (using SPL). But my impression was
that linux is the master for the device trees. Esp. if there are some
problems with the board its often useful to have an in-tree device
tree.
What is the difference between this board and the other zynq boards
in the kernel?
In any case, please make this decision now: will you accept this
device tree or not?
-michael
On 1/21/21 11:41 AM, Michael Walle wrote:
> Hi,
>
> Am 2021-01-21 11:23, schrieb Michal Simek:
>>>> Back to your case. Board is cheap which is not all the time case for
>>>> any
>>>> xilinx board but you have only uart, sd and partially described
>>>> ethernet
>>>> which doesn't work without PL. Is it worth to have this described?
>>>
>>> I got your point. But it is at least a jump start for the users if that
>>> board boots out of the box. And yes, its unfortunate, that ethernet
>>> just works if the PL is configured. This is already done by the
>>> bootloader, because there I do have the same problem.
>>
>> Zynq/ZynqMP boards can use U-Boot SPL. "Advantage" of this solution
>> especially for Zynq is that in u-boot there is open a way for adding
>> ps7_init file which is determined by device tree name.
>> I think it would make sense to add these DTs and also ps7_init to U-Boot
>> project and wire it up with zynq_virt platform and then you can boot
>> Linux with using U-Boot's DT pointed by $fdtcontroladdr.
>> Then you will get support from scratch to be able to boot.
>
> I already have patches for u-boot (using SPL). But my impression was
> that linux is the master for the device trees. Esp. if there are some
> problems with the board its often useful to have an in-tree device
> tree.
>
> What is the difference between this board and the other zynq boards
> in the kernel?
>
> In any case, please make this decision now: will you accept this
> device tree or not?
If you promise to regularly test it I am fine with it.
Thanks,
Michal
Am 2021-01-21 14:16, schrieb Michal Simek:
> On 1/21/21 11:41 AM, Michael Walle wrote:
>> Am 2021-01-21 11:23, schrieb Michal Simek:
>>>>> Back to your case. Board is cheap which is not all the time case
>>>>> for
>>>>> any
>>>>> xilinx board but you have only uart, sd and partially described
>>>>> ethernet
>>>>> which doesn't work without PL. Is it worth to have this described?
>>>>
>>>> I got your point. But it is at least a jump start for the users if
>>>> that
>>>> board boots out of the box. And yes, its unfortunate, that ethernet
>>>> just works if the PL is configured. This is already done by the
>>>> bootloader, because there I do have the same problem.
>>>
>>> Zynq/ZynqMP boards can use U-Boot SPL. "Advantage" of this solution
>>> especially for Zynq is that in u-boot there is open a way for adding
>>> ps7_init file which is determined by device tree name.
>>> I think it would make sense to add these DTs and also ps7_init to
>>> U-Boot
>>> project and wire it up with zynq_virt platform and then you can boot
>>> Linux with using U-Boot's DT pointed by $fdtcontroladdr.
>>> Then you will get support from scratch to be able to boot.
>>
>> I already have patches for u-boot (using SPL). But my impression was
>> that linux is the master for the device trees. Esp. if there are some
>> problems with the board its often useful to have an in-tree device
>> tree.
>>
>> What is the difference between this board and the other zynq boards
>> in the kernel?
>>
>> In any case, please make this decision now: will you accept this
>> device tree or not?
>
> If you promise to regularly test it I am fine with it.
I might even integrate it into our lava lab.
-michael
On 1/20/21 8:40 PM, Michael Walle wrote:
> Add support for the Ebang EBAZ4205 board. This board was once used as a
> control board for a bitcoin mining device. Nowawdays it is sold as a cheap
> Zynq-7000 eval board.
>
> Michael Walle (3):
> dt-bindings: add ebang vendor prefix
> dt-bindings: arm: add Ebang EBAZ4205 board
> ARM: dts: add Ebang EBAZ4205 device tree
>
> .../devicetree/bindings/arm/xilinx.yaml | 1 +
> .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/zynq-ebaz4205.dts | 109 ++++++++++++++++++
> 4 files changed, 113 insertions(+)
> create mode 100644 arch/arm/boot/dts/zynq-ebaz4205.dts
>
Applied all.
Thanks,
Michal
On Wed, 20 Jan 2021 20:40:31 +0100, Michael Walle wrote:
> Add vendor prefix for Zhejiang Ebang Communication Co., Ltd.
>
> Signed-off-by: Michael Walle <[email protected]>
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Rob Herring <[email protected]>