Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.
[ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
[ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
[ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
...
Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <[email protected]>
---
drivers/soc/mediatek/mt8173-pm-domains.h | 10 ++++++++++
drivers/soc/mediatek/mtk-pm-domains.c | 6 +++++-
drivers/soc/mediatek/mtk-pm-domains.h | 2 ++
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
index 3e8ee5dabb43..654c717e5467 100644
--- a/drivers/soc/mediatek/mt8173-pm-domains.h
+++ b/drivers/soc/mediatek/mt8173-pm-domains.h
@@ -12,24 +12,28 @@
static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
[MT8173_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
.sta_mask = PWR_STATUS_VDEC,
.ctl_offs = SPM_VDE_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8173_POWER_DOMAIN_VENC] = {
+ .name = "venc",
.sta_mask = PWR_STATUS_VENC,
.ctl_offs = SPM_VEN_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8173_POWER_DOMAIN_ISP] = {
+ .name = "isp",
.sta_mask = PWR_STATUS_ISP,
.ctl_offs = SPM_ISP_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(13, 12),
},
[MT8173_POWER_DOMAIN_MM] = {
+ .name = "mm",
.sta_mask = PWR_STATUS_DISP,
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -40,18 +44,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
},
},
[MT8173_POWER_DOMAIN_VENC_LT] = {
+ .name = "venc_lt",
.sta_mask = PWR_STATUS_VENC_LT,
.ctl_offs = SPM_VEN2_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8173_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
.sta_mask = PWR_STATUS_AUDIO,
.ctl_offs = SPM_AUDIO_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8173_POWER_DOMAIN_USB] = {
+ .name = "usb",
.sta_mask = PWR_STATUS_USB,
.ctl_offs = SPM_USB_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -59,18 +66,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8173_POWER_DOMAIN_MFG_ASYNC] = {
+ .name = "mfg_async",
.sta_mask = PWR_STATUS_MFG_ASYNC,
.ctl_offs = SPM_MFG_ASYNC_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = 0,
},
[MT8173_POWER_DOMAIN_MFG_2D] = {
+ .name = "mfg_2d",
.sta_mask = PWR_STATUS_MFG_2D,
.ctl_offs = SPM_MFG_2D_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(13, 12),
},
[MT8173_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
.sta_mask = PWR_STATUS_MFG,
.ctl_offs = SPM_MFG_PWR_CON,
.sram_pdn_bits = GENMASK(13, 8),
diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index b7f697666bdd..694d6ea6de1d 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
goto err_unprepare_subsys_clocks;
}
- pd->genpd.name = node->name;
+ if (!pd->data->name)
+ pd->genpd.name = node->name;
+ else
+ pd->genpd.name = pd->data->name;
+
pd->genpd.power_off = scpsys_power_off;
pd->genpd.power_on = scpsys_power_on;
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index 141dc76054e6..21a4e113bbec 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -76,6 +76,7 @@ struct scpsys_bus_prot_data {
/**
* struct scpsys_domain_data - scp domain data for power on/off flow
+ * @name: The name of the power domain.
* @sta_mask: The mask for power on/off status bit.
* @ctl_offs: The offset for main power control register.
* @sram_pdn_bits: The mask for sram power control bits.
@@ -85,6 +86,7 @@ struct scpsys_bus_prot_data {
* @bp_smi: bus protection for smi subsystem
*/
struct scpsys_domain_data {
+ const char *name;
u32 sta_mask;
int ctl_offs;
u32 sram_pdn_bits;
--
2.30.0
Add the power domains names for the mt8167 SoC.
Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra <[email protected]>
---
drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h b/drivers/soc/mediatek/mt8167-pm-domains.h
index ad0b8dfa0527..15559ddf26e4 100644
--- a/drivers/soc/mediatek/mt8167-pm-domains.h
+++ b/drivers/soc/mediatek/mt8167-pm-domains.h
@@ -15,6 +15,7 @@
static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
[MT8167_POWER_DOMAIN_MM] = {
+ .name = "mm",
.sta_mask = PWR_STATUS_DISP,
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -26,6 +27,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
.sta_mask = PWR_STATUS_VDEC,
.ctl_offs = SPM_VDE_PWR_CON,
.sram_pdn_bits = GENMASK(8, 8),
@@ -33,6 +35,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_ISP] = {
+ .name = "isp",
.sta_mask = PWR_STATUS_ISP,
.ctl_offs = SPM_ISP_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -40,6 +43,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_MFG_ASYNC] = {
+ .name = "mfg_async",
.sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
.ctl_offs = SPM_MFG_ASYNC_PWR_CON,
.sram_pdn_bits = 0,
@@ -50,18 +54,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
},
},
[MT8167_POWER_DOMAIN_MFG_2D] = {
+ .name = "mfg_2d",
.sta_mask = MT8167_PWR_STATUS_MFG_2D,
.ctl_offs = SPM_MFG_2D_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8167_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
.sta_mask = PWR_STATUS_MFG,
.ctl_offs = SPM_MFG_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8167_POWER_DOMAIN_CONN] = {
+ .name = "conn",
.sta_mask = PWR_STATUS_CONN,
.ctl_offs = SPM_CONN_PWR_CON,
.sram_pdn_bits = GENMASK(8, 8),
--
2.30.0
Add the power domains names for the mt8192 SoC.
Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
Signed-off-by: Enric Balletbo i Serra <[email protected]>
---
drivers/soc/mediatek/mt8192-pm-domains.h | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h b/drivers/soc/mediatek/mt8192-pm-domains.h
index 0fdf6dc6231f..543dda70de01 100644
--- a/drivers/soc/mediatek/mt8192-pm-domains.h
+++ b/drivers/soc/mediatek/mt8192-pm-domains.h
@@ -12,6 +12,7 @@
static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
[MT8192_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
.sta_mask = BIT(21),
.ctl_offs = 0x0354,
.sram_pdn_bits = GENMASK(8, 8),
@@ -24,6 +25,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_CONN] = {
+ .name = "conn",
.sta_mask = PWR_STATUS_CONN,
.ctl_offs = 0x0304,
.sram_pdn_bits = 0,
@@ -45,12 +47,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
.caps = MTK_SCPD_KEEP_DEFAULT_OFF,
},
[MT8192_POWER_DOMAIN_MFG0] = {
+ .name = "mfg0",
.sta_mask = BIT(2),
.ctl_offs = 0x0308,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_MFG1] = {
+ .name = "mfg1",
.sta_mask = BIT(3),
.ctl_offs = 0x030c,
.sram_pdn_bits = GENMASK(8, 8),
@@ -75,36 +79,42 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_MFG2] = {
+ .name = "mfg2",
.sta_mask = BIT(4),
.ctl_offs = 0x0310,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_MFG3] = {
+ .name = "mfg3",
.sta_mask = BIT(5),
.ctl_offs = 0x0314,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_MFG4] = {
+ .name = "mfg4",
.sta_mask = BIT(6),
.ctl_offs = 0x0318,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_MFG5] = {
+ .name = "mfg5",
.sta_mask = BIT(7),
.ctl_offs = 0x031c,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_MFG6] = {
+ .name = "mfg6",
.sta_mask = BIT(8),
.ctl_offs = 0x0320,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_DISP] = {
+ .name = "disp",
.sta_mask = BIT(20),
.ctl_offs = 0x0350,
.sram_pdn_bits = GENMASK(8, 8),
@@ -133,6 +143,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_IPE] = {
+ .name = "ipe",
.sta_mask = BIT(14),
.ctl_offs = 0x0338,
.sram_pdn_bits = GENMASK(8, 8),
@@ -149,6 +160,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_ISP] = {
+ .name = "isp",
.sta_mask = BIT(12),
.ctl_offs = 0x0330,
.sram_pdn_bits = GENMASK(8, 8),
@@ -165,6 +177,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_ISP2] = {
+ .name = "isp2",
.sta_mask = BIT(13),
.ctl_offs = 0x0334,
.sram_pdn_bits = GENMASK(8, 8),
@@ -181,6 +194,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_MDP] = {
+ .name = "mdp",
.sta_mask = BIT(19),
.ctl_offs = 0x034c,
.sram_pdn_bits = GENMASK(8, 8),
@@ -197,6 +211,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_VENC] = {
+ .name = "venc",
.sta_mask = BIT(17),
.ctl_offs = 0x0344,
.sram_pdn_bits = GENMASK(8, 8),
@@ -213,6 +228,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
.sta_mask = BIT(15),
.ctl_offs = 0x033c,
.sram_pdn_bits = GENMASK(8, 8),
@@ -229,12 +245,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_VDEC2] = {
+ .name = "vdec2",
.sta_mask = BIT(16),
.ctl_offs = 0x0340,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_CAM] = {
+ .name = "cam",
.sta_mask = BIT(23),
.ctl_offs = 0x035c,
.sram_pdn_bits = GENMASK(8, 8),
@@ -263,18 +281,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
},
},
[MT8192_POWER_DOMAIN_CAM_RAWA] = {
+ .name = "cam_rawa",
.sta_mask = BIT(24),
.ctl_offs = 0x0360,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_CAM_RAWB] = {
+ .name = "cam_rawb",
.sta_mask = BIT(25),
.ctl_offs = 0x0364,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8192_POWER_DOMAIN_CAM_RAWC] = {
+ .name = "cam_rawc",
.sta_mask = BIT(26),
.ctl_offs = 0x0368,
.sram_pdn_bits = GENMASK(8, 8),
--
2.30.0
Add the power domains names for the mt8183 SoC. This removes the debugfs
errors like the following:
debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
Signed-off-by: Enric Balletbo i Serra <[email protected]>
---
drivers/soc/mediatek/mt8183-pm-domains.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/drivers/soc/mediatek/mt8183-pm-domains.h b/drivers/soc/mediatek/mt8183-pm-domains.h
index aa5230e6c12f..98a9940d05fb 100644
--- a/drivers/soc/mediatek/mt8183-pm-domains.h
+++ b/drivers/soc/mediatek/mt8183-pm-domains.h
@@ -12,12 +12,14 @@
static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
[MT8183_POWER_DOMAIN_AUDIO] = {
+ .name = "audio",
.sta_mask = PWR_STATUS_AUDIO,
.ctl_offs = 0x0314,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8183_POWER_DOMAIN_CONN] = {
+ .name = "conn",
.sta_mask = PWR_STATUS_CONN,
.ctl_offs = 0x032c,
.sram_pdn_bits = 0,
@@ -28,12 +30,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_MFG_ASYNC] = {
+ .name = "mfg_async",
.sta_mask = PWR_STATUS_MFG_ASYNC,
.ctl_offs = 0x0334,
.sram_pdn_bits = 0,
.sram_pdn_ack_bits = 0,
},
[MT8183_POWER_DOMAIN_MFG] = {
+ .name = "mfg",
.sta_mask = PWR_STATUS_MFG,
.ctl_offs = 0x0338,
.sram_pdn_bits = GENMASK(8, 8),
@@ -41,18 +45,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
.caps = MTK_SCPD_DOMAIN_SUPPLY,
},
[MT8183_POWER_DOMAIN_MFG_CORE0] = {
+ .name = "mfg_core0",
.sta_mask = BIT(7),
.ctl_offs = 0x034c,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8183_POWER_DOMAIN_MFG_CORE1] = {
+ .name = "mfg_core1",
.sta_mask = BIT(20),
.ctl_offs = 0x0310,
.sram_pdn_bits = GENMASK(8, 8),
.sram_pdn_ack_bits = GENMASK(12, 12),
},
[MT8183_POWER_DOMAIN_MFG_2D] = {
+ .name = "mfg_2d",
.sta_mask = PWR_STATUS_MFG_2D,
.ctl_offs = 0x0348,
.sram_pdn_bits = GENMASK(8, 8),
@@ -65,6 +72,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_DISP] = {
+ .name = "disp",
.sta_mask = PWR_STATUS_DISP,
.ctl_offs = 0x030c,
.sram_pdn_bits = GENMASK(8, 8),
@@ -83,6 +91,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_CAM] = {
+ .name = "cam",
.sta_mask = BIT(25),
.ctl_offs = 0x0344,
.sram_pdn_bits = GENMASK(9, 8),
@@ -105,6 +114,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_ISP] = {
+ .name = "isp",
.sta_mask = PWR_STATUS_ISP,
.ctl_offs = 0x0308,
.sram_pdn_bits = GENMASK(9, 8),
@@ -127,6 +137,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_VDEC] = {
+ .name = "vdec",
.sta_mask = BIT(31),
.ctl_offs = 0x0300,
.sram_pdn_bits = GENMASK(8, 8),
@@ -139,6 +150,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_VENC] = {
+ .name = "venc",
.sta_mask = PWR_STATUS_VENC,
.ctl_offs = 0x0304,
.sram_pdn_bits = GENMASK(11, 8),
@@ -151,6 +163,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_VPU_TOP] = {
+ .name = "vpu_top",
.sta_mask = BIT(26),
.ctl_offs = 0x0324,
.sram_pdn_bits = GENMASK(8, 8),
@@ -177,6 +190,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
},
},
[MT8183_POWER_DOMAIN_VPU_CORE0] = {
+ .name = "vpu_core0",
.sta_mask = BIT(27),
.ctl_offs = 0x33c,
.sram_pdn_bits = GENMASK(11, 8),
@@ -194,6 +208,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
.caps = MTK_SCPD_SRAM_ISO,
},
[MT8183_POWER_DOMAIN_VPU_CORE1] = {
+ .name = "vpu_core1",
.sta_mask = BIT(28),
.ctl_offs = 0x0340,
.sram_pdn_bits = GENMASK(11, 8),
--
2.30.0
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
<[email protected]> wrote:
>
> Add the power domains names for the mt8183 SoC. This removes the debugfs
> errors like the following:
>
> debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
>
> Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183")
> Signed-off-by: Enric Balletbo i Serra <[email protected]>
Reviewed-by: Hsin-Yi Wang <[email protected]>
> ---
>
> drivers/soc/mediatek/mt8183-pm-domains.h | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8183-pm-domains.h b/drivers/soc/mediatek/mt8183-pm-domains.h
> index aa5230e6c12f..98a9940d05fb 100644
> --- a/drivers/soc/mediatek/mt8183-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8183-pm-domains.h
> @@ -12,12 +12,14 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> [MT8183_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = PWR_STATUS_AUDIO,
> .ctl_offs = 0x0314,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8183_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = 0x032c,
> .sram_pdn_bits = 0,
> @@ -28,12 +30,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = PWR_STATUS_MFG_ASYNC,
> .ctl_offs = 0x0334,
> .sram_pdn_bits = 0,
> .sram_pdn_ack_bits = 0,
> },
> [MT8183_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = 0x0338,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -41,18 +45,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> .caps = MTK_SCPD_DOMAIN_SUPPLY,
> },
> [MT8183_POWER_DOMAIN_MFG_CORE0] = {
> + .name = "mfg_core0",
> .sta_mask = BIT(7),
> .ctl_offs = 0x034c,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8183_POWER_DOMAIN_MFG_CORE1] = {
> + .name = "mfg_core1",
> .sta_mask = BIT(20),
> .ctl_offs = 0x0310,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8183_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = PWR_STATUS_MFG_2D,
> .ctl_offs = 0x0348,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -65,6 +72,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_DISP] = {
> + .name = "disp",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = 0x030c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -83,6 +91,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_CAM] = {
> + .name = "cam",
> .sta_mask = BIT(25),
> .ctl_offs = 0x0344,
> .sram_pdn_bits = GENMASK(9, 8),
> @@ -105,6 +114,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = 0x0308,
> .sram_pdn_bits = GENMASK(9, 8),
> @@ -127,6 +137,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = BIT(31),
> .ctl_offs = 0x0300,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -139,6 +150,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = PWR_STATUS_VENC,
> .ctl_offs = 0x0304,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -151,6 +163,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VPU_TOP] = {
> + .name = "vpu_top",
> .sta_mask = BIT(26),
> .ctl_offs = 0x0324,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -177,6 +190,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> },
> },
> [MT8183_POWER_DOMAIN_VPU_CORE0] = {
> + .name = "vpu_core0",
> .sta_mask = BIT(27),
> .ctl_offs = 0x33c,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -194,6 +208,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = {
> .caps = MTK_SCPD_SRAM_ISO,
> },
> [MT8183_POWER_DOMAIN_VPU_CORE1] = {
> + .name = "vpu_core1",
> .sta_mask = BIT(28),
> .ctl_offs = 0x0340,
> .sram_pdn_bits = GENMASK(11, 8),
> --
> 2.30.0
>
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
<[email protected]> wrote:
>
> Add the power domains names for the mt8192 SoC.
>
> Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192")
> Signed-off-by: Enric Balletbo i Serra <[email protected]>
Reviewed-by: Hsin-Yi Wang <[email protected]>
> ---
>
> drivers/soc/mediatek/mt8192-pm-domains.h | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8192-pm-domains.h b/drivers/soc/mediatek/mt8192-pm-domains.h
> index 0fdf6dc6231f..543dda70de01 100644
> --- a/drivers/soc/mediatek/mt8192-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8192-pm-domains.h
> @@ -12,6 +12,7 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> [MT8192_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = BIT(21),
> .ctl_offs = 0x0354,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -24,6 +25,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = 0x0304,
> .sram_pdn_bits = 0,
> @@ -45,12 +47,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> .caps = MTK_SCPD_KEEP_DEFAULT_OFF,
> },
> [MT8192_POWER_DOMAIN_MFG0] = {
> + .name = "mfg0",
> .sta_mask = BIT(2),
> .ctl_offs = 0x0308,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG1] = {
> + .name = "mfg1",
> .sta_mask = BIT(3),
> .ctl_offs = 0x030c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -75,36 +79,42 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_MFG2] = {
> + .name = "mfg2",
> .sta_mask = BIT(4),
> .ctl_offs = 0x0310,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG3] = {
> + .name = "mfg3",
> .sta_mask = BIT(5),
> .ctl_offs = 0x0314,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG4] = {
> + .name = "mfg4",
> .sta_mask = BIT(6),
> .ctl_offs = 0x0318,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG5] = {
> + .name = "mfg5",
> .sta_mask = BIT(7),
> .ctl_offs = 0x031c,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_MFG6] = {
> + .name = "mfg6",
> .sta_mask = BIT(8),
> .ctl_offs = 0x0320,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_DISP] = {
> + .name = "disp",
> .sta_mask = BIT(20),
> .ctl_offs = 0x0350,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -133,6 +143,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_IPE] = {
> + .name = "ipe",
> .sta_mask = BIT(14),
> .ctl_offs = 0x0338,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -149,6 +160,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = BIT(12),
> .ctl_offs = 0x0330,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -165,6 +177,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_ISP2] = {
> + .name = "isp2",
> .sta_mask = BIT(13),
> .ctl_offs = 0x0334,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -181,6 +194,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_MDP] = {
> + .name = "mdp",
> .sta_mask = BIT(19),
> .ctl_offs = 0x034c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -197,6 +211,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = BIT(17),
> .ctl_offs = 0x0344,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -213,6 +228,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = BIT(15),
> .ctl_offs = 0x033c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -229,12 +245,14 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_VDEC2] = {
> + .name = "vdec2",
> .sta_mask = BIT(16),
> .ctl_offs = 0x0340,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_CAM] = {
> + .name = "cam",
> .sta_mask = BIT(23),
> .ctl_offs = 0x035c,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -263,18 +281,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = {
> },
> },
> [MT8192_POWER_DOMAIN_CAM_RAWA] = {
> + .name = "cam_rawa",
> .sta_mask = BIT(24),
> .ctl_offs = 0x0360,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_CAM_RAWB] = {
> + .name = "cam_rawb",
> .sta_mask = BIT(25),
> .ctl_offs = 0x0364,
> .sram_pdn_bits = GENMASK(8, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8192_POWER_DOMAIN_CAM_RAWC] = {
> + .name = "cam_rawc",
> .sta_mask = BIT(26),
> .ctl_offs = 0x0368,
> .sram_pdn_bits = GENMASK(8, 8),
> --
> 2.30.0
>
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
<[email protected]> wrote:
>
> Add the power domains names to the power domain struct so we
> have meaningful name for every power domain. This also removes the
> following debugfs error message.
>
> [ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> [ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> [ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> ...
>
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Enric Balletbo i Serra <[email protected]>
Reviewed-by: Hsin-Yi Wang <[email protected]>
> ---
>
> drivers/soc/mediatek/mt8173-pm-domains.h | 10 ++++++++++
> drivers/soc/mediatek/mtk-pm-domains.c | 6 +++++-
> drivers/soc/mediatek/mtk-pm-domains.h | 2 ++
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
> index 3e8ee5dabb43..654c717e5467 100644
> --- a/drivers/soc/mediatek/mt8173-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8173-pm-domains.h
> @@ -12,24 +12,28 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> [MT8173_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8173_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = PWR_STATUS_VENC,
> .ctl_offs = SPM_VEN_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MM] = {
> + .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,18 +44,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> },
> },
> [MT8173_POWER_DOMAIN_VENC_LT] = {
> + .name = "venc_lt",
> .sta_mask = PWR_STATUS_VENC_LT,
> .ctl_offs = SPM_VEN2_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = PWR_STATUS_AUDIO,
> .ctl_offs = SPM_AUDIO_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_USB] = {
> + .name = "usb",
> .sta_mask = PWR_STATUS_USB,
> .ctl_offs = SPM_USB_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -59,18 +66,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8173_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = 0,
> },
> [MT8173_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(13, 8),
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index b7f697666bdd..694d6ea6de1d 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> goto err_unprepare_subsys_clocks;
> }
>
> - pd->genpd.name = node->name;
> + if (!pd->data->name)
> + pd->genpd.name = node->name;
> + else
> + pd->genpd.name = pd->data->name;
> +
> pd->genpd.power_off = scpsys_power_off;
> pd->genpd.power_on = scpsys_power_on;
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index 141dc76054e6..21a4e113bbec 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -76,6 +76,7 @@ struct scpsys_bus_prot_data {
>
> /**
> * struct scpsys_domain_data - scp domain data for power on/off flow
> + * @name: The name of the power domain.
> * @sta_mask: The mask for power on/off status bit.
> * @ctl_offs: The offset for main power control register.
> * @sram_pdn_bits: The mask for sram power control bits.
> @@ -85,6 +86,7 @@ struct scpsys_bus_prot_data {
> * @bp_smi: bus protection for smi subsystem
> */
> struct scpsys_domain_data {
> + const char *name;
> u32 sta_mask;
> int ctl_offs;
> u32 sram_pdn_bits;
> --
> 2.30.0
>
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
<[email protected]> wrote:
>
> Add the power domains names for the mt8167 SoC.
>
> Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
> Signed-off-by: Enric Balletbo i Serra <[email protected]>
Reviewed-by: Hsin-Yi Wang <[email protected]>
> ---
>
> drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h b/drivers/soc/mediatek/mt8167-pm-domains.h
> index ad0b8dfa0527..15559ddf26e4 100644
> --- a/drivers/soc/mediatek/mt8167-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8167-pm-domains.h
> @@ -15,6 +15,7 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> [MT8167_POWER_DOMAIN_MM] = {
> + .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -26,6 +27,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -33,6 +35,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,6 +43,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = 0,
> @@ -50,18 +54,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> },
> },
> [MT8167_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = MT8167_PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_CONN] = {
> + .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = SPM_CONN_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> --
> 2.30.0
>
On 25/02/2021 18:49, Enric Balletbo i Serra wrote:
> Add the power domains names to the power domain struct so we
> have meaningful name for every power domain. This also removes the
> following debugfs error message.
>
> [ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> [ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> [ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
> ...
>
> Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
> Signed-off-by: Enric Balletbo i Serra <[email protected]>
Whole series applied to v5.12-next/soc
Thanks a lot!
Matthias
> ---
>
> drivers/soc/mediatek/mt8173-pm-domains.h | 10 ++++++++++
> drivers/soc/mediatek/mtk-pm-domains.c | 6 +++++-
> drivers/soc/mediatek/mtk-pm-domains.h | 2 ++
> 3 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h
> index 3e8ee5dabb43..654c717e5467 100644
> --- a/drivers/soc/mediatek/mt8173-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8173-pm-domains.h
> @@ -12,24 +12,28 @@
>
> static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> [MT8173_POWER_DOMAIN_VDEC] = {
> + .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(12, 12),
> },
> [MT8173_POWER_DOMAIN_VENC] = {
> + .name = "venc",
> .sta_mask = PWR_STATUS_VENC,
> .ctl_offs = SPM_VEN_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_ISP] = {
> + .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MM] = {
> + .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,18 +44,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> },
> },
> [MT8173_POWER_DOMAIN_VENC_LT] = {
> + .name = "venc_lt",
> .sta_mask = PWR_STATUS_VENC_LT,
> .ctl_offs = SPM_VEN2_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_AUDIO] = {
> + .name = "audio",
> .sta_mask = PWR_STATUS_AUDIO,
> .ctl_offs = SPM_AUDIO_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8173_POWER_DOMAIN_USB] = {
> + .name = "usb",
> .sta_mask = PWR_STATUS_USB,
> .ctl_offs = SPM_USB_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -59,18 +66,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8173_POWER_DOMAIN_MFG_ASYNC] = {
> + .name = "mfg_async",
> .sta_mask = PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = 0,
> },
> [MT8173_POWER_DOMAIN_MFG_2D] = {
> + .name = "mfg_2d",
> .sta_mask = PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(13, 12),
> },
> [MT8173_POWER_DOMAIN_MFG] = {
> + .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(13, 8),
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
> index b7f697666bdd..694d6ea6de1d 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.c
> +++ b/drivers/soc/mediatek/mtk-pm-domains.c
> @@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
> goto err_unprepare_subsys_clocks;
> }
>
> - pd->genpd.name = node->name;
> + if (!pd->data->name)
> + pd->genpd.name = node->name;
> + else
> + pd->genpd.name = pd->data->name;
> +
> pd->genpd.power_off = scpsys_power_off;
> pd->genpd.power_on = scpsys_power_on;
>
> diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
> index 141dc76054e6..21a4e113bbec 100644
> --- a/drivers/soc/mediatek/mtk-pm-domains.h
> +++ b/drivers/soc/mediatek/mtk-pm-domains.h
> @@ -76,6 +76,7 @@ struct scpsys_bus_prot_data {
>
> /**
> * struct scpsys_domain_data - scp domain data for power on/off flow
> + * @name: The name of the power domain.
> * @sta_mask: The mask for power on/off status bit.
> * @ctl_offs: The offset for main power control register.
> * @sram_pdn_bits: The mask for sram power control bits.
> @@ -85,6 +86,7 @@ struct scpsys_bus_prot_data {
> * @bp_smi: bus protection for smi subsystem
> */
> struct scpsys_domain_data {
> + const char *name;
> u32 sta_mask;
> int ctl_offs;
> u32 sram_pdn_bits;
>