The V3 and S3 sun8i SoCs have an i2s peripheral. This set of
patches adds it to their dts.
Additionally this patchset also adds the V3s DMA controller to its
dts, since the i2s peripheral requires DMA to function properly.
Tobias Schramm (3):
ARM: dts: sun8i: V3s/V3/S3: add dma controller node
ARM: dts: sun8i: V3s/V3/S3: add soc node label
ARM: dts: sun8i: V3/S3: add i2s peripheral
arch/arm/boot/dts/sun8i-v3.dtsi | 15 +++++++++++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 11 ++++++++++-
2 files changed, 25 insertions(+), 1 deletion(-)
--
2.30.1
The V3/S3 add an i2s peripheral over the features of the V3s. Add a label
to the soc node, such that the V3 dts can add the i2s peripheral.
Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 89286d3d35d1..308ba85f4661 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -113,7 +113,7 @@ osc32k: osc32k_clk {
};
};
- soc {
+ soc: soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.30.1
The V3s, V3 and S3 SoCs have a dma controller. Add it to the dts.
Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index f8f19d8fa795..89286d3d35d1 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -163,6 +163,15 @@ syscon: system-control@1c00000 {
ranges;
};
+ dma: dma-controller@1c02000 {
+ compatible = "allwinner,sun8i-v3s-dma";
+ reg = <0x01c02000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_DMA>;
+ resets = <&ccu RST_BUS_DMA>;
+ #dma-cells = <1>;
+ };
+
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
--
2.30.1
The V3 and S3 SoCs feature an i2s peripheral identical to that of the H3.
Add it to the dts.
Signed-off-by: Tobias Schramm <[email protected]>
---
arch/arm/boot/dts/sun8i-v3.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
index c279e13583ba..17ea6b8f091f 100644
--- a/arch/arm/boot/dts/sun8i-v3.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -30,3 +30,18 @@ uart1_pg_pins: uart1-pg-pins {
function = "uart1";
};
};
+
+&soc {
+ i2s0: i2s@1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ dma-names = "rx", "tx";
+ resets = <&ccu RST_BUS_I2S0>;
+ status = "disabled";
+ };
+};
--
2.30.1
Hi,
On Fri, Feb 26, 2021 at 11:30:28AM +0100, Tobias Schramm wrote:
> The V3 and S3 SoCs feature an i2s peripheral identical to that of the H3.
> Add it to the dts.
>
> Signed-off-by: Tobias Schramm <[email protected]>
Why is it added to the v3 DTSI and not the global one?
> ---
> arch/arm/boot/dts/sun8i-v3.dtsi | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
> index c279e13583ba..17ea6b8f091f 100644
> --- a/arch/arm/boot/dts/sun8i-v3.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3.dtsi
> @@ -30,3 +30,18 @@ uart1_pg_pins: uart1-pg-pins {
> function = "uart1";
> };
> };
> +
> +&soc {
You don't need a label for that, you can just put it under / { soc {
> + i2s0: i2s@1c22000 {
> + #sound-dai-cells = <0>;
> + compatible = "allwinner,sun8i-h3-i2s";
We should also have a v3 specific compatible here in addition to the H3
(and document it in the bindings).
Maxime
On Fri, Feb 26, 2021 at 11:30:26AM +0100, Tobias Schramm wrote:
> The V3s, V3 and S3 SoCs have a dma controller. Add it to the dts.
>
> Signed-off-by: Tobias Schramm <[email protected]>
Applied, thanks
Maxime