This patch series has the following two WLED fixes
1. As per the current implementation, for WLED5, after
the FSC (Full Scale Current) update the driver is incorrectly
toggling the MOD_SYNC register instead of toggling the SYNC register.
The patch 1/2 fixes this by toggling the SYNC register after
FSC update.
2. Currently, the sync bits are transitioned from 1 to 0
after FSC and brightness update. As per hardware team recommendation
the FSC and brightness sync takes place from 0 to 1 transition.
The patch 2/2 fies this issue.
Changes from V1:
1. Updated the cover letter.
2. Updated the description of the patches as per Daniel's suggestion.
Kiran Gunda (2):
backlight: qcom-wled: Fix FSC update issue for WLED5
backlight: qcom-wled: Correct the sync_toggle sequence
drivers/video/backlight/qcom-wled.c | 37 +++++++++++++++++++++++++------------
1 file changed, 25 insertions(+), 12 deletions(-)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
As per the current implementation, after FSC (Full Scale Current)
and brightness update the sync bits are transitioned from 1 to 0.
But, the FSC and brightness sync takes place during a 0 to 1
transition of the sync bits. So the hardware team recommends a
clear-then-set approach in order to guarantee such a transition
regardless of the previous register state.
Signed-off-by: Kiran Gunda <[email protected]>
---
drivers/video/backlight/qcom-wled.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/video/backlight/qcom-wled.c b/drivers/video/backlight/qcom-wled.c
index aef52b9..19f83ac 100644
--- a/drivers/video/backlight/qcom-wled.c
+++ b/drivers/video/backlight/qcom-wled.c
@@ -337,13 +337,13 @@ static int wled3_sync_toggle(struct wled *wled)
rc = regmap_update_bits(wled->regmap,
wled->ctrl_addr + WLED3_SINK_REG_SYNC,
- mask, mask);
+ mask, WLED3_SINK_REG_SYNC_CLEAR);
if (rc < 0)
return rc;
rc = regmap_update_bits(wled->regmap,
wled->ctrl_addr + WLED3_SINK_REG_SYNC,
- mask, WLED3_SINK_REG_SYNC_CLEAR);
+ mask, mask);
return rc;
}
@@ -353,17 +353,17 @@ static int wled5_mod_sync_toggle(struct wled *wled)
int rc;
u8 val;
- val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
- WLED5_SINK_REG_SYNC_MOD_B_BIT;
rc = regmap_update_bits(wled->regmap,
wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
- WLED5_SINK_REG_SYNC_MASK, val);
+ WLED5_SINK_REG_SYNC_MASK, 0);
if (rc < 0)
return rc;
+ val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
+ WLED5_SINK_REG_SYNC_MOD_B_BIT;
return regmap_update_bits(wled->regmap,
wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
- WLED5_SINK_REG_SYNC_MASK, 0);
+ WLED5_SINK_REG_SYNC_MASK, val);
}
static int wled_ovp_fault_status(struct wled *wled, bool *fault_set)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
On Fri, Feb 26, 2021 at 05:42:24PM +0530, Kiran Gunda wrote:
> As per the current implementation, after FSC (Full Scale Current)
> and brightness update the sync bits are transitioned from 1 to 0.
This still seems to incorrectly describe the current behaviour.
Surely in most cases (i.e. every time except the first) the value of the
sync bit is 0 when the function is called and we get both a 0 to 1
and then a 1 to 0 transition.
That is why I recommended set-then-clear terminology to describe the
current behaviour. It is concise and correct.
Daniel.
> But, the FSC and brightness sync takes place during a 0 to 1
> transition of the sync bits. So the hardware team recommends a
> clear-then-set approach in order to guarantee such a transition
> regardless of the previous register state.
>
> Signed-off-by: Kiran Gunda <[email protected]>
> ---
> drivers/video/backlight/qcom-wled.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/video/backlight/qcom-wled.c b/drivers/video/backlight/qcom-wled.c
> index aef52b9..19f83ac 100644
> --- a/drivers/video/backlight/qcom-wled.c
> +++ b/drivers/video/backlight/qcom-wled.c
> @@ -337,13 +337,13 @@ static int wled3_sync_toggle(struct wled *wled)
>
> rc = regmap_update_bits(wled->regmap,
> wled->ctrl_addr + WLED3_SINK_REG_SYNC,
> - mask, mask);
> + mask, WLED3_SINK_REG_SYNC_CLEAR);
> if (rc < 0)
> return rc;
>
> rc = regmap_update_bits(wled->regmap,
> wled->ctrl_addr + WLED3_SINK_REG_SYNC,
> - mask, WLED3_SINK_REG_SYNC_CLEAR);
> + mask, mask);
>
> return rc;
> }
> @@ -353,17 +353,17 @@ static int wled5_mod_sync_toggle(struct wled *wled)
> int rc;
> u8 val;
>
> - val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
> - WLED5_SINK_REG_SYNC_MOD_B_BIT;
> rc = regmap_update_bits(wled->regmap,
> wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
> - WLED5_SINK_REG_SYNC_MASK, val);
> + WLED5_SINK_REG_SYNC_MASK, 0);
> if (rc < 0)
> return rc;
>
> + val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
> + WLED5_SINK_REG_SYNC_MOD_B_BIT;
> return regmap_update_bits(wled->regmap,
> wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
> - WLED5_SINK_REG_SYNC_MASK, 0);
> + WLED5_SINK_REG_SYNC_MASK, val);
> }
>
> static int wled_ovp_fault_status(struct wled *wled, bool *fault_set)
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
On 2021-02-26 22:56, Daniel Thompson wrote:
> On Fri, Feb 26, 2021 at 05:42:24PM +0530, Kiran Gunda wrote:
>> As per the current implementation, after FSC (Full Scale Current)
>> and brightness update the sync bits are transitioned from 1 to 0.
>
> This still seems to incorrectly describe the current behaviour.
>
> Surely in most cases (i.e. every time except the first) the value of
> the
> sync bit is 0 when the function is called and we get both a 0 to 1
> and then a 1 to 0 transition.
>
> That is why I recommended set-then-clear terminology to describe the
> current behaviour. It is concise and correct.
>
>
> Daniel.
>
>
>
Okay. Actually I have mentioned the "clear-and-set" in explaining the
fix.
Let me modify the same terminology in explaining the problem case also.
>> But, the FSC and brightness sync takes place during a 0 to 1
>> transition of the sync bits. So the hardware team recommends a
>> clear-then-set approach in order to guarantee such a transition
>> regardless of the previous register state.
>>
>> Signed-off-by: Kiran Gunda <[email protected]>
>> ---
>> drivers/video/backlight/qcom-wled.c | 12 ++++++------
>> 1 file changed, 6 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/video/backlight/qcom-wled.c
>> b/drivers/video/backlight/qcom-wled.c
>> index aef52b9..19f83ac 100644
>> --- a/drivers/video/backlight/qcom-wled.c
>> +++ b/drivers/video/backlight/qcom-wled.c
>> @@ -337,13 +337,13 @@ static int wled3_sync_toggle(struct wled *wled)
>>
>> rc = regmap_update_bits(wled->regmap,
>> wled->ctrl_addr + WLED3_SINK_REG_SYNC,
>> - mask, mask);
>> + mask, WLED3_SINK_REG_SYNC_CLEAR);
>> if (rc < 0)
>> return rc;
>>
>> rc = regmap_update_bits(wled->regmap,
>> wled->ctrl_addr + WLED3_SINK_REG_SYNC,
>> - mask, WLED3_SINK_REG_SYNC_CLEAR);
>> + mask, mask);
>>
>> return rc;
>> }
>> @@ -353,17 +353,17 @@ static int wled5_mod_sync_toggle(struct wled
>> *wled)
>> int rc;
>> u8 val;
>>
>> - val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
>> - WLED5_SINK_REG_SYNC_MOD_B_BIT;
>> rc = regmap_update_bits(wled->regmap,
>> wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
>> - WLED5_SINK_REG_SYNC_MASK, val);
>> + WLED5_SINK_REG_SYNC_MASK, 0);
>> if (rc < 0)
>> return rc;
>>
>> + val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT :
>> + WLED5_SINK_REG_SYNC_MOD_B_BIT;
>> return regmap_update_bits(wled->regmap,
>> wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT,
>> - WLED5_SINK_REG_SYNC_MASK, 0);
>> + WLED5_SINK_REG_SYNC_MASK, val);
>> }
>>
>> static int wled_ovp_fault_status(struct wled *wled, bool *fault_set)
>> --
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
>> Forum,
>> a Linux Foundation Collaborative Project
>>
On Mon, Mar 01, 2021 at 02:15:12PM +0530, [email protected] wrote:
> On 2021-02-26 22:56, Daniel Thompson wrote:
> > On Fri, Feb 26, 2021 at 05:42:24PM +0530, Kiran Gunda wrote:
> > > As per the current implementation, after FSC (Full Scale Current)
> > > and brightness update the sync bits are transitioned from 1 to 0.
> >
> > This still seems to incorrectly describe the current behaviour.
> >
> > Surely in most cases (i.e. every time except the first) the value of the
> > sync bit is 0 when the function is called and we get both a 0 to 1
> > and then a 1 to 0 transition.
> >
> > That is why I recommended set-then-clear terminology to describe the
> > current behaviour. It is concise and correct.
>
> Okay. Actually I have mentioned the "clear-and-set" in explaining the fix.
> Let me modify the same terminology in explaining the problem case also.
Yes please.
In my original review I took time to explain why patch descriptions
require care and attention and, also, why expressing the original behaviour
as 1 to 0 was inadequate. Based on the previous feedback (and reply) I
was rather surprised that the problem was only half corrected in the
next revision.
Daniel.