This patchset includes SiFive FU740 PCIe host controller driver. We also
add pcie_aux clock and pcie_power_on_reset controller to prci driver for
PCIe driver to use it.
This is tested with e1000e: Intel(R) PRO/1000 Network Card, AMD Radeon R5
230 graphics card and SP M.2 PCIe Gen 3 SSD in SiFive Unmatched based on
v5.11 Linux kernel.
Changes in v3:
- Remove items that has been defined
- Refine format of sifive,fu740-pcie.yaml
- Replace perstn-gpios with the common one
- Change DBI mapping space to 2GB from 4GB
- Refine drivers/reset/Kconfig
Changes in v2:
- Refine codes based on reviewers' feedback
- Remove define and use the common one
- Replace __raw_writel with writel_relaxed
- Split fu740_phyregreadwrite to write function
- Use readl_poll_timeout in stead of while loop checking
- Use dwc common codes
- Use gpio descriptors and the gpiod_* api.
- Replace devm_ioremap_resource with devm_platform_ioremap_resource_byname
- Replace devm_reset_control_get with devm_reset_control_get_exclusive
- Add more comments for delay and sleep
- Remove "phy ? x : y" expressions
- Refine code logic to remove possible infinite loop
- Replace magic number with meaningful define
- Remove fu740_pcie_pm_ops
- Use builtin_platform_driver
Greentime Hu (5):
clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
clk: sifive: Use reset-simple in prci driver for PCIe driver
MAINTAINERS: Add maintainers for SiFive FU740 PCIe driver
dt-bindings: PCI: Add SiFive FU740 PCIe host controller
riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC
Paul Walmsley (1):
PCI: fu740: Add SiFive FU740 PCIe host controller driver
.../bindings/pci/sifive,fu740-pcie.yaml | 109 ++++++
MAINTAINERS | 8 +
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 33 ++
drivers/clk/sifive/Kconfig | 2 +
drivers/clk/sifive/fu740-prci.c | 11 +
drivers/clk/sifive/fu740-prci.h | 2 +-
drivers/clk/sifive/sifive-prci.c | 54 +++
drivers/clk/sifive/sifive-prci.h | 13 +
drivers/pci/controller/dwc/Kconfig | 9 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-fu740.c | 324 ++++++++++++++++++
drivers/reset/Kconfig | 1 +
include/dt-bindings/clock/sifive-fu740-prci.h | 1 +
13 files changed, 567 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-fu740.c
--
2.30.2
Signed-off-by: Greentime Hu <[email protected]>
---
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index d1bb22b11920..b2317c8e3a80 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -158,6 +158,7 @@ prci: clock-controller@10000000 {
reg = <0x0 0x10000000 0x0 0x1000>;
clocks = <&hfclk>, <&rtcclk>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
uart0: serial@10010000 {
compatible = "sifive,fu740-c000-uart", "sifive,uart0";
@@ -288,5 +289,37 @@ gpio: gpio@10060000 {
clocks = <&prci PRCI_CLK_PCLK>;
status = "disabled";
};
+ pcie@e00000000 {
+ compatible = "sifive,fu740-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ reg = <0xe 0x00000000 0x0 0x80000000>,
+ <0xd 0xf0000000 0x0 0x10000000>,
+ <0x0 0x100d0000 0x0 0x1000>;
+ reg-names = "dbi", "config", "mgmt";
+ device_type = "pci";
+ dma-coherent;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
+ <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
+ <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
+ <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
+ num-lanes = <0x8>;
+ interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>;
+ interrupt-names = "msi", "inta", "intb", "intc", "intd";
+ interrupt-parent = <&plic0>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>,
+ <0x0 0x0 0x0 0x2 &plic0 58>,
+ <0x0 0x0 0x0 0x3 &plic0 59>,
+ <0x0 0x0 0x0 0x4 &plic0 60>;
+ clock-names = "pcie_aux";
+ clocks = <&prci PRCI_CLK_PCIE_AUX>;
+ pwren-gpios = <&gpio 5 0>;
+ reset-gpios = <&gpio 8 0>;
+ resets = <&prci 4>;
+ status = "okay";
+ };
};
};
--
2.30.2