Add fpga-region property 'power-domains' to allow to handle
the FPGA/PL power domins.
dt-bindings: fpga: Enable PM generic domain support
Signed-off-by: Nava kishore Manne <[email protected]>
---
.../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
index e811cf825019..969ca53bb65e 100644
--- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
@@ -196,6 +196,20 @@ Optional properties:
- config-complete-timeout-us : The maximum time in microseconds time for the
FPGA to go to operating mode after the region has been programmed.
- child nodes : devices in the FPGA after programming.
+- power-domains : A phandle and PM domain specifier as defined by bindings of
+ the power controller specified by phandle.
+Example:
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&zynqmp_pcap>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ power-domains = <&zynqmp_firmware PL_PD>;
+ };
+
+ The PL_PD power domain will be turned on before loading the bitstream
+and turned off while removing/unloading the bitstream using overlays.
In the example below, when an overlay is applied targeting fpga-region0,
fpga_mgr is used to program the FPGA. Two bridges are controlled during
--
2.18.0
On Fri, Apr 02, 2021 at 02:50:48PM +0530, Nava kishore Manne wrote:
> Add fpga-region property 'power-domains' to allow to handle
> the FPGA/PL power domins.
>
> dt-bindings: fpga: Enable PM generic domain support
>
> Signed-off-by: Nava kishore Manne <[email protected]>
> ---
> .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> index e811cf825019..969ca53bb65e 100644
> --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> @@ -196,6 +196,20 @@ Optional properties:
> - config-complete-timeout-us : The maximum time in microseconds time for the
> FPGA to go to operating mode after the region has been programmed.
> - child nodes : devices in the FPGA after programming.
> +- power-domains : A phandle and PM domain specifier as defined by bindings of
> + the power controller specified by phandle.
> +Example:
> + fpga_full: fpga-full {
> + compatible = "fpga-region";
> + fpga-mgr = <&zynqmp_pcap>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> + power-domains = <&zynqmp_firmware PL_PD>;
> + };
> +
> + The PL_PD power domain will be turned on before loading the bitstream
> +and turned off while removing/unloading the bitstream using overlays.
Can multiple regions share a power-domain or is this specific to full
fpga reconfiguration?
- Moritz
Hi Moritz,
Thanks for the response.
Please find my response inline.
> -----Original Message-----
> From: Moritz Fischer <[email protected]>
> Sent: Friday, April 2, 2021 10:46 PM
> To: Nava kishore Manne <[email protected]>
> Cc: [email protected]; [email protected]; [email protected]; Michal Simek
> <[email protected]>; [email protected];
> [email protected]; [email protected]; linux-arm-
> [email protected]; git <[email protected]>
> Subject: Re: [PATCH 2/3] fpga: region: Add fpga-region property 'power-
> domains'
>
> On Fri, Apr 02, 2021 at 02:50:48PM +0530, Nava kishore Manne wrote:
> > Add fpga-region property 'power-domains' to allow to handle the
> > FPGA/PL power domins.
> >
> > dt-bindings: fpga: Enable PM generic domain support
> >
> > Signed-off-by: Nava kishore Manne <[email protected]>
> > ---
> > .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > index e811cf825019..969ca53bb65e 100644
> > --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt
> > @@ -196,6 +196,20 @@ Optional properties:
> > - config-complete-timeout-us : The maximum time in microseconds time
> for the
> > FPGA to go to operating mode after the region has been
> programmed.
> > - child nodes : devices in the FPGA after programming.
> > +- power-domains : A phandle and PM domain specifier as defined by
> bindings of
> > + the power controller specified by phandle.
> > +Example:
> > + fpga_full: fpga-full {
> > + compatible = "fpga-region";
> > + fpga-mgr = <&zynqmp_pcap>;
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > + power-domains = <&zynqmp_firmware PL_PD>;
> > + };
> > +
> > + The PL_PD power domain will be turned on before loading the
> > +bitstream and turned off while removing/unloading the bitstream using
> overlays.
>
> Can multiple regions share a power-domain or is this specific to full fpga
> reconfiguration?
>
These are generic changes and not limited to full region. If H/W supports individual power domains to control the Partial reconfiguration regions we can control the individual Partial reconfiguration region power domains as well.
Regards,
Navakishore.
On Fri, 02 Apr 2021 14:50:48 +0530, Nava kishore Manne wrote:
> Add fpga-region property 'power-domains' to allow to handle
> the FPGA/PL power domins.
>
> dt-bindings: fpga: Enable PM generic domain support
>
> Signed-off-by: Nava kishore Manne <[email protected]>
> ---
> .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
Acked-by: Rob Herring <[email protected]>