> -----Original Message-----
<snipped>
> Subject: Re: [PATCH] arm64: dts: imx8mq-evk: add one regulator used
> to power up pcie phy
> On Mon, Mar 29, 2021 at 04:06:03PM +0800, Richard Zhu wrote:
> > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> > the VREG_BYPASS bits of GPR registers should be cleared from default
> > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> > turned on.
> >
> > Signed-off-by: Richard Zhu <[email protected]>
> > Reviewed-by: Lucas Stach <[email protected]>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > index 85b045253a0e..4d2035e3dd7c 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > @@ -318,6 +318,7 @@
> > <&clk IMX8MQ_CLK_PCIE1_PHY>,
> > <&pcie0_refclk>;
> > clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > + vph-supply = <&vgen5_reg>;
>
> Hmm, I do not see this in the bindings doc.
[Richard Zhu] Hi Shawn:
The binding document changes are going to PCI tree by the following patch.
https://patchwork.kernel.org/project/linux-pci/patch/[email protected]/
Best Regards
Richard Zhu
>
> Shawn
>
> > status = "okay";
> > };
> >
> > --
> > 2.17.1
> >
On Mon, Apr 26, 2021 at 01:28:34AM +0000, Richard Zhu wrote:
> > -----Original Message-----
> <snipped>
> > Subject: Re: [PATCH] arm64: dts: imx8mq-evk: add one regulator used
> > to power up pcie phy
> > On Mon, Mar 29, 2021 at 04:06:03PM +0800, Richard Zhu wrote:
> > > Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> > > In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> > > sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> > > the VREG_BYPASS bits of GPR registers should be cleared from default
> > > value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> > > turned on.
> > >
> > > Signed-off-by: Richard Zhu <[email protected]>
> > > Reviewed-by: Lucas Stach <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > index 85b045253a0e..4d2035e3dd7c 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> > > @@ -318,6 +318,7 @@
> > > <&clk IMX8MQ_CLK_PCIE1_PHY>,
> > > <&pcie0_refclk>;
> > > clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> > > + vph-supply = <&vgen5_reg>;
> >
> > Hmm, I do not see this in the bindings doc.
> [Richard Zhu] Hi Shawn:
> The binding document changes are going to PCI tree by the following patch.
>
> https://patchwork.kernel.org/project/linux-pci/patch/[email protected]/
Ah, okay, ping me when the series is applied to PCI tree.
Shawn