Caught this when looking at alpha-pll code. Untested but it is clear that
this was intended to write to PLL_CAL_L_VAL and not PLL_ALPHA_VAL.
Fixes: 691865bad627 ("clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration")
Signed-off-by: Jonathan Marek <[email protected]>
---
drivers/clk/qcom/clk-alpha-pll.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 94b53c7db2f7f..eaedcceb766f9 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -1255,7 +1255,7 @@ static int alpha_pll_fabia_prepare(struct clk_hw *hw)
return ret;
/* Setup PLL for calibration frequency */
- regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), cal_l);
+ regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);
/* Bringup the PLL at calibration frequency */
ret = clk_alpha_pll_enable(hw);
--
2.26.1
Quoting Jonathan Marek (2021-06-08 19:28:52)
> Caught this when looking at alpha-pll code. Untested but it is clear that
> this was intended to write to PLL_CAL_L_VAL and not PLL_ALPHA_VAL.
>
> Fixes: 691865bad627 ("clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration")
> Signed-off-by: Jonathan Marek <[email protected]>
> ---
Applied to clk-next
Taniya, can you please review?
Reviewed-by: Taniya Das <[email protected]>
On 6/9/2021 7:58 AM, Jonathan Marek wrote:
> Caught this when looking at alpha-pll code. Untested but it is clear that
> this was intended to write to PLL_CAL_L_VAL and not PLL_ALPHA_VAL.
>
> Fixes: 691865bad627 ("clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration")
> Signed-off-by: Jonathan Marek <[email protected]>
> ---
> drivers/clk/qcom/clk-alpha-pll.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 94b53c7db2f7f..eaedcceb766f9 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -1255,7 +1255,7 @@ static int alpha_pll_fabia_prepare(struct clk_hw *hw)
> return ret;
>
> /* Setup PLL for calibration frequency */
> - regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), cal_l);
> + regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);
>
> /* Bringup the PLL at calibration frequency */
> ret = clk_alpha_pll_enable(hw);
>
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