2021-06-13 09:50:37

by Matthew Hagan

[permalink] [raw]
Subject: [PATCH 1/4] ARM: dts: NSP: disable qspi node by default

The QSPI bus is enabled by default, however this may not used on all
devices. This patch disables by default, requiring it to be explicitly
enabled where required.

Signed-off-by: Matthew Hagan <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 1 +
arch/arm/boot/dts/bcm958522er.dts | 1 +
arch/arm/boot/dts/bcm958525er.dts | 1 +
arch/arm/boot/dts/bcm958525xmc.dts | 1 +
arch/arm/boot/dts/bcm958622hr.dts | 1 +
arch/arm/boot/dts/bcm958623hr.dts | 1 +
arch/arm/boot/dts/bcm958625hr.dts | 1 +
arch/arm/boot/dts/bcm958625k.dts | 1 +
arch/arm/boot/dts/bcm988312hr.dts | 1 +
9 files changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index b4d2cc70afb1..c0427d985438 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -310,6 +310,7 @@ qspi: spi@27200 {
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};

xhci: usb@29000 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index b6f4d931123c..e5ed67b3c35f 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -134,6 +134,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index af66caa87bfc..017fc46cdf0b 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -134,6 +134,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 3d6859e4fd5e..5364f98ae1b8 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -150,6 +150,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index dca2c9c60857..4763eb5d68a6 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -138,6 +138,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index 4e106ce1384a..f2468bed2808 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -142,6 +142,7 @@ &sata_phy0 {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index 3a62d2d90a18..c26849304bc7 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -149,6 +149,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index d331c0a4e6b6..b7b136c862a8 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -153,6 +153,7 @@ &pwm {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
index 7cfb48fb48ba..6b57530a3964 100644
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -138,6 +138,7 @@ nand_sel: nand_sel {
};

&qspi {
+ status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
#address-cells = <1>;
--
2.26.3


2021-06-13 09:51:24

by Matthew Hagan

[permalink] [raw]
Subject: [PATCH 3/4] ARM: dts: NSP: add MDIO bus controller node

This patch adds the node for the MDIO bus controller, present on the NSP
SoC.

Signed-off-by: Matthew Hagan <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 043d3bfaf1cc..e91a68996986 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -363,6 +363,13 @@ pwm: pwm@31000 {
status = "disabled";
};

+ mdio: mdio@32000 {
+ compatible = "brcm,iproc-mdio";
+ reg = <0x32000 0x8>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+ };
+
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;
--
2.26.3

2021-06-13 09:52:18

by Matthew Hagan

[permalink] [raw]
Subject: [PATCH 4/4] ARM: dts: NSP: Move USB3 PHY to internal MDIO bus

This patch largely replicates Vivek Unune's patch "ARM: dts:
BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
whereby we need to create an mdio-mux to facilitate switches
configured via external MDIO, in this case on the Meraki MX65.

However in doing so, we are creating an overlap with usb3_phy's
ccb-mii range. To resolve this, usb3_phy should be moved to a child
node of the internal MDIO bus. The result is heavily based upon Vivek's
patch. This has also been cross-referenced with Yendapally Reddy's
earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
[2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
documentation, utilising the required usb3-dmp-syscon property. Note
that support for the deprecated ccb-mii bindings has been dropped as of
"phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].

[1] https://lore.kernel.org/patchwork/patch/933971/
[2] https://www.spinics.net/lists/arm-kernel/msg555132.html
[3] https://lore.kernel.org/linux-devicetree/[email protected]/

Signed-off-by: Matthew Hagan <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 38 +++++++++++++++++++++++++++-------
1 file changed, 31 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index e91a68996986..7c59816fdb32 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -370,6 +370,35 @@ mdio: mdio@32000 {
#address-cells = <1>;
};

+ mdio-mux@32000 {
+ compatible = "mdio-mux-mmioreg";
+ reg = <0x32000 0x4>;
+ mux-mask = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mdio-parent-bus = <&mdio>;
+
+ mdio_int: mdio@0 {
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb3_phy: usb3-phy@10 {
+ compatible = "brcm,ns-bx-usb3-phy";
+ reg = <0x10>;
+ usb3-dmp-syscon = <&usb3_dmp>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ mdio_ext: mdio@200 {
+ reg = <0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;
@@ -530,13 +559,8 @@ sata1: sata-port@1 {
};
};

- usb3_phy: usb3-phy@104000 {
- compatible = "brcm,ns-bx-usb3-phy";
- reg = <0x104000 0x1000>,
- <0x032000 0x1000>;
- reg-names = "dmp", "ccb-mii";
- #phy-cells = <0>;
- status = "disabled";
+ usb3_dmp: syscon@104000 {
+ reg = <0x104000 0x1000>;
};
};

--
2.26.3

2021-06-13 09:52:52

by Matthew Hagan

[permalink] [raw]
Subject: [PATCH 2/4] ARM: dts: NSP: disable sp804 ccbtimers by default

The sp804 ccbtimers are enabled by default, however they may or may not
be present on the board. This patch disables them by default, requiring
them to be enabled only where applicable.

Signed-off-by: Matthew Hagan <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 ++
arch/arm/boot/dts/bcm958522er.dts | 8 ++++++++
arch/arm/boot/dts/bcm958525er.dts | 8 ++++++++
arch/arm/boot/dts/bcm958525xmc.dts | 8 ++++++++
arch/arm/boot/dts/bcm958622hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958623hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625hr.dts | 8 ++++++++
arch/arm/boot/dts/bcm958625k.dts | 8 ++++++++
arch/arm/boot/dts/bcm988312hr.dts | 8 ++++++++
9 files changed, 66 insertions(+)

diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index c0427d985438..043d3bfaf1cc 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -375,6 +375,7 @@ ccbtimer0: timer@34000 {
<GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
clock-names = "apb_pclk";
+ status = "disabled";
};

ccbtimer1: timer@35000 {
@@ -384,6 +385,7 @@ ccbtimer1: timer@35000 {
<GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
clock-names = "apb_pclk";
+ status = "disabled";
};

srab: ethernet-switch@36000 {
diff --git a/arch/arm/boot/dts/bcm958522er.dts b/arch/arm/boot/dts/bcm958522er.dts
index e5ed67b3c35f..bc7a28cd1017 100644
--- a/arch/arm/boot/dts/bcm958522er.dts
+++ b/arch/arm/boot/dts/bcm958522er.dts
@@ -70,6 +70,14 @@ &amac1 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525er.dts b/arch/arm/boot/dts/bcm958525er.dts
index 017fc46cdf0b..cd9b24bf2ee6 100644
--- a/arch/arm/boot/dts/bcm958525er.dts
+++ b/arch/arm/boot/dts/bcm958525er.dts
@@ -70,6 +70,14 @@ &amac1 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958525xmc.dts b/arch/arm/boot/dts/bcm958525xmc.dts
index 5364f98ae1b8..b7c76a7d4a40 100644
--- a/arch/arm/boot/dts/bcm958525xmc.dts
+++ b/arch/arm/boot/dts/bcm958525xmc.dts
@@ -66,6 +66,14 @@ &amac0 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958622hr.dts b/arch/arm/boot/dts/bcm958622hr.dts
index 4763eb5d68a6..fe5ac3495223 100644
--- a/arch/arm/boot/dts/bcm958622hr.dts
+++ b/arch/arm/boot/dts/bcm958622hr.dts
@@ -74,6 +74,14 @@ &amac2 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958623hr.dts b/arch/arm/boot/dts/bcm958623hr.dts
index f2468bed2808..4c8563fdd635 100644
--- a/arch/arm/boot/dts/bcm958623hr.dts
+++ b/arch/arm/boot/dts/bcm958623hr.dts
@@ -74,6 +74,14 @@ &amac2 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958625hr.dts b/arch/arm/boot/dts/bcm958625hr.dts
index c26849304bc7..dc0fccf57dfe 100644
--- a/arch/arm/boot/dts/bcm958625hr.dts
+++ b/arch/arm/boot/dts/bcm958625hr.dts
@@ -85,6 +85,14 @@ &amac2 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm958625k.dts b/arch/arm/boot/dts/bcm958625k.dts
index b7b136c862a8..f23e97df2fc1 100644
--- a/arch/arm/boot/dts/bcm958625k.dts
+++ b/arch/arm/boot/dts/bcm958625k.dts
@@ -64,6 +64,14 @@ &amac2 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
diff --git a/arch/arm/boot/dts/bcm988312hr.dts b/arch/arm/boot/dts/bcm988312hr.dts
index 6b57530a3964..a2c8a22e8381 100644
--- a/arch/arm/boot/dts/bcm988312hr.dts
+++ b/arch/arm/boot/dts/bcm988312hr.dts
@@ -74,6 +74,14 @@ &amac2 {
status = "okay";
};

+&ccbtimer0 {
+ status = "okay";
+};
+
+&ccbtimer1 {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
--
2.26.3

2021-06-13 16:28:06

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH 2/4] ARM: dts: NSP: disable sp804 ccbtimers by default



On 6/13/2021 2:46 AM, Matthew Hagan wrote:
> The sp804 ccbtimers are enabled by default, however they may or may not
> be present on the board. This patch disables them by default, requiring
> them to be enabled only where applicable.

The timers are always part of the SoC, so they should always be enabled,
and if there was some board specific wiring, in that maybe one of the
times was fed a different clock source than iprocslow, we could deal
with that on a per-board basis.

If someone does not want a specific timer to be used, it could be
unbound once the kernel has booted for instance.
--
Florian

2021-06-13 19:49:02

by Matthew Hagan

[permalink] [raw]
Subject: Re: [PATCH 2/4] ARM: dts: NSP: disable sp804 ccbtimers by default

On 13/06/2021 17:22, Florian Fainelli wrote:

>
> On 6/13/2021 2:46 AM, Matthew Hagan wrote:
>> The sp804 ccbtimers are enabled by default, however they may or may not
>> be present on the board. This patch disables them by default, requiring
>> them to be enabled only where applicable.
> The timers are always part of the SoC, so they should always be enabled,
> and if there was some board specific wiring, in that maybe one of the
> times was fed a different clock source than iprocslow, we could deal
> with that on a per-board basis.
>
> If someone does not want a specific timer to be used, it could be
> unbound once the kernel has booted for instance.

I should have spent more time to look at the issue rather rather than
proposing to disable parts of the SoC.

In my case with ccbtimer0, ccbtimer1 both enabled:

[ 0.000181] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 15290083572 ns
[ 0.000209] Failed to initialize '/axi@18000000/timer@35000': -22

but with ccbtimer0 disabled, ccbtimer1 now initialises correctly:

[ 0.000186] clocksource: arm,sp804: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 15290083572 ns

Will investigate this further, but yes this patch should be dropped.

Thanks,
Matthew

2021-06-24 22:34:42

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH 1/4] ARM: dts: NSP: disable qspi node by default

On Sun, 13 Jun 2021 10:46:34 +0100, Matthew Hagan <[email protected]> wrote:
> The QSPI bus is enabled by default, however this may not used on all
> devices. This patch disables by default, requiring it to be explicitly
> enabled where required.
>
> Signed-off-by: Matthew Hagan <[email protected]>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

2021-06-24 22:35:49

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH 3/4] ARM: dts: NSP: add MDIO bus controller node

On Sun, 13 Jun 2021 10:46:36 +0100, Matthew Hagan <[email protected]> wrote:
> This patch adds the node for the MDIO bus controller, present on the NSP
> SoC.
>
> Signed-off-by: Matthew Hagan <[email protected]>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian

2021-06-24 22:37:51

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH 4/4] ARM: dts: NSP: Move USB3 PHY to internal MDIO bus

On Sun, 13 Jun 2021 10:46:37 +0100, Matthew Hagan <[email protected]> wrote:
> This patch largely replicates Vivek Unune's patch "ARM: dts:
> BCM5301X:Make usb3 phy use mdio phy driver"[1] for the NSP platform,
> whereby we need to create an mdio-mux to facilitate switches
> configured via external MDIO, in this case on the Meraki MX65.
>
> However in doing so, we are creating an overlap with usb3_phy's
> ccb-mii range. To resolve this, usb3_phy should be moved to a child
> node of the internal MDIO bus. The result is heavily based upon Vivek's
> patch. This has also been cross-referenced with Yendapally Reddy's
> earlier work which utilised the subsequently dropped brcm,nsp-usb3-phy
> driver: "[PATCH v2 4/4] arm: dts: nsp: Add USB nodes to device tree"
> [2]. Finally, this change provides conformance to the bcm-ns-usb3-phy
> documentation, utilising the required usb3-dmp-syscon property. Note
> that support for the deprecated ccb-mii bindings has been dropped as of
> "phy: phy-bcm-ns-usb3: drop support for deprecated DT binding"[3].
>
> [1] https://lore.kernel.org/patchwork/patch/933971/
> [2] https://www.spinics.net/lists/arm-kernel/msg555132.html
> [3] https://lore.kernel.org/linux-devicetree/[email protected]/
>
> Signed-off-by: Matthew Hagan <[email protected]>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian