2021-09-01 12:35:00

by Eugen Hristev

[permalink] [raw]
Subject: [PATCH v3 09/10] ARM: dts: at91: sama7g5: add node for the ADC

Add node for the ADC controller in sama7g5 SoC.

Signed-off-by: Eugen Hristev <[email protected]>
---
arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f9ad5365862f..de960519c72a 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
clocks = <&clk32k 0>;
};

+ adc: adc@e1000000 {
+ compatible = "microchip,sama7g5-adc";
+ reg = <0xe1000000 0x200>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
+ assigned-clock-rates = <100000000>;
+ clock-names = "adc_clk";
+ dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
+ dma-names = "rx";
+ atmel,min-sample-rate-hz = <200000>;
+ atmel,max-sample-rate-hz = <20000000>;
+ atmel,startup-time-ms = <4>;
+ status = "disabled";
+ };
+
sdmmc0: mmc@e1204000 {
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
reg = <0xe1204000 0x4000>;
--
2.25.1


2021-09-15 09:18:54

by Nicolas Ferre

[permalink] [raw]
Subject: Re: [PATCH v3 09/10] ARM: dts: at91: sama7g5: add node for the ADC

On 01/09/2021 at 14:30, Eugen Hristev wrote:
> Add node for the ADC controller in sama7g5 SoC.
>
> Signed-off-by: Eugen Hristev <[email protected]>

Acked-by: Nicolas Ferre <[email protected]>

> ---
> arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index f9ad5365862f..de960519c72a 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
> clocks = <&clk32k 0>;
> };
>
> + adc: adc@e1000000 {
> + compatible = "microchip,sama7g5-adc";
> + reg = <0xe1000000 0x200>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&pmc PMC_TYPE_GCK 26>;
> + assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
> + assigned-clock-rates = <100000000>;
> + clock-names = "adc_clk";
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
> + dma-names = "rx";
> + atmel,min-sample-rate-hz = <200000>;
> + atmel,max-sample-rate-hz = <20000000>;
> + atmel,startup-time-ms = <4>;
> + status = "disabled";
> + };
> +
> sdmmc0: mmc@e1204000 {
> compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
> reg = <0xe1204000 0x4000>;
>


--
Nicolas Ferre