SGPIO input/output pin order was changed, thus hwirq should be calculated
based on the new GPIO pin order.
This patch series contains a patch for fixing wrong hwirq in irq handler.
Please help to review.
Thanks,
Steven
Steven Lee (1):
gpio: gpio-aspeed-sgpio: Fix wrong hwirq in irq handler.
drivers/gpio/gpio-aspeed-sgpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--
2.17.1
The current hwirq is calculated based on the old GPIO pin order(input
GPIO range is from 0 to ngpios - 1).
It should be calculated based on the current GPIO input pin order(input
GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).
Signed-off-by: Steven Lee <[email protected]>
---
drivers/gpio/gpio-aspeed-sgpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
index 10f303d15225..3d6ef37a7702 100644
--- a/drivers/gpio/gpio-aspeed-sgpio.c
+++ b/drivers/gpio/gpio-aspeed-sgpio.c
@@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
reg = ioread32(bank_reg(data, bank, reg_irq_status));
for_each_set_bit(p, ®, 32)
- generic_handle_domain_irq(gc->irq.domain, i * 32 + p);
+ generic_handle_domain_irq(gc->irq.domain, i * 32 + p * 2);
}
chained_irq_exit(ic, desc);
--
2.17.1
On Tue, Sep 7, 2021 at 11:55 AM Steven Lee <[email protected]> wrote:
>
> The current hwirq is calculated based on the old GPIO pin order(input
> GPIO range is from 0 to ngpios - 1).
> It should be calculated based on the current GPIO input pin order(input
> GPIOs are 0, 2, 4, ..., (ngpios - 1) * 2).
>
> Signed-off-by: Steven Lee <[email protected]>
> ---
> drivers/gpio/gpio-aspeed-sgpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-aspeed-sgpio.c b/drivers/gpio/gpio-aspeed-sgpio.c
> index 10f303d15225..3d6ef37a7702 100644
> --- a/drivers/gpio/gpio-aspeed-sgpio.c
> +++ b/drivers/gpio/gpio-aspeed-sgpio.c
> @@ -395,7 +395,7 @@ static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
> reg = ioread32(bank_reg(data, bank, reg_irq_status));
>
> for_each_set_bit(p, ®, 32)
> - generic_handle_domain_irq(gc->irq.domain, i * 32 + p);
> + generic_handle_domain_irq(gc->irq.domain, i * 32 + p * 2);
> }
>
> chained_irq_exit(ic, desc);
> --
> 2.17.1
>
Applied for fixes, thanks!
Bart