This patch series adds DDR performance monitor support
on Marvell cn10k series of processor.
First patch adds device tree binding changes.
Second patch add basic support (without overflow and event
ownership). Third and fourth patch adds overflow and event
ownership respectively.
Seems like 4th patch can be merged in second patch,
For easy review it is currently separate
v3->v4:
- Added Rob Herring reviewed-by for dt-binding patch
v2->v3:
- dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
- Add COMPILE_TEST as a dependency
- Switch to sysfs_emit()
- Error propagation when invalif event requested
- Switch to devm_platform_get_and_ioremap_resource()
- Other review comments on v2.
v1->v2:
- DT binding changed to new DT Schema
- writeq/readq changed to respective relaxed
- Using PMU_EVENT_ATTR_ID
Bharat Bhushan (4):
dt-bindings: perf: marvell: cn10k ddr performance monitor
perf/marvell: CN10k DDR performance monitor support
perf/marvell: cn10k DDR perfmon event overflow handling
perf/marvell: cn10k DDR perf event core ownership
.../bindings/perf/marvell-cn10k-ddr.yaml | 37 +
drivers/perf/Kconfig | 7 +
drivers/perf/Makefile | 1 +
drivers/perf/marvell_cn10k_ddr_pmu.c | 756 ++++++++++++++++++
include/linux/cpuhotplug.h | 1 +
5 files changed, 802 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
create mode 100644 drivers/perf/marvell_cn10k_ddr_pmu.c
--
2.17.1
Add binding documentation for the Marvell CN10k DDR
performance monitor unit.
Signed-off-by: Bharat Bhushan <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
v3->v4:
- Added Rob Herring reviewed-by
v2->v3:
- dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
v1->v2:
- DT binding changed to new DT Schema
.../bindings/perf/marvell-cn10k-ddr.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
new file mode 100644
index 000000000000..a18dd0a8c43a
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell CN10K DDR performance monitor
+
+maintainers:
+ - Bharat Bhushan <[email protected]>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - marvell,cn10k-ddr-pmu
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pmu@87e1c0000000 {
+ compatible = "marvell,cn10k-ddr-pmu";
+ reg = <0x87e1 0xc0000000 0x0 0x10000>;
+ };
+ };
--
2.17.1
Hi All,
These patches are there in review for sometime now. In fact there are some more patches pending for review in "driver/perf" subsystem.
Tried reaching out Will Deacon but he seems to be not responding. Not sure who is going to review/pull these changes.
Can someone help on who is going to review and pull these (driver/perf subsystem) changes?
Thanks
-Bharat
> -----Original Message-----
> From: Bharat Bhushan <[email protected]>
> Sent: Monday, September 20, 2021 10:38 AM
> To: [email protected]; [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Bharat Bhushan <[email protected]>
> Subject: [PATCH v4 0/4] cn10k DDR Performance monitor support
>
> This patch series adds DDR performance monitor support on Marvell cn10k
> series of processor.
>
> First patch adds device tree binding changes.
> Second patch add basic support (without overflow and event ownership). Third
> and fourth patch adds overflow and event ownership respectively.
>
> Seems like 4th patch can be merged in second patch, For easy review it is
> currently separate
>
> v3->v4:
> - Added Rob Herring reviewed-by for dt-binding patch
>
> v2->v3:
> - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
> - Add COMPILE_TEST as a dependency
> - Switch to sysfs_emit()
> - Error propagation when invalif event requested
> - Switch to devm_platform_get_and_ioremap_resource()
> - Other review comments on v2.
>
> v1->v2:
> - DT binding changed to new DT Schema
> - writeq/readq changed to respective relaxed
> - Using PMU_EVENT_ATTR_ID
>
> Bharat Bhushan (4):
> dt-bindings: perf: marvell: cn10k ddr performance monitor
> perf/marvell: CN10k DDR performance monitor support
> perf/marvell: cn10k DDR perfmon event overflow handling
> perf/marvell: cn10k DDR perf event core ownership
>
> .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +
> drivers/perf/Kconfig | 7 +
> drivers/perf/Makefile | 1 +
> drivers/perf/marvell_cn10k_ddr_pmu.c | 756 ++++++++++++++++++
> include/linux/cpuhotplug.h | 1 +
> 5 files changed, 802 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-
> ddr.yaml
> create mode 100644 drivers/perf/marvell_cn10k_ddr_pmu.c
>
> --
> 2.17.1
Adding Bhaskara
> -----Original Message-----
> From: Bharat Bhushan <[email protected]>
> Sent: Monday, September 20, 2021 10:38 AM
> To: [email protected]; [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Bharat Bhushan <[email protected]>
> Subject: [PATCH v4 0/4] cn10k DDR Performance monitor support
>
> This patch series adds DDR performance monitor support on Marvell cn10k
> series of processor.
>
> First patch adds device tree binding changes.
> Second patch add basic support (without overflow and event ownership). Third
> and fourth patch adds overflow and event ownership respectively.
>
> Seems like 4th patch can be merged in second patch, For easy review it is
> currently separate
>
> v3->v4:
> - Added Rob Herring reviewed-by for dt-binding patch
>
> v2->v3:
> - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
> - Add COMPILE_TEST as a dependency
> - Switch to sysfs_emit()
> - Error propagation when invalif event requested
> - Switch to devm_platform_get_and_ioremap_resource()
> - Other review comments on v2.
>
> v1->v2:
> - DT binding changed to new DT Schema
> - writeq/readq changed to respective relaxed
> - Using PMU_EVENT_ATTR_ID
>
> Bharat Bhushan (4):
> dt-bindings: perf: marvell: cn10k ddr performance monitor
> perf/marvell: CN10k DDR performance monitor support
> perf/marvell: cn10k DDR perfmon event overflow handling
> perf/marvell: cn10k DDR perf event core ownership
>
> .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +
> drivers/perf/Kconfig | 7 +
> drivers/perf/Makefile | 1 +
> drivers/perf/marvell_cn10k_ddr_pmu.c | 756 ++++++++++++++++++
> include/linux/cpuhotplug.h | 1 +
> 5 files changed, 802 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-
> ddr.yaml
> create mode 100644 drivers/perf/marvell_cn10k_ddr_pmu.c
>
> --
> 2.17.1
Adding Bhaskara
> -----Original Message-----
> From: Bharat Bhushan <[email protected]>
> Sent: Monday, September 20, 2021 10:38 AM
> To: [email protected]; [email protected]; [email protected]; linux-arm-
> [email protected]; [email protected]; linux-
> [email protected]
> Cc: Bharat Bhushan <[email protected]>
> Subject: [PATCH v4 1/4] dt-bindings: perf: marvell: cn10k ddr performance
> monitor
>
> Add binding documentation for the Marvell CN10k DDR performance monitor
> unit.
>
> Signed-off-by: Bharat Bhushan <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> ---
> v3->v4:
> - Added Rob Herring reviewed-by
>
> v2->v3:
> - dt-binding, ddrcpmu@1 -> pmu@87e1c0000000
>
> v1->v2:
> - DT binding changed to new DT Schema
>
> .../bindings/perf/marvell-cn10k-ddr.yaml | 37 +++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-cn10k-
> ddr.yaml
>
> diff --git a/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> new file mode 100644
> index 000000000000..a18dd0a8c43a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/perf/marvell-cn10k-ddr.yaml
> @@ -0,0 +1,37 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/perf/marvell-cn10k-ddr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell CN10K DDR performance monitor
> +
> +maintainers:
> + - Bharat Bhushan <[email protected]>
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - marvell,cn10k-ddr-pmu
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + bus {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pmu@87e1c0000000 {
> + compatible = "marvell,cn10k-ddr-pmu";
> + reg = <0x87e1 0xc0000000 0x0 0x10000>;
> + };
> + };
> --
> 2.17.1