Hi,
This series is a device tree for a new board
with Toshiba's ARM SoC, Visconti[0].
The board system, called VisROBO, consists of two parts:
VRC SoM and VRB base board.
Best regards,
Yuji
[0]: https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html
Yuji Ishikawa (3):
arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC
dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB board
arm64: dts: visconti: Add DTS for the VisROBO board
.../devicetree/bindings/arm/toshiba.yaml | 1 +
arch/arm64/boot/dts/toshiba/Makefile | 1 +
.../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 61 +++++++++++++++++++
.../dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 44 +++++++++++++
arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 7 +++
5 files changed, 114 insertions(+)
create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
--
2.17.1
This board consists of two boards:
the SoM board (VRC SoM) with the SoC on board, and the board for I/O (VRB).
The functions of each board supported by this update are as follows:
- VRC SoM
- WDT
- GPIO
- SDCard (SPI-MMC mode)
- I2C x1
- VRB board
- VRC SoM
- UART x2
- Ethernet phy
Signed-off-by: Yuji Ishikawa <[email protected]>
---
arch/arm64/boot/dts/toshiba/Makefile | 1 +
.../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 61 +++++++++++++++++++
.../dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 44 +++++++++++++
3 files changed, 106 insertions(+)
create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
diff --git a/arch/arm64/boot/dts/toshiba/Makefile b/arch/arm64/boot/dts/toshiba/Makefile
index 8cd460d5b68e..7ccb4664bb37 100644
--- a/arch/arm64/boot/dts/toshiba/Makefile
+++ b/arch/arm64/boot/dts/toshiba/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-rm-mbrc.dtb
+dtb-$(CONFIG_ARCH_VISCONTI) += tmpv7708-visrobo-vrb.dtb
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
new file mode 100644
index 000000000000..d0817463706e
--- /dev/null
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree File for TMPV7708 VisROBO VRB board
+ *
+ * (C) Copyright 2020, 2021, Toshiba Corporation.
+ * (C) Copyright 2020, Nobuhiro Iwamatsu <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "tmpv7708-visrobo-vrc.dtsi"
+
+/ {
+ model = "Toshiba TMPV7708 VisROBO (VRB) board";
+ compatible = "toshiba,tmpv7708-visrobo-vrb", "toshiba,tmpv7708";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ /* 768MB memory */
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x0 0x80000000 0x0 0x30000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+ clocks = <&uart_clk>;
+ clock-names = "apb_pclk";
+};
+
+&uart1 {
+ status = "okay";
+ clocks = <&uart_clk>;
+ clock-names = "apb_pclk";
+};
+
+&piether {
+ status = "okay";
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+ clocks = <&clk300mhz>, <&clk125mhz>;
+ clock-names = "stmmaceth", "phy_ref_clk";
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ reg = <0x1>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
new file mode 100644
index 000000000000..f0a93db6dde6
--- /dev/null
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree File for TMPV7708 VisROBO VRC SoM
+ *
+ * (C) Copyright 2020, 2021, Toshiba Corporation.
+ * (C) Copyright 2020, Nobuhiro Iwamatsu <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "tmpv7708.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+&wdt {
+ status = "okay";
+ clocks = <&wdt_clk>;
+};
+
+&gpio {
+ status = "okay";
+};
+
+&spi0_pins {
+ groups = "spi0_grp", "spi0_cs0_grp";
+};
+
+&spi0 {
+ status = "okay";
+ clocks = <&clk300mhz>, <&clk150mhz>;
+ clock-names = "sspclk", "apb_pclk";
+
+ mmc-slot@0 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ voltage-ranges = <3200 3400>;
+ spi-max-frequency = <12000000>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+ clocks = <&clk150mhz>;
+};
--
2.17.1
Hi,
> -----Original Message-----
> From: Yuji Ishikawa [mailto:[email protected]]
> Sent: Thursday, October 14, 2021 6:27 PM
> To: Rob Herring <[email protected]>; iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ) <[email protected]>
> Cc: agrawal punit(アグラワル プニト □ＳＷＣ◯ＡＣＴ) <[email protected]>; ishikawa yuji(石川 悠司 ○ＲＤ
> Ｃ□ＡＩＴＣ○ＥＡ開) <[email protected]>; [email protected];
> [email protected]; [email protected]
> Subject: [PATCH 0/3] arm64: dts: visconti: Add Toshiba Visconti TMPV7708 VisROBO VRB board support
>
> Hi,
>
> This series is a device tree for a new board
> with Toshiba's ARM SoC, Visconti[0].
> The board system, called VisROBO, consists of two parts:
> VRC SoM and VRB base board.
>
> Best regards,
> Yuji
>
> [0]: https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html
>
> Yuji Ishikawa (3):
> arm64: dts: visconti: Add 150MHz fixed clock to TMPV7708 SoC
> dt-bindings: arm: toshiba: Add the TMPV7708 VisROBO VRB board
> arm64: dts: visconti: Add DTS for the VisROBO board
>
> .../devicetree/bindings/arm/toshiba.yaml | 1 +
> arch/arm64/boot/dts/toshiba/Makefile | 1 +
> .../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 61 +++++++++++++++++++
> .../dts/toshiba/tmpv7708-visrobo-vrc.dtsi | 44 +++++++++++++
> arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 7 +++
> 5 files changed, 114 insertions(+)
> create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts
> create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
>
Applied, thanks.
Best regards,
Nobuhiro