2021-11-03 03:40:46

by Li, Meng

[permalink] [raw]
Subject: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for flash device

Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert
TCFQ users to XSPI FIFO mode ") and 6c1c26ecd9a3("spi:
spi-fsl-dspi: Accelerate transfers using larger word size if possible"),
on ls1043a-rdb platform, the spi work mode is changed from TCFQ
mode to XSPI mode. In order to keep the transmission sequence matches
with flash device, it is need to add delay between CS and CLK signal.
The strategy of generating delay value refers to QorIQ LS1043A
Reference Manual.

Signed-off-by: Meng Li <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 ++
1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
index 3a669238a0b8..3b1a31a063c6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -98,6 +98,8 @@
compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
reg = <0>;
spi-max-frequency = <1000000>; /* input clock */
+ fsl,spi-cs-sck-delay = <100>;
+ fsl,spi-sck-cs-delay = <100>;
};

slic@2 {
--
2.17.1


2021-11-15 02:20:11

by Li, Meng

[permalink] [raw]
Subject: RE: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for flash device

Is there any comments about this patch?

Thanks,
Limeng

> -----Original Message-----
> From: Li, Meng <[email protected]>
> Sent: Wednesday, November 3, 2021 11:39 AM
> To: [email protected]; [email protected]; [email protected]
> Cc: [email protected]; [email protected];
> [email protected]; Li, Meng <[email protected]>
> Subject: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for
> flash device
>
> Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert TCFQ users to XSPI
> FIFO mode ") and 6c1c26ecd9a3("spi:
> spi-fsl-dspi: Accelerate transfers using larger word size if possible"), on
> ls1043a-rdb platform, the spi work mode is changed from TCFQ mode to XSPI
> mode. In order to keep the transmission sequence matches with flash device,
> it is need to add delay between CS and CLK signal.
> The strategy of generating delay value refers to QorIQ LS1043A Reference
> Manual.
>
> Signed-off-by: Meng Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> index 3a669238a0b8..3b1a31a063c6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
> @@ -98,6 +98,8 @@
> compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
> reg = <0>;
> spi-max-frequency = <1000000>; /* input clock */
> + fsl,spi-cs-sck-delay = <100>;
> + fsl,spi-sck-cs-delay = <100>;
> };
>
> slic@2 {
> --
> 2.17.1


2021-11-21 09:17:47

by Shawn Guo

[permalink] [raw]
Subject: Re: [PATCH] arch: arm64: dts: add delay between CS and CLK signal for flash device

On Wed, Nov 03, 2021 at 11:38:38AM +0800, Meng Li wrote:
> Based on commit d59c90a2400f("spi: spi-fsl-dspi: Convert
> TCFQ users to XSPI FIFO mode ") and 6c1c26ecd9a3("spi:
> spi-fsl-dspi: Accelerate transfers using larger word size if possible"),
> on ls1043a-rdb platform, the spi work mode is changed from TCFQ
> mode to XSPI mode. In order to keep the transmission sequence matches
> with flash device, it is need to add delay between CS and CLK signal.
> The strategy of generating delay value refers to QorIQ LS1043A
> Reference Manual.
>
> Signed-off-by: Meng Li <[email protected]>

Updated the subject as below and applied the patch.

arm64: dts: fsl-ls1043a-rdb: add delay between CS and CLK signal for flash device

Shawn