update nor flash clock to the real one.
Signed-off-by: Chun-Jie Chen <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index d1c85d3e152b..db6f4c6dc404 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -464,9 +464,9 @@
compatible = "mediatek,mt8192-nor";
reg = <0 0x11234000 0 0xe0>;
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
- clocks = <&clk26m>,
- <&clk26m>,
- <&clk26m>;
+ clocks = <&topckgen CLK_TOP_SFLASH_SEL>,
+ <&infracfg CLK_INFRA_FLASHIF_SFLASH>,
+ <&infracfg CLK_INFRA_FLASHIF_TOP_H_133M>;
clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
--
2.18.0
Hi,
On Wed, Aug 25, 2021 at 09:11:19AM +0800, Chun-Jie Chen wrote:
> update nor flash clock to the real one.
Same comment from patch 1.
Reviewed-by: N?colas F. R. A. Prado <[email protected]>
Thanks,
N?colas
>
> Signed-off-by: Chun-Jie Chen <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index d1c85d3e152b..db6f4c6dc404 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -464,9 +464,9 @@
> compatible = "mediatek,mt8192-nor";
> reg = <0 0x11234000 0 0xe0>;
> interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
> - clocks = <&clk26m>,
> - <&clk26m>,
> - <&clk26m>;
> + clocks = <&topckgen CLK_TOP_SFLASH_SEL>,
> + <&infracfg CLK_INFRA_FLASHIF_SFLASH>,
> + <&infracfg CLK_INFRA_FLASHIF_TOP_H_133M>;
> clock-names = "spi", "sf", "axi";
> #address-cells = <1>;
> #size-cells = <0>;
> --
> 2.18.0
>
>