The most powerful m68k machine emulated by QEMU is a Quadra 800,
but this machine is very limited: only 1 GiB of memory and only some
specific interfaces, with no DMA.
The Virtual M68k Machine is based on Goldfish interfaces defined by Google
for Android simulator. It uses Goldfish-rtc (timer and RTC),
Goldfish-pic (PIC) and Goldfish-tty (for early tty).
The machine is created with 128 virtio-mmio buses, and they can
be used to add serial console, GPU, disk, NIC, HID, hwrng, 9PFS...
The virtual m68k machine has been merged in QEMU and will be available
with the release 6.0.
This series introduces the support of this new machine in the linux kernel.
If you want to try:
- Configure and build latest QEMU with (or download qemu 6.0 binary):
.../configure --target-list=m68k-softmmu --enable-virglrenderer
make
- Configure and build linux with:
make virt_defconfig
make vmlinux
A pre-installed qcow2 disk image is available at:
http://vivier.eu/debian-10.0.qcow2
You can run the machine with something like:
qemu-system-m68k -M virt \
-m 3G \
-chardev stdio,signal=off,mux=on,id=char0 \
-mon chardev=char0,mode=readline \
-kernel vmlinux \
-append "console=hvc0 root=/dev/vda2" \
-blockdev node-name=system,driver=file,filename=debian-10.0.qcow2 \
-blockdev node-name=drive0,driver=qcow2,file=system \
-device virtio-blk-device,drive=drive0 \
-serial chardev:char0 \
-device virtio-net-device,netdev=hostnet0 \
-netdev bridge,id=hostnet0,br=virbr0,helper=/usr/libexec/qemu-bridge-helper \
-device virtio-serial-device \
-device virtio-gpu-device \
-device virtconsole,chardev=char0 \
-device virtio-keyboard-device \
-device virtio-mouse-device
You can watch a presentation about the machine on the Planet m68k channel:
https://youtu.be/s_ve0bCC9q4
[Demo at 38:00]
v12:
- add request_resource() for pic and virtctrl
- enable virtio-snd in virt_defconfig
- add #include <linux/goldfish.h> in rtc and timer
v11:
- rename goldfish_ioread32()/goldfish_iowrite32() to gf_ioread32()/gfiowrite32()
- move them to linux/goldfish.h and m68k/asm/io.h
- change patches order (tty first to revert my previous work)
- fix clocksource by clearing interrupt on tick not on next_event()
and clearing shift
- add missing clocksource_register_hz()
- rebase
v10:
- move goldfish_ioread32()/goldfish_iowrite32() to io.h
- also update goldfish-tty
- use READ_ONCE()/WRITE_ONCE() for in_nmi
v9:
- include <linux/memblock.h> to declare min_low_pfn
- goldfish accessors: s/CONFIG_CPU_BIG_ENDIAN/CONFIG_M68K/
v8:
- GF_PUT_CHAR is a 32bit register (in arch/m68k/kernel/head.S)
- rework goldfish-pic and virt_ctrl
v7:
- add "#include <linux/slab.h>" in timer-goldfish.c for kzalloc()
- update timer-goldfish Kconfig
- remove EXPORT_SYMBOL()
- introduce goldfish_ioread32()/goldfish_iowrite32()
v6:
- fix goldfish-rtc endianness
- move goldfish-timer code to drivers/clocksource
- remove LEGACY_TIMER_TICK and use directly goldfish-timer
v5:
- add GENERIC_CLOCKEVENTS in Kconfig.machine
v4:
- update PATCH 1: comments and parameter names
- add a patch to move to generic clockevents
(I prefer to have a separate patch as it can be used as an example to
move from legacy timer tick to generic clockevents)
v3:
- introduce config.h to export prototypes to arch/m68k/kernel/setup_mm.c
- define virt_nmi_handler as static
v2:
- Remove VIRTO_MENU set y
- sort the selects
- add CONFIG_LOCALVERSION="-virt"
- generate virt_defconfig using "make savedefconfig"
- rename MACH_VIRTONLY to MACH_VIRT_ONLY
- add a test_notvirt label in head.S
- rework iounmap() to use two separate #ifdefs
- use %u in virt_get_model()
- drop show_registers() in config.c
- drop pr_err() from config_virt()
- sort includes in ints.c
- call virt_irq_enable() in virt_irq_startup()
- drop virt_irq_shutdown() and use virt_irq_disable()
- move in_nmi into virt_nmi_handler()
- use pr_warn() in virt_nmi_handler()
- rework goldfish_pic_irq() IRQ scan
- copy goldfish-pic IRQs related information from QEMU hw/m68k/virt
- add a comment to "min_low_pfn = 0"
- use platform_device_register_simple()
- use goldfish_timer_read(), upper_32_bits() and lower_32_bits()
Thanks,
Laurent
Laurent Vivier (5):
m68k: add asm/config.h
tty: goldfish: introduce gf_ioread32()/gf_iowrite32()
rtc: goldfish: use gf_ioread32()/gf_iowrite32()
clocksource/drivers: Add a goldfish-timer clocksource
m68k: introduce a virtual m68k machine
arch/m68k/Kbuild | 1 +
arch/m68k/Kconfig.machine | 17 +++
arch/m68k/amiga/config.c | 1 +
arch/m68k/apollo/config.c | 1 +
arch/m68k/atari/config.c | 1 +
arch/m68k/bvme6000/config.c | 1 +
arch/m68k/configs/virt_defconfig | 68 +++++++++
arch/m68k/hp300/config.c | 1 +
arch/m68k/include/asm/config.h | 35 +++++
arch/m68k/include/asm/io.h | 3 +
arch/m68k/include/asm/irq.h | 3 +-
arch/m68k/include/asm/pgtable_mm.h | 7 +
arch/m68k/include/asm/setup.h | 44 ++++--
arch/m68k/include/asm/virt.h | 25 ++++
arch/m68k/include/uapi/asm/bootinfo-virt.h | 18 +++
arch/m68k/include/uapi/asm/bootinfo.h | 1 +
arch/m68k/kernel/Makefile | 1 +
arch/m68k/kernel/head.S | 31 ++++
arch/m68k/kernel/setup_mm.c | 30 +---
arch/m68k/mac/config.c | 1 +
arch/m68k/mm/kmap.c | 23 ++-
arch/m68k/mvme147/config.c | 1 +
arch/m68k/mvme16x/config.c | 1 +
arch/m68k/q40/config.c | 1 +
arch/m68k/virt/Makefile | 6 +
arch/m68k/virt/config.c | 130 ++++++++++++++++
arch/m68k/virt/ints.c | 153 +++++++++++++++++++
arch/m68k/virt/platform.c | 72 +++++++++
drivers/clocksource/Kconfig | 7 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-goldfish.c | 163 +++++++++++++++++++++
drivers/rtc/rtc-goldfish.c | 31 ++--
drivers/tty/goldfish.c | 20 +--
include/clocksource/timer-goldfish.h | 11 ++
include/linux/goldfish.h | 15 +-
35 files changed, 856 insertions(+), 69 deletions(-)
create mode 100644 arch/m68k/configs/virt_defconfig
create mode 100644 arch/m68k/include/asm/config.h
create mode 100644 arch/m68k/include/asm/virt.h
create mode 100644 arch/m68k/include/uapi/asm/bootinfo-virt.h
create mode 100644 arch/m68k/virt/Makefile
create mode 100644 arch/m68k/virt/config.c
create mode 100644 arch/m68k/virt/ints.c
create mode 100644 arch/m68k/virt/platform.c
create mode 100644 drivers/clocksource/timer-goldfish.c
create mode 100644 include/clocksource/timer-goldfish.h
--
2.34.1
Revert
commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
and define gf_ioread32()/gf_iowrite32() to be able to use accessors
defined by the architecture.
Cc: [email protected] # v5.11+
Fixes: da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
Signed-off-by: Laurent Vivier <[email protected]>
---
drivers/tty/goldfish.c | 20 ++++++++++----------
include/linux/goldfish.h | 15 +++++++++++----
2 files changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c
index 5ed19a9857ad..10c13b93ed52 100644
--- a/drivers/tty/goldfish.c
+++ b/drivers/tty/goldfish.c
@@ -61,13 +61,13 @@ static void do_rw_io(struct goldfish_tty *qtty,
spin_lock_irqsave(&qtty->lock, irq_flags);
gf_write_ptr((void *)address, base + GOLDFISH_TTY_REG_DATA_PTR,
base + GOLDFISH_TTY_REG_DATA_PTR_HIGH);
- __raw_writel(count, base + GOLDFISH_TTY_REG_DATA_LEN);
+ gf_iowrite32(count, base + GOLDFISH_TTY_REG_DATA_LEN);
if (is_write)
- __raw_writel(GOLDFISH_TTY_CMD_WRITE_BUFFER,
+ gf_iowrite32(GOLDFISH_TTY_CMD_WRITE_BUFFER,
base + GOLDFISH_TTY_REG_CMD);
else
- __raw_writel(GOLDFISH_TTY_CMD_READ_BUFFER,
+ gf_iowrite32(GOLDFISH_TTY_CMD_READ_BUFFER,
base + GOLDFISH_TTY_REG_CMD);
spin_unlock_irqrestore(&qtty->lock, irq_flags);
@@ -142,7 +142,7 @@ static irqreturn_t goldfish_tty_interrupt(int irq, void *dev_id)
unsigned char *buf;
u32 count;
- count = __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
+ count = gf_ioread32(base + GOLDFISH_TTY_REG_BYTES_READY);
if (count == 0)
return IRQ_NONE;
@@ -159,7 +159,7 @@ static int goldfish_tty_activate(struct tty_port *port, struct tty_struct *tty)
{
struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
port);
- __raw_writel(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
+ gf_iowrite32(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
return 0;
}
@@ -167,7 +167,7 @@ static void goldfish_tty_shutdown(struct tty_port *port)
{
struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
port);
- __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
+ gf_iowrite32(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
}
static int goldfish_tty_open(struct tty_struct *tty, struct file *filp)
@@ -202,7 +202,7 @@ static unsigned int goldfish_tty_chars_in_buffer(struct tty_struct *tty)
{
struct goldfish_tty *qtty = &goldfish_ttys[tty->index];
void __iomem *base = qtty->base;
- return __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
+ return gf_ioread32(base + GOLDFISH_TTY_REG_BYTES_READY);
}
static void goldfish_tty_console_write(struct console *co, const char *b,
@@ -355,7 +355,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
* on Ranchu emulator (qemu2) returns 1 here and
* driver will use physical addresses.
*/
- qtty->version = __raw_readl(base + GOLDFISH_TTY_REG_VERSION);
+ qtty->version = gf_ioread32(base + GOLDFISH_TTY_REG_VERSION);
/*
* Goldfish TTY device on Ranchu emulator (qemu2)
@@ -374,7 +374,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
}
}
- __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
+ gf_iowrite32(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
ret = request_irq(irq, goldfish_tty_interrupt, IRQF_SHARED,
"goldfish_tty", qtty);
@@ -436,7 +436,7 @@ static int goldfish_tty_remove(struct platform_device *pdev)
#ifdef CONFIG_GOLDFISH_TTY_EARLY_CONSOLE
static void gf_early_console_putchar(struct uart_port *port, int ch)
{
- __raw_writel(ch, port->membase);
+ gf_iowrite32(ch, port->membase);
}
static void gf_early_write(struct console *con, const char *s, unsigned int n)
diff --git a/include/linux/goldfish.h b/include/linux/goldfish.h
index 12be1601fd84..bcc17f95b906 100644
--- a/include/linux/goldfish.h
+++ b/include/linux/goldfish.h
@@ -8,14 +8,21 @@
/* Helpers for Goldfish virtual platform */
+#ifndef gf_ioread32
+#define gf_ioread32 ioread32
+#endif
+#ifndef gf_iowrite32
+#define gf_iowrite32 iowrite32
+#endif
+
static inline void gf_write_ptr(const void *ptr, void __iomem *portl,
void __iomem *porth)
{
const unsigned long addr = (unsigned long)ptr;
- __raw_writel(lower_32_bits(addr), portl);
+ gf_iowrite32(lower_32_bits(addr), portl);
#ifdef CONFIG_64BIT
- __raw_writel(upper_32_bits(addr), porth);
+ gf_iowrite32(upper_32_bits(addr), porth);
#endif
}
@@ -23,9 +30,9 @@ static inline void gf_write_dma_addr(const dma_addr_t addr,
void __iomem *portl,
void __iomem *porth)
{
- __raw_writel(lower_32_bits(addr), portl);
+ gf_iowrite32(lower_32_bits(addr), portl);
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
- __raw_writel(upper_32_bits(addr), porth);
+ gf_iowrite32(upper_32_bits(addr), porth);
#endif
}
--
2.34.1
Add a clocksource based on the goldfish-rtc device.
Signed-off-by: Laurent Vivier <[email protected]>
---
drivers/clocksource/Kconfig | 7 ++
drivers/clocksource/Makefile | 1 +
drivers/clocksource/timer-goldfish.c | 163 +++++++++++++++++++++++++++
include/clocksource/timer-goldfish.h | 11 ++
4 files changed, 182 insertions(+)
create mode 100644 drivers/clocksource/timer-goldfish.c
create mode 100644 include/clocksource/timer-goldfish.h
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index cfb8ea0df3b1..94f00374cebb 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -721,4 +721,11 @@ config MICROCHIP_PIT64B
modes and high resolution. It is used as a clocksource
and a clockevent.
+config GOLDFISH_TIMER
+ bool "Clocksource using goldfish-rtc"
+ depends on M68K || COMPILE_TEST
+ depends on RTC_DRV_GOLDFISH
+ help
+ Support for the timer/counter of goldfish-rtc
+
endmenu
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index fa5f624eadb6..12f5d7e8cc2d 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -89,3 +89,4 @@ obj-$(CONFIG_GX6605S_TIMER) += timer-gx6605s.o
obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o
obj-$(CONFIG_MICROCHIP_PIT64B) += timer-microchip-pit64b.o
obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
+obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
diff --git a/drivers/clocksource/timer-goldfish.c b/drivers/clocksource/timer-goldfish.c
new file mode 100644
index 000000000000..4c670a1aea16
--- /dev/null
+++ b/drivers/clocksource/timer-goldfish.c
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/clocksource.h>
+#include <linux/clockchips.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/goldfish.h>
+#include <clocksource/timer-goldfish.h>
+
+#define TIMER_TIME_LOW 0x00 /* get low bits of current time */
+ /* and update TIMER_TIME_HIGH */
+#define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */
+ /* TIMER_TIME_LOW read */
+#define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */
+ /* activate it */
+#define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */
+#define TIMER_IRQ_ENABLED 0x10
+#define TIMER_CLEAR_ALARM 0x14
+#define TIMER_ALARM_STATUS 0x18
+#define TIMER_CLEAR_INTERRUPT 0x1c
+
+struct goldfish_timer {
+ struct clocksource cs;
+ struct clock_event_device ced;
+ struct resource res;
+ void __iomem *base;
+ int irq;
+};
+
+static struct goldfish_timer *ced_to_gf(struct clock_event_device *ced)
+{
+ return container_of(ced, struct goldfish_timer, ced);
+}
+
+static struct goldfish_timer *cs_to_gf(struct clocksource *cs)
+{
+ return container_of(cs, struct goldfish_timer, cs);
+}
+
+static u64 goldfish_timer_read(struct clocksource *cs)
+{
+ struct goldfish_timer *timerdrv = cs_to_gf(cs);
+ void __iomem *base = timerdrv->base;
+ u32 time_low, time_high;
+ u64 ticks;
+
+ /*
+ * time_low: get low bits of current time and update time_high
+ * time_high: get high bits of time at last time_low read
+ */
+ time_low = gf_ioread32(base + TIMER_TIME_LOW);
+ time_high = gf_ioread32(base + TIMER_TIME_HIGH);
+
+ ticks = ((u64)time_high << 32) | time_low;
+
+ return ticks;
+}
+
+static int goldfish_timer_set_oneshot(struct clock_event_device *evt)
+{
+ struct goldfish_timer *timerdrv = ced_to_gf(evt);
+ void __iomem *base = timerdrv->base;
+
+ gf_iowrite32(0, base + TIMER_ALARM_HIGH);
+ gf_iowrite32(0, base + TIMER_ALARM_LOW);
+ gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
+
+ return 0;
+}
+
+static int goldfish_timer_shutdown(struct clock_event_device *evt)
+{
+ struct goldfish_timer *timerdrv = ced_to_gf(evt);
+ void __iomem *base = timerdrv->base;
+
+ gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
+
+ return 0;
+}
+
+static int goldfish_timer_next_event(unsigned long delta,
+ struct clock_event_device *evt)
+{
+ struct goldfish_timer *timerdrv = ced_to_gf(evt);
+ void __iomem *base = timerdrv->base;
+ u64 now;
+
+ now = goldfish_timer_read(&timerdrv->cs);
+
+ now += delta;
+
+ gf_iowrite32(upper_32_bits(now), base + TIMER_ALARM_HIGH);
+ gf_iowrite32(lower_32_bits(now), base + TIMER_ALARM_LOW);
+
+ return 0;
+}
+
+static irqreturn_t golfish_timer_tick(int irq, void *dev_id)
+{
+ struct clock_event_device *evt = dev_id;
+ struct goldfish_timer *timerdrv = ced_to_gf(evt);
+ void __iomem *base = timerdrv->base;
+
+ gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
+
+ evt->event_handler(evt);
+
+ return IRQ_HANDLED;
+}
+
+void __init goldfish_timer_init(int irq, void __iomem *base)
+{
+ struct goldfish_timer *timerdrv;
+ int ret;
+
+ timerdrv = kzalloc(sizeof(*timerdrv), GFP_KERNEL);
+ if (!timerdrv)
+ return;
+
+ timerdrv->base = base;
+ timerdrv->irq = irq;
+
+ timerdrv->ced = (struct clock_event_device){
+ .name = "goldfish_timer",
+ .features = CLOCK_EVT_FEAT_ONESHOT,
+ .set_state_shutdown = goldfish_timer_shutdown,
+ .set_state_oneshot = goldfish_timer_set_oneshot,
+ .set_next_event = goldfish_timer_next_event,
+ };
+ timerdrv->res = (struct resource){
+ .name = "goldfish_timer",
+ .start = (unsigned long)base,
+ .end = (unsigned long)base + 0xfff,
+ };
+
+ if (request_resource(&iomem_resource, &timerdrv->res)) {
+ pr_err("Cannot allocate goldfish-timer resource\n");
+ return;
+ }
+
+ timerdrv->cs = (struct clocksource){
+ .name = "goldfish_timer",
+ .rating = 400,
+ .read = goldfish_timer_read,
+ .mask = CLOCKSOURCE_MASK(64),
+ .flags = 0,
+ .max_idle_ns = LONG_MAX,
+ };
+
+ clocksource_register_hz(&timerdrv->cs, NSEC_PER_SEC);
+
+ ret = request_irq(timerdrv->irq, golfish_timer_tick, IRQF_TIMER,
+ "goldfish_timer", &timerdrv->ced);
+ if (ret) {
+ pr_err("Couldn't register goldfish-timer interrupt\n");
+ return;
+ }
+
+ clockevents_config_and_register(&timerdrv->ced, NSEC_PER_SEC,
+ 1, 0xffffffff);
+}
diff --git a/include/clocksource/timer-goldfish.h b/include/clocksource/timer-goldfish.h
new file mode 100644
index 000000000000..b237267844f1
--- /dev/null
+++ b/include/clocksource/timer-goldfish.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * goldfish-timer clocksource
+ */
+
+#ifndef _CLOCKSOURCE_GOLDFISH_TIMER_H
+#define _CLOCKSOURCE_GOLDFISH_TIMER_H
+
+extern void goldfish_timer_init(int irq, void __iomem *base);
+
+#endif /* _CLOCKSOURCE_GOLDFISH_TIMER_H */
--
2.34.1
This machine allows to have up to 3.2 GiB and 128 Virtio devices.
It is based on android goldfish devices.
Signed-off-by: Laurent Vivier <[email protected]>
---
arch/m68k/Kbuild | 1 +
arch/m68k/Kconfig.machine | 17 +++
arch/m68k/configs/virt_defconfig | 68 +++++++++
arch/m68k/include/asm/config.h | 2 +
arch/m68k/include/asm/io.h | 3 +
arch/m68k/include/asm/irq.h | 3 +-
arch/m68k/include/asm/pgtable_mm.h | 7 +
arch/m68k/include/asm/setup.h | 44 ++++--
arch/m68k/include/asm/virt.h | 25 ++++
arch/m68k/include/uapi/asm/bootinfo-virt.h | 18 +++
arch/m68k/include/uapi/asm/bootinfo.h | 1 +
arch/m68k/kernel/Makefile | 1 +
arch/m68k/kernel/head.S | 31 +++++
arch/m68k/kernel/setup_mm.c | 7 +
arch/m68k/mm/kmap.c | 23 +++-
arch/m68k/virt/Makefile | 6 +
arch/m68k/virt/config.c | 130 +++++++++++++++++
arch/m68k/virt/ints.c | 153 +++++++++++++++++++++
arch/m68k/virt/platform.c | 72 ++++++++++
19 files changed, 594 insertions(+), 18 deletions(-)
create mode 100644 arch/m68k/configs/virt_defconfig
create mode 100644 arch/m68k/include/asm/virt.h
create mode 100644 arch/m68k/include/uapi/asm/bootinfo-virt.h
create mode 100644 arch/m68k/virt/Makefile
create mode 100644 arch/m68k/virt/config.c
create mode 100644 arch/m68k/virt/ints.c
create mode 100644 arch/m68k/virt/platform.c
diff --git a/arch/m68k/Kbuild b/arch/m68k/Kbuild
index 18abb35c26a1..7762af9f6def 100644
--- a/arch/m68k/Kbuild
+++ b/arch/m68k/Kbuild
@@ -17,3 +17,4 @@ obj-$(CONFIG_M68060) += ifpsp060/
obj-$(CONFIG_M68KFPU_EMU) += math-emu/
obj-$(CONFIG_M68000) += 68000/
obj-$(CONFIG_COLDFIRE) += coldfire/
+obj-$(CONFIG_VIRT) += virt/
diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine
index eeab4f3e6c19..13b900bf8eb8 100644
--- a/arch/m68k/Kconfig.machine
+++ b/arch/m68k/Kconfig.machine
@@ -149,6 +149,23 @@ config SUN3
If you don't want to compile a kernel exclusively for a Sun 3, say N.
+config VIRT
+ bool "Virtual M68k Machine support"
+ depends on MMU
+ select GENERIC_CLOCKEVENTS
+ select M68040
+ select MMU_MOTOROLA if MMU
+ select RTC_CLASS
+ select GOLDFISH
+ select RTC_DRV_GOLDFISH
+ select GOLDFISH_TIMER
+ select GOLDFISH_TTY
+ select TTY
+ select VIRTIO_MMIO
+ help
+ This options enable a pure virtual machine based on m68k,
+ VIRTIO MMIO devices and GOLDFISH interfaces (TTY, RTC, PIC)
+
config PILOT
bool
diff --git a/arch/m68k/configs/virt_defconfig b/arch/m68k/configs/virt_defconfig
new file mode 100644
index 000000000000..8059bd618370
--- /dev/null
+++ b/arch/m68k/configs/virt_defconfig
@@ -0,0 +1,68 @@
+CONFIG_LOCALVERSION="-virt"
+CONFIG_SYSVIPC=y
+CONFIG_CGROUPS=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_VIRT=y
+CONFIG_PROC_HARDWARE=y
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_ATARI_PARTITION=y
+CONFIG_MAC_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+CONFIG_LDM_PARTITION=y
+CONFIG_LDM_DEBUG=y
+CONFIG_SUN_PARTITION=y
+CONFIG_SYSV68_PARTITION=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_CGROUP_NET_CLASSID=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
+CONFIG_DEVTMPFS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_VIRTIO=y
+CONFIG_NETDEVICES=y
+CONFIG_VIRTIO_NET=y
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_VIRTIO_CONSOLE=y
+CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_DRM=y
+CONFIG_DRM_VIRTIO_GPU=y
+CONFIG_FB=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+CONFIG_SND_VIRTIO=y
+CONFIG_VIRT_DRIVERS=y
+CONFIG_VIRTIO_INPUT=y
+CONFIG_EXT4_FS=y
+CONFIG_AUTOFS_FS=y
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_9P_FS=y
+CONFIG_9P_FS_POSIX_ACL=y
+CONFIG_9P_FS_SECURITY=y
+CONFIG_EARLY_PRINTK=y
diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h
index aae61070628b..b9dacc52f2c8 100644
--- a/arch/m68k/include/asm/config.h
+++ b/arch/m68k/include/asm/config.h
@@ -17,6 +17,7 @@ extern int mvme16x_parse_bootinfo(const struct bi_record *record);
extern int mvme147_parse_bootinfo(const struct bi_record *record);
extern int hp300_parse_bootinfo(const struct bi_record *record);
extern int apollo_parse_bootinfo(const struct bi_record *record);
+extern int virt_parse_bootinfo(const struct bi_record *record);
extern void config_amiga(void);
extern void config_atari(void);
@@ -29,5 +30,6 @@ extern void config_bvme6000(void);
extern void config_hp300(void);
extern void config_q40(void);
extern void config_sun3x(void);
+extern void config_virt(void);
#endif /* _M68K_CONFIG_H */
diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h
index aabe6420ead2..aaeabc65e63c 100644
--- a/arch/m68k/include/asm/io.h
+++ b/arch/m68k/include/asm/io.h
@@ -8,6 +8,9 @@
#include <asm/io_mm.h>
#endif
+#define gf_ioread32 ioread32be
+#define gf_iowrite32 iowrite32be
+
#include <asm-generic/io.h>
#endif /* _M68K_IO_H */
diff --git a/arch/m68k/include/asm/irq.h b/arch/m68k/include/asm/irq.h
index 91dd493791d7..7829e955ca04 100644
--- a/arch/m68k/include/asm/irq.h
+++ b/arch/m68k/include/asm/irq.h
@@ -12,7 +12,8 @@
*/
#if defined(CONFIG_COLDFIRE)
#define NR_IRQS 256
-#elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || defined(CONFIG_SUN3X)
+#elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || \
+ defined(CONFIG_SUN3X) || defined(CONFIG_VIRT)
#define NR_IRQS 200
#elif defined(CONFIG_ATARI)
#define NR_IRQS 141
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
index 143ba7de9bda..9b4e2fe2ac82 100644
--- a/arch/m68k/include/asm/pgtable_mm.h
+++ b/arch/m68k/include/asm/pgtable_mm.h
@@ -80,6 +80,9 @@
#elif defined(CONFIG_COLDFIRE)
#define KMAP_START 0xe0000000
#define KMAP_END 0xf0000000
+#elif defined(CONFIG_VIRT)
+#define KMAP_START 0xdf000000
+#define KMAP_END 0xff000000
#else
#define KMAP_START 0xd0000000
#define KMAP_END 0xf0000000
@@ -92,6 +95,10 @@ extern unsigned long m68k_vmalloc_end;
#elif defined(CONFIG_COLDFIRE)
#define VMALLOC_START 0xd0000000
#define VMALLOC_END 0xe0000000
+#elif defined(CONFIG_VIRT)
+#define VMALLOC_OFFSET PAGE_SIZE
+#define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
+#define VMALLOC_END KMAP_START
#else
/* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
diff --git a/arch/m68k/include/asm/setup.h b/arch/m68k/include/asm/setup.h
index 8f2023f8c1c4..2c99477aaf89 100644
--- a/arch/m68k/include/asm/setup.h
+++ b/arch/m68k/include/asm/setup.h
@@ -37,7 +37,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_ATARI) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
|| defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_AMIGA (m68k_machtype == MACH_AMIGA)
#else
# define MACH_AMIGA_ONLY
@@ -50,7 +51,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_APOLLO) \
|| defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_ATARI (m68k_machtype == MACH_ATARI)
#else
# define MACH_ATARI_ONLY
@@ -63,7 +65,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_ATARI) || defined(CONFIG_APOLLO) \
|| defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_MAC (m68k_machtype == MACH_MAC)
#else
# define MACH_MAC_ONLY
@@ -84,7 +87,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_APOLLO (m68k_machtype == MACH_APOLLO)
#else
# define MACH_APOLLO_ONLY
@@ -97,7 +101,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_MVME147 (m68k_machtype == MACH_MVME147)
#else
# define MACH_MVME147_ONLY
@@ -110,7 +115,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_BVME6000) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_MVME16x (m68k_machtype == MACH_MVME16x)
#else
# define MACH_MVME16x_ONLY
@@ -123,7 +129,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
|| defined(CONFIG_HP300) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_BVME6000 (m68k_machtype == MACH_BVME6000)
#else
# define MACH_BVME6000_ONLY
@@ -136,7 +143,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
|| defined(CONFIG_BVME6000) || defined(CONFIG_Q40) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_HP300 (m68k_machtype == MACH_HP300)
#else
# define MACH_HP300_ONLY
@@ -149,7 +157,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
|| defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
- || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147)
+ || defined(CONFIG_SUN3X) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_Q40 (m68k_machtype == MACH_Q40)
#else
# define MACH_Q40_ONLY
@@ -162,7 +171,8 @@ extern unsigned long m68k_machtype;
#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
|| defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
|| defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
- || defined(CONFIG_Q40) || defined(CONFIG_MVME147)
+ || defined(CONFIG_Q40) || defined(CONFIG_MVME147) \
+ || defined(CONFIG_VIRT)
# define MACH_IS_SUN3X (m68k_machtype == MACH_SUN3X)
#else
# define CONFIG_SUN3X_ONLY
@@ -170,6 +180,20 @@ extern unsigned long m68k_machtype;
# define MACH_TYPE (MACH_SUN3X)
#endif
+#if !defined(CONFIG_VIRT)
+# define MACH_IS_VIRT (0)
+#elif defined(CONFIG_AMIGA) || defined(CONFIG_MAC) || defined(CONFIG_ATARI) \
+ || defined(CONFIG_APOLLO) || defined(CONFIG_MVME16x) \
+ || defined(CONFIG_BVME6000) || defined(CONFIG_HP300) \
+ || defined(CONFIG_Q40) || defined(CONFIG_SUN3X) \
+ || defined(CONFIG_MVME147)
+# define MACH_IS_VIRT (m68k_machtype == MACH_VIRT)
+#else
+# define MACH_VIRT_ONLY
+# define MACH_IS_VIRT (1)
+# define MACH_TYPE (MACH_VIRT)
+#endif
+
#ifndef MACH_TYPE
# define MACH_TYPE (m68k_machtype)
#endif
diff --git a/arch/m68k/include/asm/virt.h b/arch/m68k/include/asm/virt.h
new file mode 100644
index 000000000000..87647c17afd7
--- /dev/null
+++ b/arch/m68k/include/asm/virt.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_VIRT_H
+#define __ASM_VIRT_H
+
+#define NUM_VIRT_SOURCES 200
+
+struct virt_booter_device_data {
+ unsigned long mmio;
+ unsigned long irq;
+};
+
+struct virt_booter_data {
+ unsigned long qemu_version;
+ struct virt_booter_device_data pic;
+ struct virt_booter_device_data rtc;
+ struct virt_booter_device_data tty;
+ struct virt_booter_device_data ctrl;
+ struct virt_booter_device_data virtio;
+};
+
+extern struct virt_booter_data virt_bi_data;
+
+extern void __init virt_init_IRQ(void);
+
+#endif
diff --git a/arch/m68k/include/uapi/asm/bootinfo-virt.h b/arch/m68k/include/uapi/asm/bootinfo-virt.h
new file mode 100644
index 000000000000..e4db7e2213ab
--- /dev/null
+++ b/arch/m68k/include/uapi/asm/bootinfo-virt.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ * asm/bootinfo-virt.h -- Virtual-m68k-specific boot information definitions
+ */
+
+#ifndef _UAPI_ASM_M68K_BOOTINFO_VIRT_H
+#define _UAPI_ASM_M68K_BOOTINFO_VIRT_H
+
+#define BI_VIRT_QEMU_VERSION 0x8000
+#define BI_VIRT_GF_PIC_BASE 0x8001
+#define BI_VIRT_GF_RTC_BASE 0x8002
+#define BI_VIRT_GF_TTY_BASE 0x8003
+#define BI_VIRT_VIRTIO_BASE 0x8004
+#define BI_VIRT_CTRL_BASE 0x8005
+
+#define VIRT_BOOTI_VERSION MK_BI_VERSION(2, 0)
+
+#endif /* _UAPI_ASM_M68K_BOOTINFO_MAC_H */
diff --git a/arch/m68k/include/uapi/asm/bootinfo.h b/arch/m68k/include/uapi/asm/bootinfo.h
index 38d3140381fa..203d9cbf9630 100644
--- a/arch/m68k/include/uapi/asm/bootinfo.h
+++ b/arch/m68k/include/uapi/asm/bootinfo.h
@@ -83,6 +83,7 @@ struct mem_info {
#define MACH_SUN3X 11
#define MACH_M54XX 12
#define MACH_M5441X 13
+#define MACH_VIRT 14
/*
diff --git a/arch/m68k/kernel/Makefile b/arch/m68k/kernel/Makefile
index dbac7f8743fc..c0833da6a2ca 100644
--- a/arch/m68k/kernel/Makefile
+++ b/arch/m68k/kernel/Makefile
@@ -11,6 +11,7 @@ extra-$(CONFIG_VME) := head.o
extra-$(CONFIG_HP300) := head.o
extra-$(CONFIG_Q40) := head.o
extra-$(CONFIG_SUN3X) := head.o
+extra-$(CONFIG_VIRT) := head.o
extra-$(CONFIG_SUN3) := sun3-head.o
extra-y += vmlinux.lds
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index 493c95db0e51..9e812d8606be 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -262,6 +262,7 @@
#include <asm/bootinfo-hp300.h>
#include <asm/bootinfo-mac.h>
#include <asm/bootinfo-q40.h>
+#include <asm/bootinfo-virt.h>
#include <asm/bootinfo-vme.h>
#include <asm/setup.h>
#include <asm/entry.h>
@@ -534,6 +535,7 @@ func_define putn,1
#define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
#define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
#define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
+#define is_not_virt(lab) cmpl &MACH_VIRT,%pc@(m68k_machtype); jne lab
#define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
jeq 42f; \
@@ -647,6 +649,14 @@ ENTRY(__start)
L(test_notmac):
#endif /* CONFIG_MAC */
+#ifdef CONFIG_VIRT
+ is_not_virt(L(test_notvirt))
+
+ get_bi_record BI_VIRT_GF_TTY_BASE
+ lea %pc@(L(virt_gf_tty_base)),%a1
+ movel %a0@,%a1@
+L(test_notvirt):
+#endif /* CONFIG_VIRT */
/*
* There are ultimately two pieces of information we want for all kinds of
@@ -1237,6 +1247,13 @@ L(mmu_init_not_mac):
L(notsun3x):
#endif
+#ifdef CONFIG_VIRT
+ is_not_virt(L(novirt))
+ mmu_map_tt #1,#0xFF000000,#0x01000000,#_PAGE_NOCACHE_S
+ jbra L(mmu_init_done)
+L(novirt):
+#endif
+
#ifdef CONFIG_APOLLO
is_not_apollo(L(notapollo))
@@ -3186,6 +3203,14 @@ func_start serial_putc,%d0/%d1/%a0/%a1
3:
#endif
+#ifdef CONFIG_VIRT
+ is_not_virt(1f)
+
+ movel L(virt_gf_tty_base),%a1
+ movel %d0,%a1@(GF_PUT_CHAR)
+1:
+#endif
+
L(serial_putc_done):
func_return serial_putc
@@ -3865,3 +3890,9 @@ q40_mem_cptr:
L(q40_do_debug):
.long 0
#endif
+
+#if defined(CONFIG_VIRT)
+GF_PUT_CHAR = 0x00
+L(virt_gf_tty_base):
+ .long 0
+#endif /* CONFIG_VIRT */
diff --git a/arch/m68k/kernel/setup_mm.c b/arch/m68k/kernel/setup_mm.c
index 8228275aae3e..39ba09ccb538 100644
--- a/arch/m68k/kernel/setup_mm.c
+++ b/arch/m68k/kernel/setup_mm.c
@@ -182,6 +182,8 @@ static void __init m68k_parse_bootinfo(const struct bi_record *record)
unknown = hp300_parse_bootinfo(record);
else if (MACH_IS_APOLLO)
unknown = apollo_parse_bootinfo(record);
+ else if (MACH_IS_VIRT)
+ unknown = virt_parse_bootinfo(record);
else
unknown = 1;
}
@@ -312,6 +314,11 @@ void __init setup_arch(char **cmdline_p)
cf_mmu_context_init();
config_BSP(NULL, 0);
break;
+#endif
+#ifdef CONFIG_VIRT
+ case MACH_VIRT:
+ config_virt();
+ break;
#endif
default:
panic("No configuration setup");
diff --git a/arch/m68k/mm/kmap.c b/arch/m68k/mm/kmap.c
index 20ddf71b43d0..39729f40d106 100644
--- a/arch/m68k/mm/kmap.c
+++ b/arch/m68k/mm/kmap.c
@@ -179,6 +179,12 @@ void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cachefla
return (void __iomem *)physaddr;
}
#endif
+#ifdef CONFIG_VIRT
+ if (MACH_IS_VIRT) {
+ if (physaddr >= 0xff000000 && cacheflag == IOMAP_NOCACHE_SER)
+ return (void __iomem *)physaddr;
+ }
+#endif
#ifdef CONFIG_COLDFIRE
if (__cf_internalio(physaddr))
return (void __iomem *) physaddr;
@@ -292,18 +298,21 @@ EXPORT_SYMBOL(__ioremap);
*/
void iounmap(void __iomem *addr)
{
-#ifdef CONFIG_AMIGA
- if ((!MACH_IS_AMIGA) ||
- (((unsigned long)addr < 0x40000000) ||
- ((unsigned long)addr > 0x60000000)))
- free_io_area((__force void *)addr);
-#else
+#if defined(CONFIG_AMIGA)
+ if (MACH_IS_AMIGA &&
+ ((unsigned long)addr >= 0x40000000) &&
+ ((unsigned long)addr < 0x60000000))
+ return;
+#endif
+#if defined(CONFIG_VIRT)
+ if (MACH_IS_VIRT && (unsigned long)addr >= 0xff000000)
+ return;
+#endif
#ifdef CONFIG_COLDFIRE
if (cf_internalio(addr))
return;
#endif
free_io_area((__force void *)addr);
-#endif
}
EXPORT_SYMBOL(iounmap);
diff --git a/arch/m68k/virt/Makefile b/arch/m68k/virt/Makefile
new file mode 100644
index 000000000000..54b9b2866654
--- /dev/null
+++ b/arch/m68k/virt/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Makefile for Linux arch/m68k/virt source directory
+#
+
+obj-y := config.o ints.o platform.o
diff --git a/arch/m68k/virt/config.c b/arch/m68k/virt/config.c
new file mode 100644
index 000000000000..a4a7882b4386
--- /dev/null
+++ b/arch/m68k/virt/config.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/serial_core.h>
+#include <clocksource/timer-goldfish.h>
+
+#include <asm/bootinfo.h>
+#include <asm/bootinfo-virt.h>
+#include <asm/byteorder.h>
+#include <asm/machdep.h>
+#include <asm/virt.h>
+#include <asm/config.h>
+
+struct virt_booter_data virt_bi_data;
+
+#define VIRT_CTRL_REG_FEATURES 0x00
+#define VIRT_CTRL_REG_CMD 0x04
+
+static struct resource ctrlres;
+
+enum {
+ CMD_NOOP,
+ CMD_RESET,
+ CMD_HALT,
+ CMD_PANIC,
+};
+
+static void virt_get_model(char *str)
+{
+ /* str is 80 characters long */
+ sprintf(str, "QEMU Virtual M68K Machine (%u.%u.%u)",
+ (u8)(virt_bi_data.qemu_version >> 24),
+ (u8)(virt_bi_data.qemu_version >> 16),
+ (u8)(virt_bi_data.qemu_version >> 8));
+}
+
+static void virt_halt(void)
+{
+ void __iomem *base = (void *)virt_bi_data.ctrl.mmio;
+
+ iowrite32be(CMD_HALT, base + VIRT_CTRL_REG_CMD);
+ local_irq_disable();
+ while (1)
+ ;
+}
+
+static void virt_reset(void)
+{
+ void __iomem *base = (void *)virt_bi_data.ctrl.mmio;
+
+ iowrite32be(CMD_RESET, base + VIRT_CTRL_REG_CMD);
+ local_irq_disable();
+ while (1)
+ ;
+}
+
+/*
+ * Parse a virtual-m68k-specific record in the bootinfo
+ */
+
+int __init virt_parse_bootinfo(const struct bi_record *record)
+{
+ int unknown = 0;
+ const void *data = record->data;
+
+ switch (be16_to_cpu(record->tag)) {
+ case BI_VIRT_QEMU_VERSION:
+ virt_bi_data.qemu_version = be32_to_cpup(data);
+ break;
+ case BI_VIRT_GF_PIC_BASE:
+ virt_bi_data.pic.mmio = be32_to_cpup(data);
+ data += 4;
+ virt_bi_data.pic.irq = be32_to_cpup(data);
+ break;
+ case BI_VIRT_GF_RTC_BASE:
+ virt_bi_data.rtc.mmio = be32_to_cpup(data);
+ data += 4;
+ virt_bi_data.rtc.irq = be32_to_cpup(data);
+ break;
+ case BI_VIRT_GF_TTY_BASE:
+ virt_bi_data.tty.mmio = be32_to_cpup(data);
+ data += 4;
+ virt_bi_data.tty.irq = be32_to_cpup(data);
+ break;
+ case BI_VIRT_CTRL_BASE:
+ virt_bi_data.ctrl.mmio = be32_to_cpup(data);
+ data += 4;
+ virt_bi_data.ctrl.irq = be32_to_cpup(data);
+ break;
+ case BI_VIRT_VIRTIO_BASE:
+ virt_bi_data.virtio.mmio = be32_to_cpup(data);
+ data += 4;
+ virt_bi_data.virtio.irq = be32_to_cpup(data);
+ break;
+ default:
+ unknown = 1;
+ break;
+ }
+ return unknown;
+}
+
+static void __init virt_sched_init(void)
+{
+ goldfish_timer_init(virt_bi_data.rtc.irq,
+ (void *)virt_bi_data.rtc.mmio);
+}
+
+void __init config_virt(void)
+{
+ char earlycon[24];
+
+ snprintf(earlycon, sizeof(earlycon), "early_gf_tty,0x%08lx",
+ virt_bi_data.tty.mmio);
+ setup_earlycon(earlycon);
+
+ ctrlres = (struct resource)
+ DEFINE_RES_MEM_NAMED(virt_bi_data.ctrl.mmio, 0x100,
+ "virtctrl");
+
+ if (request_resource(&iomem_resource, &ctrlres)) {
+ pr_err("Cannot allocate virt controller resource\n");
+ return;
+ }
+
+ mach_init_IRQ = virt_init_IRQ;
+ mach_sched_init = virt_sched_init;
+ mach_get_model = virt_get_model;
+ mach_reset = virt_reset;
+ mach_halt = virt_halt;
+ mach_power_off = virt_halt;
+}
diff --git a/arch/m68k/virt/ints.c b/arch/m68k/virt/ints.c
new file mode 100644
index 000000000000..caca8949dbf0
--- /dev/null
+++ b/arch/m68k/virt/ints.c
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/sched/debug.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+
+#include <asm/hwtest.h>
+#include <asm/irq.h>
+#include <asm/irq_regs.h>
+#include <asm/virt.h>
+
+#define GFPIC_REG_IRQ_PENDING 0x04
+#define GFPIC_REG_IRQ_DISABLE_ALL 0x08
+#define GFPIC_REG_IRQ_DISABLE 0x0c
+#define GFPIC_REG_IRQ_ENABLE 0x10
+
+extern void show_registers(struct pt_regs *regs);
+
+static struct resource picres[6];
+static const char *picname[6] = {
+ "goldfish_pic.0",
+ "goldfish_pic.1",
+ "goldfish_pic.2",
+ "goldfish_pic.3",
+ "goldfish_pic.4",
+ "goldfish_pic.5"
+};
+
+/*
+ * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
+ * CPU IRQ #1 -> PIC #1
+ * IRQ #1 to IRQ #31 -> unused
+ * IRQ #32 -> goldfish-tty
+ * CPU IRQ #2 -> PIC #2
+ * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
+ * CPU IRQ #3 -> PIC #3
+ * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
+ * CPU IRQ #4 -> PIC #4
+ * IRQ #1 to IRQ #32 -> virtio-mmio from 65 to 96
+ * CPU IRQ #5 -> PIC #5
+ * IRQ #1 to IRQ #32 -> virtio-mmio from 97 to 128
+ * CPU IRQ #6 -> PIC #6
+ * IRQ #1 -> goldfish-timer
+ * IRQ #2 -> goldfish-rtc
+ * IRQ #3 to IRQ #32 -> unused
+ * CPU IRQ #7 -> NMI
+ */
+
+static u32 gfpic_read(int pic, int reg)
+{
+ void __iomem *base = (void *)(virt_bi_data.pic.mmio + pic * 0x1000);
+
+ return ioread32be(base + reg);
+}
+
+static void gfpic_write(u32 value, int pic, int reg)
+{
+ void __iomem *base = (void *)(virt_bi_data.pic.mmio + pic * 0x1000);
+
+ iowrite32be(value, base + reg);
+}
+
+#define GF_PIC(irq) ((irq - IRQ_USER) / 32)
+#define GF_IRQ(irq) ((irq - IRQ_USER) % 32)
+
+static void virt_irq_enable(struct irq_data *data)
+{
+ gfpic_write(1 << GF_IRQ(data->irq), GF_PIC(data->irq),
+ GFPIC_REG_IRQ_ENABLE);
+}
+
+static void virt_irq_disable(struct irq_data *data)
+{
+ gfpic_write(1 << GF_IRQ(data->irq), GF_PIC(data->irq),
+ GFPIC_REG_IRQ_DISABLE);
+}
+
+static unsigned int virt_irq_startup(struct irq_data *data)
+{
+ virt_irq_enable(data);
+ return 0;
+}
+
+static irqreturn_t virt_nmi_handler(int irq, void *dev_id)
+{
+ static int in_nmi;
+
+ if (READ_ONCE(in_nmi))
+ return IRQ_HANDLED;
+ WRITE_ONCE(in_nmi, 1);
+
+ pr_warn("Non-Maskable Interrupt\n");
+ show_registers(get_irq_regs());
+
+ WRITE_ONCE(in_nmi, 0);
+ return IRQ_HANDLED;
+}
+
+static struct irq_chip virt_irq_chip = {
+ .name = "virt",
+ .irq_enable = virt_irq_enable,
+ .irq_disable = virt_irq_disable,
+ .irq_startup = virt_irq_startup,
+ .irq_shutdown = virt_irq_disable,
+};
+
+static void goldfish_pic_irq(struct irq_desc *desc)
+{
+ u32 irq_pending;
+ int irq_num;
+ int pic = desc->irq_data.irq - 1;
+
+ irq_pending = gfpic_read(pic, GFPIC_REG_IRQ_PENDING);
+ irq_num = IRQ_USER + pic * 32;
+
+ do {
+ if (irq_pending & 1)
+ generic_handle_irq(irq_num);
+ ++irq_num;
+ irq_pending >>= 1;
+ } while (irq_pending);
+}
+
+void __init virt_init_IRQ(void)
+{
+ int pic;
+
+ m68k_setup_irq_controller(&virt_irq_chip, handle_simple_irq, IRQ_USER,
+ NUM_VIRT_SOURCES - IRQ_USER);
+
+ for (pic = 0; pic < 6; pic++) {
+
+ picres[pic] = (struct resource)
+ DEFINE_RES_MEM_NAMED(virt_bi_data.pic.mmio + pic * 0x1000,
+ 0x1000, picname[pic]);
+ if (request_resource(&iomem_resource, &picres[pic])) {
+ pr_err("Cannot allocate %s resource\n", picname[pic]);
+ return;
+ }
+
+ irq_set_chained_handler(virt_bi_data.pic.irq + pic,
+ goldfish_pic_irq);
+ }
+
+ if (request_irq(IRQ_AUTO_7, virt_nmi_handler, 0, "NMI",
+ virt_nmi_handler))
+ pr_err("Couldn't register NMI\n");
+}
diff --git a/arch/m68k/virt/platform.c b/arch/m68k/virt/platform.c
new file mode 100644
index 000000000000..f432b90dcd1a
--- /dev/null
+++ b/arch/m68k/virt/platform.c
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/memblock.h>
+#include <asm/virt.h>
+#include <asm/irq.h>
+
+#define VIRTIO_BUS_NB 128
+
+static int __init virt_virtio_init(int id)
+{
+ const struct resource res[] = {
+ DEFINE_RES_MEM(virt_bi_data.virtio.mmio + id * 0x200, 0x200),
+ DEFINE_RES_IRQ(virt_bi_data.virtio.irq + id),
+ };
+ struct platform_device *pdev;
+
+ pdev = platform_device_register_simple("virtio-mmio", id,
+ res, ARRAY_SIZE(res));
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ return 0;
+}
+
+static int __init virt_platform_init(void)
+{
+ const struct resource goldfish_tty_res[] = {
+ DEFINE_RES_MEM(virt_bi_data.tty.mmio, 1),
+ DEFINE_RES_IRQ(virt_bi_data.tty.irq),
+ };
+ /* this is the second gf-rtc, the first one is used by the scheduler */
+ const struct resource goldfish_rtc_res[] = {
+ DEFINE_RES_MEM(virt_bi_data.rtc.mmio + 0x1000, 0x1000),
+ DEFINE_RES_IRQ(virt_bi_data.rtc.irq + 1),
+ };
+ struct platform_device *pdev;
+ int i;
+
+ if (!MACH_IS_VIRT)
+ return -ENODEV;
+
+ /* We need this to have DMA'able memory provided to goldfish-tty */
+ min_low_pfn = 0;
+
+ pdev = platform_device_register_simple("goldfish_tty",
+ PLATFORM_DEVID_NONE,
+ goldfish_tty_res,
+ ARRAY_SIZE(goldfish_tty_res));
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ pdev = platform_device_register_simple("goldfish_rtc",
+ PLATFORM_DEVID_NONE,
+ goldfish_rtc_res,
+ ARRAY_SIZE(goldfish_rtc_res));
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ for (i = 0; i < VIRTIO_BUS_NB; i++) {
+ int err;
+
+ err = virt_virtio_init(i);
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
+arch_initcall(virt_platform_init);
--
2.34.1
Hi Laurent,
On 21/01/2022 21:07, Laurent Vivier wrote:
> Add a clocksource based on the goldfish-rtc device.
As a first submission, please provide a more detailed description of the
timer.
> Signed-off-by: Laurent Vivier <[email protected]>
> ---
> drivers/clocksource/Kconfig | 7 ++
> drivers/clocksource/Makefile | 1 +
> drivers/clocksource/timer-goldfish.c | 163 +++++++++++++++++++++++++++
> include/clocksource/timer-goldfish.h | 11 ++
> 4 files changed, 182 insertions(+)
> create mode 100644 drivers/clocksource/timer-goldfish.c
> create mode 100644 include/clocksource/timer-goldfish.h
>
> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index cfb8ea0df3b1..94f00374cebb 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -721,4 +721,11 @@ config MICROCHIP_PIT64B
> modes and high resolution. It is used as a clocksource
> and a clockevent.
>
> +config GOLDFISH_TIMER
> + bool "Clocksource using goldfish-rtc"
> + depends on M68K || COMPILE_TEST
> + depends on RTC_DRV_GOLDFISH
> + help
> + Support for the timer/counter of goldfish-rtc
> +
> endmenu
> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
> index fa5f624eadb6..12f5d7e8cc2d 100644
> --- a/drivers/clocksource/Makefile
> +++ b/drivers/clocksource/Makefile
> @@ -89,3 +89,4 @@ obj-$(CONFIG_GX6605S_TIMER) += timer-gx6605s.o
> obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o
> obj-$(CONFIG_MICROCHIP_PIT64B) += timer-microchip-pit64b.o
> obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
> +obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
> diff --git a/drivers/clocksource/timer-goldfish.c b/drivers/clocksource/timer-goldfish.c
> new file mode 100644
> index 000000000000..4c670a1aea16
> --- /dev/null
> +++ b/drivers/clocksource/timer-goldfish.c
> @@ -0,0 +1,163 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include <linux/interrupt.h>
> +#include <linux/ioport.h>
> +#include <linux/clocksource.h>
> +#include <linux/clockchips.h>
> +#include <linux/module.h>
> +#include <linux/slab.h>
> +#include <linux/goldfish.h>
> +#include <clocksource/timer-goldfish.h>
> +
> +#define TIMER_TIME_LOW 0x00 /* get low bits of current time */
> + /* and update TIMER_TIME_HIGH */
> +#define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */
> + /* TIMER_TIME_LOW read */
> +#define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */
> + /* activate it */
> +#define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */
Thanks for the comments giving the update details of the register.
However the format is not very easy to read. I suggest to add these
information in the log or above the macros being a bit more verbose
/*
* bla bla
*/
> +#define TIMER_IRQ_ENABLED 0x10
> +#define TIMER_CLEAR_ALARM 0x14
> +#define TIMER_ALARM_STATUS 0x18
> +#define TIMER_CLEAR_INTERRUPT 0x1c
> +
> +struct goldfish_timer {
> + struct clocksource cs;
> + struct clock_event_device ced;
> + struct resource res;
> + void __iomem *base;
> + int irq;
'res' and 'irq' can be local variable in the init function, they are not
used anywhere else
> +};
> +
> +static struct goldfish_timer *ced_to_gf(struct clock_event_device *ced)
> +{
> + return container_of(ced, struct goldfish_timer, ced);
> +}
> +
> +static struct goldfish_timer *cs_to_gf(struct clocksource *cs)
> +{
> + return container_of(cs, struct goldfish_timer, cs);
> +}
> +
> +static u64 goldfish_timer_read(struct clocksource *cs)
> +{
> + struct goldfish_timer *timerdrv = cs_to_gf(cs);
> + void __iomem *base = timerdrv->base;
> + u32 time_low, time_high;
> + u64 ticks;
> +
> + /*
> + * time_low: get low bits of current time and update time_high
> + * time_high: get high bits of time at last time_low read
> + */
> + time_low = gf_ioread32(base + TIMER_TIME_LOW);
> + time_high = gf_ioread32(base + TIMER_TIME_HIGH);
> +
> + ticks = ((u64)time_high << 32) | time_low;
> +
> + return ticks;
> +}
> +
> +static int goldfish_timer_set_oneshot(struct clock_event_device *evt)
> +{
> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
> + void __iomem *base = timerdrv->base;
> +
> + gf_iowrite32(0, base + TIMER_ALARM_HIGH);
> + gf_iowrite32(0, base + TIMER_ALARM_LOW);
> + gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
> +
> + return 0;
> +}
> +
> +static int goldfish_timer_shutdown(struct clock_event_device *evt)
> +{
> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
> + void __iomem *base = timerdrv->base;
> +
> + gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
> +
> + return 0;
> +}
> +
> +static int goldfish_timer_next_event(unsigned long delta,
> + struct clock_event_device *evt)
> +{
> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
> + void __iomem *base = timerdrv->base;
> + u64 now;
> +
> + now = goldfish_timer_read(&timerdrv->cs);
> +
> + now += delta;
> +
> + gf_iowrite32(upper_32_bits(now), base + TIMER_ALARM_HIGH);
> + gf_iowrite32(lower_32_bits(now), base + TIMER_ALARM_LOW);
> +
> + return 0;
> +}
> +
> +static irqreturn_t golfish_timer_tick(int irq, void *dev_id)
"timer_tick" will be confusing with "scheduler timer tick". Please
rename it to (eg. goldfish_timer_irq)
Note: the function name 'golfish' instead of 'goldfish'
> +{
> + struct clock_event_device *evt = dev_id;
> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
> + void __iomem *base = timerdrv->base;
> +
> + gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
> +
> + evt->event_handler(evt);
> +
> + return IRQ_HANDLED;
> +}
> +
> +void __init goldfish_timer_init(int irq, void __iomem *base)
Error handling please
int __init goldfish_timer_init(...)
> +{
> + struct goldfish_timer *timerdrv;
> + int ret;
> +
> + timerdrv = kzalloc(sizeof(*timerdrv), GFP_KERNEL);
> + if (!timerdrv)
> + return;
> +
> + timerdrv->base = base;
> + timerdrv->irq = irq;
Not needed
> + timerdrv->ced = (struct clock_event_device){
> + .name = "goldfish_timer",
> + .features = CLOCK_EVT_FEAT_ONESHOT,
> + .set_state_shutdown = goldfish_timer_shutdown,
> + .set_state_oneshot = goldfish_timer_set_oneshot,
> + .set_next_event = goldfish_timer_next_event,
> + };
nit: add CR
> + timerdrv->res = (struct resource){
> + .name = "goldfish_timer",
> + .start = (unsigned long)base,
> + .end = (unsigned long)base + 0xfff,
> + };
Could be a local variable, no?
> + if (request_resource(&iomem_resource, &timerdrv->res)) {
> + pr_err("Cannot allocate goldfish-timer resource\n");
nit: pr_err("Cannot allocate '%s' resource\n", res.name);
> + return;
> + }
> +
> + timerdrv->cs = (struct clocksource){
> + .name = "goldfish_timer",
> + .rating = 400,
> + .read = goldfish_timer_read,
> + .mask = CLOCKSOURCE_MASK(64),
> + .flags = 0,
> + .max_idle_ns = LONG_MAX,
> + };
> +
> + clocksource_register_hz(&timerdrv->cs, NSEC_PER_SEC);
> +
> + ret = request_irq(timerdrv->irq, golfish_timer_tick, IRQF_TIMER,
> + "goldfish_timer", &timerdrv->ced);
Why not pass directly 'timerdrv' ?
> + if (ret) {
> + pr_err("Couldn't register goldfish-timer interrupt\n");
> + return;
> + }
> +
> + clockevents_config_and_register(&timerdrv->ced, NSEC_PER_SEC,
> + 1, 0xffffffff);
> +}
> diff --git a/include/clocksource/timer-goldfish.h b/include/clocksource/timer-goldfish.h
> new file mode 100644
> index 000000000000..b237267844f1
> --- /dev/null
> +++ b/include/clocksource/timer-goldfish.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * goldfish-timer clocksource
> + */
> +
> +#ifndef _CLOCKSOURCE_GOLDFISH_TIMER_H
> +#define _CLOCKSOURCE_GOLDFISH_TIMER_H
> +
> +extern void goldfish_timer_init(int irq, void __iomem *base);
> +
> +#endif /* _CLOCKSOURCE_GOLDFISH_TIMER_H */
>
--
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On Fri, Jan 21, 2022 at 09:07:35PM +0100, Laurent Vivier wrote:
> Revert
> commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
Why?
> and define gf_ioread32()/gf_iowrite32() to be able to use accessors
> defined by the architecture.
What does this do?
>
> Cc: [email protected] # v5.11+
> Fixes: da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
> Signed-off-by: Laurent Vivier <[email protected]>
> ---
> drivers/tty/goldfish.c | 20 ++++++++++----------
> include/linux/goldfish.h | 15 +++++++++++----
> 2 files changed, 21 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/tty/goldfish.c b/drivers/tty/goldfish.c
> index 5ed19a9857ad..10c13b93ed52 100644
> --- a/drivers/tty/goldfish.c
> +++ b/drivers/tty/goldfish.c
> @@ -61,13 +61,13 @@ static void do_rw_io(struct goldfish_tty *qtty,
> spin_lock_irqsave(&qtty->lock, irq_flags);
> gf_write_ptr((void *)address, base + GOLDFISH_TTY_REG_DATA_PTR,
> base + GOLDFISH_TTY_REG_DATA_PTR_HIGH);
> - __raw_writel(count, base + GOLDFISH_TTY_REG_DATA_LEN);
> + gf_iowrite32(count, base + GOLDFISH_TTY_REG_DATA_LEN);
>
> if (is_write)
> - __raw_writel(GOLDFISH_TTY_CMD_WRITE_BUFFER,
> + gf_iowrite32(GOLDFISH_TTY_CMD_WRITE_BUFFER,
> base + GOLDFISH_TTY_REG_CMD);
> else
> - __raw_writel(GOLDFISH_TTY_CMD_READ_BUFFER,
> + gf_iowrite32(GOLDFISH_TTY_CMD_READ_BUFFER,
> base + GOLDFISH_TTY_REG_CMD);
>
> spin_unlock_irqrestore(&qtty->lock, irq_flags);
> @@ -142,7 +142,7 @@ static irqreturn_t goldfish_tty_interrupt(int irq, void *dev_id)
> unsigned char *buf;
> u32 count;
>
> - count = __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
> + count = gf_ioread32(base + GOLDFISH_TTY_REG_BYTES_READY);
> if (count == 0)
> return IRQ_NONE;
>
> @@ -159,7 +159,7 @@ static int goldfish_tty_activate(struct tty_port *port, struct tty_struct *tty)
> {
> struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
> port);
> - __raw_writel(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
> + gf_iowrite32(GOLDFISH_TTY_CMD_INT_ENABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
> return 0;
> }
>
> @@ -167,7 +167,7 @@ static void goldfish_tty_shutdown(struct tty_port *port)
> {
> struct goldfish_tty *qtty = container_of(port, struct goldfish_tty,
> port);
> - __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
> + gf_iowrite32(GOLDFISH_TTY_CMD_INT_DISABLE, qtty->base + GOLDFISH_TTY_REG_CMD);
> }
>
> static int goldfish_tty_open(struct tty_struct *tty, struct file *filp)
> @@ -202,7 +202,7 @@ static unsigned int goldfish_tty_chars_in_buffer(struct tty_struct *tty)
> {
> struct goldfish_tty *qtty = &goldfish_ttys[tty->index];
> void __iomem *base = qtty->base;
> - return __raw_readl(base + GOLDFISH_TTY_REG_BYTES_READY);
> + return gf_ioread32(base + GOLDFISH_TTY_REG_BYTES_READY);
> }
>
> static void goldfish_tty_console_write(struct console *co, const char *b,
> @@ -355,7 +355,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
> * on Ranchu emulator (qemu2) returns 1 here and
> * driver will use physical addresses.
> */
> - qtty->version = __raw_readl(base + GOLDFISH_TTY_REG_VERSION);
> + qtty->version = gf_ioread32(base + GOLDFISH_TTY_REG_VERSION);
>
> /*
> * Goldfish TTY device on Ranchu emulator (qemu2)
> @@ -374,7 +374,7 @@ static int goldfish_tty_probe(struct platform_device *pdev)
> }
> }
>
> - __raw_writel(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
> + gf_iowrite32(GOLDFISH_TTY_CMD_INT_DISABLE, base + GOLDFISH_TTY_REG_CMD);
>
> ret = request_irq(irq, goldfish_tty_interrupt, IRQF_SHARED,
> "goldfish_tty", qtty);
> @@ -436,7 +436,7 @@ static int goldfish_tty_remove(struct platform_device *pdev)
> #ifdef CONFIG_GOLDFISH_TTY_EARLY_CONSOLE
> static void gf_early_console_putchar(struct uart_port *port, int ch)
> {
> - __raw_writel(ch, port->membase);
> + gf_iowrite32(ch, port->membase);
> }
>
> static void gf_early_write(struct console *con, const char *s, unsigned int n)
> diff --git a/include/linux/goldfish.h b/include/linux/goldfish.h
> index 12be1601fd84..bcc17f95b906 100644
> --- a/include/linux/goldfish.h
> +++ b/include/linux/goldfish.h
> @@ -8,14 +8,21 @@
>
> /* Helpers for Goldfish virtual platform */
>
> +#ifndef gf_ioread32
> +#define gf_ioread32 ioread32
> +#endif
> +#ifndef gf_iowrite32
> +#define gf_iowrite32 iowrite32
> +#endif
> +
> static inline void gf_write_ptr(const void *ptr, void __iomem *portl,
> void __iomem *porth)
> {
> const unsigned long addr = (unsigned long)ptr;
>
> - __raw_writel(lower_32_bits(addr), portl);
> + gf_iowrite32(lower_32_bits(addr), portl);
> #ifdef CONFIG_64BIT
> - __raw_writel(upper_32_bits(addr), porth);
> + gf_iowrite32(upper_32_bits(addr), porth);
> #endif
> }
>
> @@ -23,9 +30,9 @@ static inline void gf_write_dma_addr(const dma_addr_t addr,
> void __iomem *portl,
> void __iomem *porth)
> {
> - __raw_writel(lower_32_bits(addr), portl);
> + gf_iowrite32(lower_32_bits(addr), portl);
> #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> - __raw_writel(upper_32_bits(addr), porth);
> + gf_iowrite32(upper_32_bits(addr), porth);
> #endif
> }
>
> --
> 2.34.1
>
This feels like a step backwards. Why keep this level of indirection
for no good reason?
thanks,
greg k-h
On Wed, Jan 26, 2022 at 2:41 PM Greg KH <[email protected]> wrote:
>
> On Fri, Jan 21, 2022 at 09:07:35PM +0100, Laurent Vivier wrote:
> > Revert
> > commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
>
> Why?
>
> > and define gf_ioread32()/gf_iowrite32() to be able to use accessors
> > defined by the architecture.
>
> What does this do?
The reverted commit was an incorrect workaround for an old qemu bug:
The goldfish devices are apparently defined as "native" endianness,
which in qemu is whatever the architecture maintainers thought it should
be at the time (little-endian on arm, big-endian on powerpc, board
specific on mips, etc.) but independent of what kernel is actually running
on the machine if the CPU supports both.
m68k in qemu picked big-endian here, which is the opposite of what
the kernel driver does, presumably because that is the endianness of
the CPU itself.
Since we can't fix qemu any more, and runtime detection doesn't work
on machines without devicetree, having a sane default (whatever the
driver used to do) and an architecture specific override for those that
got it wrong is probably our best option.
Arnd
Le 26/01/2022 à 12:55, Daniel Lezcano a écrit :
>
> Hi Laurent,
>
Hi Daniel,
> On 21/01/2022 21:07, Laurent Vivier wrote:
>> Add a clocksource based on the goldfish-rtc device.
>
> As a first submission, please provide a more detailed description of the
> timer.
ok.
The timer uses in fact the goldifsh RTC clock so I supposed refering to drivers/rtc/rtc-goldfish.c
could give the missing pieces of information
>> Signed-off-by: Laurent Vivier <[email protected]>
>> ---
>> drivers/clocksource/Kconfig | 7 ++
>> drivers/clocksource/Makefile | 1 +
>> drivers/clocksource/timer-goldfish.c | 163 +++++++++++++++++++++++++++
>> include/clocksource/timer-goldfish.h | 11 ++
>> 4 files changed, 182 insertions(+)
>> create mode 100644 drivers/clocksource/timer-goldfish.c
>> create mode 100644 include/clocksource/timer-goldfish.h
>>
>> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
>> index cfb8ea0df3b1..94f00374cebb 100644
>> --- a/drivers/clocksource/Kconfig
>> +++ b/drivers/clocksource/Kconfig
>> @@ -721,4 +721,11 @@ config MICROCHIP_PIT64B
>> modes and high resolution. It is used as a clocksource
>> and a clockevent.
>>
>> +config GOLDFISH_TIMER
>> + bool "Clocksource using goldfish-rtc"
>> + depends on M68K || COMPILE_TEST
>> + depends on RTC_DRV_GOLDFISH
>> + help
>> + Support for the timer/counter of goldfish-rtc
>> +
>> endmenu
>> diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
>> index fa5f624eadb6..12f5d7e8cc2d 100644
>> --- a/drivers/clocksource/Makefile
>> +++ b/drivers/clocksource/Makefile
>> @@ -89,3 +89,4 @@ obj-$(CONFIG_GX6605S_TIMER) += timer-gx6605s.o
>> obj-$(CONFIG_HYPERV_TIMER) += hyperv_timer.o
>> obj-$(CONFIG_MICROCHIP_PIT64B) += timer-microchip-pit64b.o
>> obj-$(CONFIG_MSC313E_TIMER) += timer-msc313e.o
>> +obj-$(CONFIG_GOLDFISH_TIMER) += timer-goldfish.o
>> diff --git a/drivers/clocksource/timer-goldfish.c b/drivers/clocksource/timer-goldfish.c
>> new file mode 100644
>> index 000000000000..4c670a1aea16
>> --- /dev/null
>> +++ b/drivers/clocksource/timer-goldfish.c
>> @@ -0,0 +1,163 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +
>> +#include <linux/interrupt.h>
>> +#include <linux/ioport.h>
>> +#include <linux/clocksource.h>
>> +#include <linux/clockchips.h>
>> +#include <linux/module.h>
>> +#include <linux/slab.h>
>> +#include <linux/goldfish.h>
>> +#include <clocksource/timer-goldfish.h>
>> +
>> +#define TIMER_TIME_LOW 0x00 /* get low bits of current time */
>> + /* and update TIMER_TIME_HIGH */
>> +#define TIMER_TIME_HIGH 0x04 /* get high bits of time at last */
>> + /* TIMER_TIME_LOW read */
>> +#define TIMER_ALARM_LOW 0x08 /* set low bits of alarm and */
>> + /* activate it */
>> +#define TIMER_ALARM_HIGH 0x0c /* set high bits of next alarm */
>
> Thanks for the comments giving the update details of the register.
> However the format is not very easy to read. I suggest to add these
> information in the log or above the macros being a bit more verbose
>
> /*
> * bla bla
> */
In fact, I copied them from drivers/rtc/rtc-goldfish.c but I can update this as you say.
>> +#define TIMER_IRQ_ENABLED 0x10
>> +#define TIMER_CLEAR_ALARM 0x14
>> +#define TIMER_ALARM_STATUS 0x18
>> +#define TIMER_CLEAR_INTERRUPT 0x1c
>> +
>> +struct goldfish_timer {
>> + struct clocksource cs;
>> + struct clock_event_device ced;
>> + struct resource res;
>> + void __iomem *base;
>> + int irq;
>
> 'res' and 'irq' can be local variable in the init function, they are not
> used anywhere else
I agree for irq, but res is passed to request_resource() and I think it is added to a linked tree,
so I'm not sure it can be local to the function.
Do you mean a "static" declaration in the function?
>
>> +};
>> +
>> +static struct goldfish_timer *ced_to_gf(struct clock_event_device *ced)
>> +{
>> + return container_of(ced, struct goldfish_timer, ced);
>> +}
>> +
>> +static struct goldfish_timer *cs_to_gf(struct clocksource *cs)
>> +{
>> + return container_of(cs, struct goldfish_timer, cs);
>> +}
>> +
>> +static u64 goldfish_timer_read(struct clocksource *cs)
>> +{
>> + struct goldfish_timer *timerdrv = cs_to_gf(cs);
>> + void __iomem *base = timerdrv->base;
>> + u32 time_low, time_high;
>> + u64 ticks;
>> +
>> + /*
>> + * time_low: get low bits of current time and update time_high
>> + * time_high: get high bits of time at last time_low read
>> + */
>> + time_low = gf_ioread32(base + TIMER_TIME_LOW);
>> + time_high = gf_ioread32(base + TIMER_TIME_HIGH);
>> +
>> + ticks = ((u64)time_high << 32) | time_low;
>> +
>> + return ticks;
>> +}
>> +
>> +static int goldfish_timer_set_oneshot(struct clock_event_device *evt)
>> +{
>> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
>> + void __iomem *base = timerdrv->base;
>> +
>> + gf_iowrite32(0, base + TIMER_ALARM_HIGH);
>> + gf_iowrite32(0, base + TIMER_ALARM_LOW);
>> + gf_iowrite32(1, base + TIMER_IRQ_ENABLED);
>> +
>> + return 0;
>> +}
>> +
>> +static int goldfish_timer_shutdown(struct clock_event_device *evt)
>> +{
>> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
>> + void __iomem *base = timerdrv->base;
>> +
>> + gf_iowrite32(0, base + TIMER_IRQ_ENABLED);
>> +
>> + return 0;
>> +}
>> +
>> +static int goldfish_timer_next_event(unsigned long delta,
>> + struct clock_event_device *evt)
>> +{
>> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
>> + void __iomem *base = timerdrv->base;
>> + u64 now;
>> +
>> + now = goldfish_timer_read(&timerdrv->cs);
>> +
>> + now += delta;
>> +
>> + gf_iowrite32(upper_32_bits(now), base + TIMER_ALARM_HIGH);
>> + gf_iowrite32(lower_32_bits(now), base + TIMER_ALARM_LOW);
>> +
>> + return 0;
>> +}
>> +
>> +static irqreturn_t golfish_timer_tick(int irq, void *dev_id)
>
> "timer_tick" will be confusing with "scheduler timer tick". Please
> rename it to (eg. goldfish_timer_irq)
>
> Note: the function name 'golfish' instead of 'goldfish'
ok
>
>> +{
>> + struct clock_event_device *evt = dev_id;
>> + struct goldfish_timer *timerdrv = ced_to_gf(evt);
>> + void __iomem *base = timerdrv->base;
>> +
>> + gf_iowrite32(1, base + TIMER_CLEAR_INTERRUPT);
>> +
>> + evt->event_handler(evt);
>> +
>> + return IRQ_HANDLED;
>> +}
>> +
>> +void __init goldfish_timer_init(int irq, void __iomem *base)
>
> Error handling please
>
> int __init goldfish_timer_init(...)
ok
>
>> +{
>> + struct goldfish_timer *timerdrv;
>> + int ret;
>> +
>> + timerdrv = kzalloc(sizeof(*timerdrv), GFP_KERNEL);
>> + if (!timerdrv)
>> + return;
>> +
>> + timerdrv->base = base;
>> + timerdrv->irq = irq;
>
> Not needed
ok
>
>> + timerdrv->ced = (struct clock_event_device){
>> + .name = "goldfish_timer",
>> + .features = CLOCK_EVT_FEAT_ONESHOT,
>> + .set_state_shutdown = goldfish_timer_shutdown,
>> + .set_state_oneshot = goldfish_timer_set_oneshot,
>> + .set_next_event = goldfish_timer_next_event,
>> + };
>
> nit: add CR
ok
>
>> + timerdrv->res = (struct resource){
>> + .name = "goldfish_timer",
>> + .start = (unsigned long)base,
>> + .end = (unsigned long)base + 0xfff,
>> + };
>
> Could be a local variable, no?
As I said above, I think the structure passed to request_resource() must not be released.
>
>> + if (request_resource(&iomem_resource, &timerdrv->res)) {
>> + pr_err("Cannot allocate goldfish-timer resource\n");
>
> nit: pr_err("Cannot allocate '%s' resource\n", res.name);
ok
>
>> + return;
>> + }
>> +
>> + timerdrv->cs = (struct clocksource){
>> + .name = "goldfish_timer",
>> + .rating = 400,
>> + .read = goldfish_timer_read,
>> + .mask = CLOCKSOURCE_MASK(64),
>> + .flags = 0,
>> + .max_idle_ns = LONG_MAX,
>> + };
>> +
>> + clocksource_register_hz(&timerdrv->cs, NSEC_PER_SEC);
>> +
>> + ret = request_irq(timerdrv->irq, golfish_timer_tick, IRQF_TIMER,
>> + "goldfish_timer", &timerdrv->ced);
>
> Why not pass directly 'timerdrv' ?
You're right, we can pass it directly.
>
>> + if (ret) {
>> + pr_err("Couldn't register goldfish-timer interrupt\n");
>> + return;
>> + }
>> +
>> + clockevents_config_and_register(&timerdrv->ced, NSEC_PER_SEC,
>> + 1, 0xffffffff);
>> +}
>> diff --git a/include/clocksource/timer-goldfish.h b/include/clocksource/timer-goldfish.h
>> new file mode 100644
>> index 000000000000..b237267844f1
>> --- /dev/null
>> +++ b/include/clocksource/timer-goldfish.h
>> @@ -0,0 +1,11 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * goldfish-timer clocksource
>> + */
>> +
>> +#ifndef _CLOCKSOURCE_GOLDFISH_TIMER_H
>> +#define _CLOCKSOURCE_GOLDFISH_TIMER_H
>> +
>> +extern void goldfish_timer_init(int irq, void __iomem *base);
>> +
>> +#endif /* _CLOCKSOURCE_GOLDFISH_TIMER_H */
>>
>
>
On 26/01/2022 18:14, Laurent Vivier wrote:
> Le 26/01/2022 à 12:55, Daniel Lezcano a écrit :
>>
>> Hi Laurent,
>>
>
> Hi Daniel,
>
>> On 21/01/2022 21:07, Laurent Vivier wrote:
>>> Add a clocksource based on the goldfish-rtc device.
>>
>> As a first submission, please provide a more detailed description of the
>> timer.
>
> ok.
>
> The timer uses in fact the goldifsh RTC clock so I supposed refering to
> drivers/rtc/rtc-goldfish.c could give the missing pieces of information
[ ... ]
> I agree for irq, but res is passed to request_resource() and I think it
> is added to a linked tree, so I'm not sure it can be local to the function.
>
> Do you mean a "static" declaration in the function?
I missed request_resource() was adding the resource in a list, thus the
parameter must not be freed. So discard the comment for 'res'.
[ ... ]
--
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Le 26/01/2022 à 14:41, Greg KH a écrit :
> On Fri, Jan 21, 2022 at 09:07:35PM +0100, Laurent Vivier wrote:
>> Revert
>> commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
>
> Why?
>
>> and define gf_ioread32()/gf_iowrite32() to be able to use accessors
>> defined by the architecture.
>
> What does this do?
>
>>
>> Cc: [email protected] # v5.11+
>> Fixes: da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
>> Signed-off-by: Laurent Vivier <[email protected]>
>> ---
>> drivers/tty/goldfish.c | 20 ++++++++++----------
>> include/linux/goldfish.h | 15 +++++++++++----
>> 2 files changed, 21 insertions(+), 14 deletions(-)
...
>> --
>> 2.34.1
>>
>
> This feels like a step backwards. Why keep this level of indirection
> for no good reason?
>
It was proposed by Arnd on my previous iteration of the series when I wanted to update goldfish-rtc
in the same way:
https://lore.kernel.org/all/CAK8P3a1H6-sd_+FqnOq0Zhj=L51EWuW5VCcYeTENcp3+PkTC4Q@mail.gmail.com/
Keeping __raw_XXX() functions works on most of the cases except if the current CPU endianness can
differ from the architecture one (like a ppc64le kernel (little-endian) running a ppc64 machine
(big-endian)).
The best solution would be to update QEMU to set the device as a little-endian one, but google
didn't merge its implemention in upstream QEMU and this would break all other OSes using goldfish
devices on big-endian architectures.
Thanks,
Laurent