This series adds the BCM43430A0 chip providing Bluetooth & Wifi on the
LG G Watch R.
Luca Weiss (5):
dt-bindings: bluetooth: broadcom: add BCM43430A0
Bluetooth: hci_bcm: add BCM43430A0
ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
.../bindings/net/broadcom-bluetooth.yaml | 1 +
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 98 ++++++++++++++++---
arch/arm/boot/dts/qcom-msm8226.dtsi | 57 +++++++++++
drivers/bluetooth/hci_bcm.c | 1 +
4 files changed, 144 insertions(+), 13 deletions(-)
--
2.35.1
The device contains BCM43430A0 for bluetooth. Add a node for it.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 36 +++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
index 333fae435913..42467f705b26 100644
--- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
@@ -16,6 +16,7 @@ / {
aliases {
serial0 = &blsp1_uart3;
+ serial1 = &blsp1_uart4;
};
chosen {
@@ -80,6 +81,26 @@ &blsp1_uart3 {
status = "okay";
};
+&blsp1_uart4 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&blsp1_uart4_default_state>;
+
+ bluetooth {
+ compatible = "brcm,bcm43430a0-bt";
+
+ max-speed = <3000000>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&bluetooth_default_state>;
+
+ host-wakeup-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
+ device-wakeup-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+ shutdown-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>;
+ };
+};
+
&rpm_requests {
pm8226-regulators {
compatible = "qcom,rpm-pm8226-regulators";
@@ -254,6 +275,21 @@ &smbb {
};
&tlmm {
+ blsp1_uart4_default_state: blsp1-uart4-default-state {
+ pins = "gpio12", "gpio13", "gpio14", "gpio15";
+ function = "blsp_uart4";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ bluetooth_default_state: bluetooth-default-state {
+ pins = "gpio47", "gpio48";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ input-enable;
+ };
+
touch_pins: touch {
irq {
pins = "gpio17";
--
2.35.1
The device contains BCM43430A0 for wifi. Add a node for it.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 53 +++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
index 5ce42dd962c4..333fae435913 100644
--- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
@@ -21,6 +21,20 @@ aliases {
chosen {
stdout-path = "serial0:115200n8";
};
+
+ vreg_wlan: wlan-regulator {
+ compatible = "regulator-fixed";
+
+ regulator-name = "wl-reg";
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+
+ gpio = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wlan_regulator_default_state>;
+ };
};
&blsp1_i2c1 {
@@ -206,6 +220,30 @@ &sdhc_1 {
non-removable;
};
+&sdhc_3 {
+ status = "okay";
+
+ max-frequency = <100000000>;
+ non-removable;
+
+ vmmc-supply = <&vreg_wlan>;
+ vqmmc-supply = <&pm8226_l6>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wifi@1 {
+ compatible = "brcm,bcm43430a0-fmac", "brcm,bcm4329-fmac";
+ reg = <1>;
+
+ interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-names = "host-wake";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&wlan_hostwake_default_state>;
+ };
+};
+
&smbb {
qcom,fast-charge-safe-current = <450000>;
qcom,fast-charge-current-limit = <400000>;
@@ -235,6 +273,21 @@ reset {
output-high;
};
};
+
+ wlan_hostwake_default_state: wlan-hostwake-default-state {
+ pins = "gpio37";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ input-enable;
+ };
+
+ wlan_regulator_default_state: wlan-regulator-default-state {
+ pins = "gpio46";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
};
&usb {
--
2.35.1
Also remove the pinctrl from qcom-apq8026-lg-lenok as it is the same
value as the generic pinctrl.
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 17 ------
arch/arm/boot/dts/qcom-msm8226.dtsi | 57 +++++++++++++++++++++
2 files changed, 57 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
index 1519544029e7..5ce42dd962c4 100644
--- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
@@ -204,9 +204,6 @@ &sdhc_1 {
bus-width = <8>;
non-removable;
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdhc1_pin_a>;
};
&smbb {
@@ -219,20 +216,6 @@ &smbb {
};
&tlmm {
- sdhc1_pin_a: sdhc1-pin-active {
- clk {
- pins = "sdc1_clk";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-data {
- pins = "sdc1_cmd", "sdc1_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
touch_pins: touch {
irq {
pins = "gpio17";
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 103c0ab70814..dfeb47eb41a2 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -116,6 +116,8 @@ sdhc_1: sdhci@f9824900 {
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc1_default_state>;
status = "disabled";
};
@@ -130,6 +132,8 @@ sdhc_2: sdhci@f98a4900 {
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc2_default_state>;
status = "disabled";
};
@@ -144,6 +148,8 @@ sdhc_3: sdhci@f9864900 {
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc3_default_state>;
status = "disabled";
};
@@ -320,6 +326,57 @@ blsp1_i2c5_pins: blsp1-i2c5 {
drive-strength = <2>;
bias-disable;
};
+
+ sdhc1_default_state: sdhc1-default-state {
+ clk {
+ pins = "sdc1_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data {
+ pins = "sdc1_cmd", "sdc1_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc2_default_state: sdhc2-default-state {
+ clk {
+ pins = "sdc2_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data {
+ pins = "sdc2_cmd", "sdc2_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc3_default_state: sdhc3-default-state {
+ clk {
+ pins = "gpio44";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cmd {
+ pins = "gpio43";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ data {
+ pins = "gpio39", "gpio40", "gpio41", "gpio42";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
};
restart@fc4ab000 {
--
2.35.1
On Wed 16 Feb 15:24 CST 2022, Luca Weiss wrote:
> This series adds the BCM43430A0 chip providing Bluetooth & Wifi on the
> LG G Watch R.
>
I picked the dts changes, but would prefer that the other two changes
goes through the BT tree. I see that you haven't copied Marcel on the
dt-binding change though, so please resubmit those two patches together.
Thanks,
Bjorn
> Luca Weiss (5):
> dt-bindings: bluetooth: broadcom: add BCM43430A0
> Bluetooth: hci_bcm: add BCM43430A0
> ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
> ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
> ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
>
> .../bindings/net/broadcom-bluetooth.yaml | 1 +
> arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 98 ++++++++++++++++---
> arch/arm/boot/dts/qcom-msm8226.dtsi | 57 +++++++++++
> drivers/bluetooth/hci_bcm.c | 1 +
> 4 files changed, 144 insertions(+), 13 deletions(-)
>
> --
> 2.35.1
>
On Wed, 16 Feb 2022 22:24:27 +0100, Luca Weiss wrote:
> This series adds the BCM43430A0 chip providing Bluetooth & Wifi on the
> LG G Watch R.
>
> Luca Weiss (5):
> dt-bindings: bluetooth: broadcom: add BCM43430A0
> Bluetooth: hci_bcm: add BCM43430A0
> ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
> ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
> ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
>
> [...]
Applied, thanks!
[2/5] Bluetooth: hci_bcm: add BCM43430A0
(no commit info)
[3/5] ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
commit: a5683471b68d81898db14e1dee347bfe7469540d
[4/5] ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
commit: 81ecc39d0dd3fbbcc3c8505d0eefe511eb422d03
[5/5] ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
commit: e8880a10f970d86d1b3fdd8bc36400e0e01ba4a9
Best regards,
--
Bjorn Andersson <[email protected]>
Hi Bjorn
On Donnerstag, 24. Februar 2022 05:15:06 CET Bjorn Andersson wrote:
> On Wed 16 Feb 15:24 CST 2022, Luca Weiss wrote:
> > This series adds the BCM43430A0 chip providing Bluetooth & Wifi on the
> > LG G Watch R.
>
> I picked the dts changes, but would prefer that the other two changes
> goes through the BT tree. I see that you haven't copied Marcel on the
> dt-binding change though, so please resubmit those two patches together.
Thank you, will resubmit the first two!
Just to be clear, as far as I understand each patch gets sent based on its own
get_maintainer.pl, and the cover letter gets sent to the superset of all
individual patch recipients?
I'm using this script that's largely based on something I found online a while
ago
https://github.com/z3ntu/dotfiles/blob/master/scripts/usr/local/bin/cocci_cc
Also just checked and Marcel isn't listed as maintainer of the relevant dt
bindings in MAINTAINERS, maybe they should get added there?
(also CCed Marcel on this email)
Regards
Luca
>
> Thanks,
> Bjorn
>
> > Luca Weiss (5):
> > dt-bindings: bluetooth: broadcom: add BCM43430A0
> > Bluetooth: hci_bcm: add BCM43430A0
> > ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
> > ARM: dts: qcom: apq8026-lg-lenok: Add Wifi
> > ARM: dts: qcom: apq8026-lg-lenok: Add Bluetooth
> >
> > .../bindings/net/broadcom-bluetooth.yaml | 1 +
> > arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 98 ++++++++++++++++---
> > arch/arm/boot/dts/qcom-msm8226.dtsi | 57 +++++++++++
> > drivers/bluetooth/hci_bcm.c | 1 +
> > 4 files changed, 144 insertions(+), 13 deletions(-)