This is v3 patchset adding OFS (Open FPGA stack) support for
DFL driver. OFS is a collection of RTL and open software providing
interface to access the instantiated RTL easily in FPGA. OFS
leverages the DFL for the implementation of the FPGA RTL design.
Patch 1, allows for ports without specific bar space.
Patch 2, introduces features in dfl_fpga_cdev after DFL enumeration.
On OFS, we will add more extensions or features in DFL in
future, so adding a new member "features"in dfl_fpga_cdev.
Patch 3, fixs VF creation in "Multiple VFs per PR slot" and legacy model.
Patch 4, handles dfl's starting with AFU and allows for VFs to be created.
Patch 5, adds architecture description about OFS support for DFL
in documentation.
Changelog v2 -> v3:
- no code change, just change the name from IOFS to OFS.
Changelog v1 -> v2:
- Introducing a new member "features" in dfl_fpga_cdev for feature
control.
- Adding new flag DFL_FEAT_PORT_CONNECTED_AFU for OFS legacy model.
- Updates the documentation for the access models about AFU in OFS.
- Drop the PCI PID patch and will send it later.
Matthew Gerlach (2):
fpga: dfl: Allow for ports without specific bar space.
fpga: dfl: Handle dfl's starting with AFU
Tianfei zhang (3):
fpga: dfl: add features in dfl_fpga_cdev
fpga: dfl: fix VF creation in OFS
Documentation: fpga: dfl: add description of OFS
Documentation/fpga/dfl.rst | 113 +++++++++++++++++++++++++++++++++++++
drivers/fpga/dfl-pci.c | 13 ++++-
drivers/fpga/dfl.c | 38 ++++++++-----
drivers/fpga/dfl.h | 6 ++
4 files changed, 155 insertions(+), 15 deletions(-)
--
2.26.2
Introducing features in dfl_fpga_cdev during DFL enumeration.
On OFS, we will add more extensions or features in DFL in
future, so adding a new member "features"in dfl_fpga_cdev.
For example, in the legacy model, the AFU was connected to
Port device, but in "multiple VFs per PR slot" model, the
AFU or PR slot without connected to Port device directly,
so in this model, we only can access the resource of AFU
or PR slot via VFs. In this patch, we introducing a new
flags DFL_FEAT_PORT_CONNECTED_AFU to distinguish them.
Signed-off-by: Tianfei zhang <[email protected]>
---
drivers/fpga/dfl.c | 6 +++++-
drivers/fpga/dfl.h | 5 +++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
index 599bb21d86af..5872031c2e9f 100644
--- a/drivers/fpga/dfl.c
+++ b/drivers/fpga/dfl.c
@@ -1124,6 +1124,7 @@ static void build_info_complete(struct build_feature_devs_info *binfo)
static int parse_feature_fiu(struct build_feature_devs_info *binfo,
resource_size_t ofst)
{
+ struct dfl_fpga_cdev *cdev = binfo->cdev;
int ret = 0;
u32 offset;
u16 id;
@@ -1160,8 +1161,11 @@ static int parse_feature_fiu(struct build_feature_devs_info *binfo,
v = readq(binfo->ioaddr + NEXT_AFU);
offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
- if (offset)
+ if (offset) {
+ if (dfh_id_to_type(id) == PORT_ID)
+ cdev->features |= DFL_FEAT_PORT_CONNECTED_AFU;
return parse_feature_afu(binfo, offset);
+ }
dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
index 1fd493e82dd8..6171bcdcb3c5 100644
--- a/drivers/fpga/dfl.h
+++ b/drivers/fpga/dfl.h
@@ -461,6 +461,9 @@ int dfl_fpga_enum_info_add_irq(struct dfl_fpga_enum_info *info,
unsigned int nr_irqs, int *irq_table);
void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
+/* in legacy model, the AFU was connected to Port device */
+#define DFL_FEAT_PORT_CONNECTED_AFU BIT_ULL(0)
+
/**
* struct dfl_fpga_cdev - container device of DFL based FPGA
*
@@ -470,6 +473,7 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
* @lock: mutex lock to protect the port device list.
* @port_dev_list: list of all port feature devices under this container device.
* @released_port_num: released port number under this container device.
+ * @features: features discovered during DFL enumeration.
*/
struct dfl_fpga_cdev {
struct device *parent;
@@ -478,6 +482,7 @@ struct dfl_fpga_cdev {
struct mutex lock;
struct list_head port_dev_list;
int released_port_num;
+ u64 features;
};
struct dfl_fpga_cdev *
--
2.26.2
> -----Original Message-----
> From: Zhang, Tianfei <[email protected]>
> Sent: Tuesday, March 1, 2022 2:21 PM
> To: Wu, Hao <[email protected]>; [email protected]; [email protected]; Xu, Yilun
> <[email protected]>; [email protected]; [email protected]
> Cc: [email protected]; [email protected]; Zhang, Tianfei
> <[email protected]>
> Subject: [PATCH v3 2/5] fpga: dfl: add features in dfl_fpga_cdev
>
> Introducing features in dfl_fpga_cdev during DFL enumeration.
It's a little confusing, maybe flags is a better name.
> On OFS, we will add more extensions or features in DFL in
> future, so adding a new member "features"in dfl_fpga_cdev.
> For example, in the legacy model, the AFU was connected to
> Port device, but in "multiple VFs per PR slot" model, the
> AFU or PR slot without connected to Port device directly,
> so in this model, we only can access the resource of AFU
> or PR slot via VFs. In this patch, we introducing a new
> flags DFL_FEAT_PORT_CONNECTED_AFU to distinguish them.
Please consider where the flags should be, cdev is the container
of all DFLs, is it possible that one cdev contains two ports, one
has AFU, the other one doesn't?
Hao
>
> Signed-off-by: Tianfei zhang <[email protected]>
> ---
> drivers/fpga/dfl.c | 6 +++++-
> drivers/fpga/dfl.h | 5 +++++
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c
> index 599bb21d86af..5872031c2e9f 100644
> --- a/drivers/fpga/dfl.c
> +++ b/drivers/fpga/dfl.c
> @@ -1124,6 +1124,7 @@ static void build_info_complete(struct
> build_feature_devs_info *binfo)
> static int parse_feature_fiu(struct build_feature_devs_info *binfo,
> resource_size_t ofst)
> {
> + struct dfl_fpga_cdev *cdev = binfo->cdev;
> int ret = 0;
> u32 offset;
> u16 id;
> @@ -1160,8 +1161,11 @@ static int parse_feature_fiu(struct
> build_feature_devs_info *binfo,
> v = readq(binfo->ioaddr + NEXT_AFU);
>
> offset = FIELD_GET(NEXT_AFU_NEXT_DFH_OFST, v);
> - if (offset)
> + if (offset) {
> + if (dfh_id_to_type(id) == PORT_ID)
> + cdev->features |= DFL_FEAT_PORT_CONNECTED_AFU;
> return parse_feature_afu(binfo, offset);
> + }
>
> dev_dbg(binfo->dev, "No AFUs detected on FIU %d\n", id);
>
> diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h
> index 1fd493e82dd8..6171bcdcb3c5 100644
> --- a/drivers/fpga/dfl.h
> +++ b/drivers/fpga/dfl.h
> @@ -461,6 +461,9 @@ int dfl_fpga_enum_info_add_irq(struct
> dfl_fpga_enum_info *info,
> unsigned int nr_irqs, int *irq_table);
> void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info);
>
> +/* in legacy model, the AFU was connected to Port device */
> +#define DFL_FEAT_PORT_CONNECTED_AFU BIT_ULL(0)
> +
> /**
> * struct dfl_fpga_cdev - container device of DFL based FPGA
> *
> @@ -470,6 +473,7 @@ void dfl_fpga_enum_info_free(struct
> dfl_fpga_enum_info *info);
> * @lock: mutex lock to protect the port device list.
> * @port_dev_list: list of all port feature devices under this container device.
> * @released_port_num: released port number under this container device.
> + * @features: features discovered during DFL enumeration.
> */
> struct dfl_fpga_cdev {
> struct device *parent;
> @@ -478,6 +482,7 @@ struct dfl_fpga_cdev {
> struct mutex lock;
> struct list_head port_dev_list;
> int released_port_num;
> + u64 features;
> };
>
> struct dfl_fpga_cdev *
> --
> 2.26.2