2022-05-09 03:44:51

by Pali Rohár

Subject: [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error

Signed-off-by: Pali Rohár <[email protected]>
---
.../interrupt-controller/marvell,armada-370-xp-mpic.txt | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
index 5fc03134a999..8cddbc16ddbd 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
@@ -24,6 +24,11 @@ Optional properties:
connected as a slave to the Cortex-A9 GIC. The provided interrupt
indicate to which GIC interrupt the MPIC output is connected.

+Optional subnodes:
+
+- interrupt-controller@20 with interrupt-controller property for
+ MPIC SoC Error IRQ controller
+
Example:

mpic: interrupt-controller@d0020000 {
@@ -35,4 +40,8 @@ Example:
msi-controller;
reg = <0xd0020a00 0x1d0>,
<0xd0021070 0x58>;
+ soc_err: interrupt-controller@20 {
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
--
2.20.1

2022-05-17 07:14:18

by Rob Herring (Arm)

Subject: Re: [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error

On Fri, May 06, 2022 at 03:40:24PM +0200, Pali Roh?r wrote:
> Signed-off-by: Pali Roh?r <[email protected]>

Why do we need/want this change?

> ---
> .../interrupt-controller/marvell,armada-370-xp-mpic.txt | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> index 5fc03134a999..8cddbc16ddbd 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt
> @@ -24,6 +24,11 @@ Optional properties:
> connected as a slave to the Cortex-A9 GIC. The provided interrupt
> indicate to which GIC interrupt the MPIC output is connected.
>
> +Optional subnodes:
> +
> +- interrupt-controller@20 with interrupt-controller property for
> + MPIC SoC Error IRQ controller
> +
> Example:
>
> mpic: interrupt-controller@d0020000 {
> @@ -35,4 +40,8 @@ Example:
> msi-controller;
> reg = <0xd0020a00 0x1d0>,
> <0xd0021070 0x58>;
> + soc_err: interrupt-controller@20 {

unit address without 'reg' is an error.

> + interrupt-controller;
> + #interrupt-cells = <1>;
> + };
> };
> --
> 2.20.1
>
>