Quoting Mandy Liu (2022-05-13 00:36:21)
> From: Chun-Jie Chen <[email protected]>
>
> We no longer allow en_mask to be a combination of
> pll_en_bit and div_en_mask, so remove pll_en_bit(bit0)
> from en_mask to make en_mask a pure en_mask that only
> used for pll dividers.
>
> This commit continues the work done in commit 7cc4e1bbe300
> ("clk: mediatek: Fix asymmetrical PLL enable and disable
> control") and commit f384c44754b7 ("clk: mediatek:
> Add configurable enable control to mtk_pll_data") to
> clean up en_mask(bit0) default setting.
>
> Signed-off-by: Chun-Jie Chen <[email protected]>
> Reviewed-by: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Mandy Liu <[email protected]>
>
> ---
Applied to clk-next