2022-05-19 23:31:16

by Tommaso Merciai

Subject: [PATCH] net: phy: DP83822: enable rgmii mode if phy_interface_is_rgmii

RGMII mode can be enable from dp83822 straps, and also writing bit 9
of register 0x17 - RMII and Status Register (RCSR).
When phy_interface_is_rgmii this mode must be enabled

References:
- https://www.ti.com/lit/gpn/dp83822i p66

Signed-off-by: Tommaso Merciai <[email protected]>
Co-developed-by: Michael Trimarchi <[email protected]>
Suggested-by: Alberto Bianchi <[email protected]>
Tested-by: Tommaso Merciai <[email protected]>
---
drivers/net/phy/dp83822.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
index ce17b2af3218..66fa61fb86db 100644
--- a/drivers/net/phy/dp83822.c
+++ b/drivers/net/phy/dp83822.c
@@ -408,6 +408,10 @@ static int dp83822_config_init(struct phy_device *phydev)
if (err)
return err;
}
+
+ /* Enable RGMII Mode */
+ phy_set_bits_mmd(phydev, DP83822_DEVADDR,
+ MII_DP83822_RCSR, BIT(9));
}

if (dp83822->fx_enabled) {
--
2.25.1

2022-05-20 04:44:27

by Andrew Lunn

Subject: Re: [PATCH] net: phy: DP83822: enable rgmii mode if phy_interface_is_rgmii

On Thu, May 19, 2022 at 08:29:26PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
>
> Il gio 19 mag 2022, 20:24 Tommaso Merciai <[email protected]
> > ha scritto:
>
> RGMII mode can be enable from dp83822 straps, and also writing bit 9
> of register 0x17 - RMII and Status Register (RCSR).
> When phy_interface_is_rgmii this mode must be enabled
>
> References:
> ?- https://www.ti.com/lit/gpn/dp83822i p66
>
> Signed-off-by: Tommaso Merciai <[email protected]>
> Co-developed-by: Michael Trimarchi <[email protected]>
> Suggested-by: Alberto Bianchi <[email protected]>
> Tested-by: Tommaso Merciai <[email protected]>
> ---
> ?drivers/net/phy/dp83822.c | 4 ++++
> ?1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
> index ce17b2af3218..66fa61fb86db 100644
> --- a/drivers/net/phy/dp83822.c
> +++ b/drivers/net/phy/dp83822.c
> @@ -408,6 +408,10 @@ static int dp83822_config_init(struct phy_device
> *phydev)
> ? ? ? ? ? ? ? ? ? ? ? ? if (err)
> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? return err;
> ? ? ? ? ? ? ? ? }
> +
> +? ? ? ? ? ? ? ?/* Enable RGMII Mode */
> +? ? ? ? ? ? ? ?phy_set_bits_mmd(phydev, DP83822_DEVADDR,
> +? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?MII_DP83822_RCSR, BIT(9));
> ? ? ? ? }
>
>
>
> Please define bit 9 and this break other connection. Introduce again the switch
> for phy interface connection

Hi guys

Please try to perform your own reviews before posting to the list.

I agree with an #define for BIT(9).

However, i don't understand what you mean by the rest of your
comments. Please make sure your colleges understand you.

Andrew