2022-05-23 09:23:56

by Taniya Das

Subject: [PATCH v2 0/3] Add support for audio clock gating resets for SC7280

Add support for clock gating resets for lpass audio clock controller and
also add support for external MCLKs for I2S.

[v2]
* Update/fix the YAML for reg property against each compatible.

[v1]
* Add support for clock gating resets for lpass audio clock
controller & MCLKs.

Taniya Das (3):
dt-bindings: clock: Add resets for LPASS audio clock controller for
SC7280
dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280
clk: qcom: lpass: Add support for resets & external mclk for SC7280

.../clock/qcom,sc7280-lpasscorecc.yaml | 20 +++++++++--
drivers/clk/qcom/lpassaudiocc-sc7280.c | 17 +++++++++-
drivers/clk/qcom/lpasscorecc-sc7280.c | 33 +++++++++++++++++++
.../clock/qcom,lpassaudiocc-sc7280.h | 5 +++
.../clock/qcom,lpasscorecc-sc7280.h | 2 ++
5 files changed, 73 insertions(+), 4 deletions(-)

--
2.17.1

2022-05-23 09:24:11

by Taniya Das

Subject: [PATCH v2 2/3] dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280

Support external mclk to interface external MI2S clocks for SC7280.

Fixes: 57405b795504 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280").
Signed-off-by: Taniya Das <[email protected]>
---
include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h | 2 ++
1 file changed, 2 insertions(+)

diff --git a/include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h b/include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
index 28ed2a07aacc..0324c69ce968 100644
--- a/include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
+++ b/include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
@@ -19,6 +19,8 @@
#define LPASS_CORE_CC_LPM_CORE_CLK 9
#define LPASS_CORE_CC_LPM_MEM0_CORE_CLK 10
#define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK 11
+#define LPASS_CORE_CC_EXT_MCLK0_CLK 12
+#define LPASS_CORE_CC_EXT_MCLK0_CLK_SRC 13

/* LPASS_CORE_CC power domains */
#define LPASS_CORE_CC_LPASS_CORE_HM_GDSC 0
--
2.17.1

2022-05-23 09:24:13

by Taniya Das

Subject: [PATCH v2 3/3] clk: qcom: lpass: Add support for resets & external mclk for SC7280

The clock gating control for TX/RX/WSA core bus clocks would be required
to be reset(moved from hardware control) from audio core driver. Thus
add the support for the reset clocks.

Also add the external mclk to interface external MI2S.

Fixes: 2b75e142523e ("clk: qcom: lpass: Add support for LPASS clock controller for SC7280").
Signed-off-by: Taniya Das <[email protected]>
---
drivers/clk/qcom/lpassaudiocc-sc7280.c | 17 ++++++++++++-
drivers/clk/qcom/lpasscorecc-sc7280.c | 33 ++++++++++++++++++++++++++
2 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c
index 6ab6e5a34c72..536509b78341 100644
--- a/drivers/clk/qcom/lpassaudiocc-sc7280.c
+++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
@@ -22,6 +22,7 @@
#include "clk-regmap-mux.h"
#include "common.h"
#include "gdsc.h"
+#include "reset.h"

enum {
P_BI_TCXO,
@@ -221,7 +222,7 @@ static struct clk_rcg2 lpass_aon_cc_main_rcg_clk_src = {
.parent_data = lpass_aon_cc_parent_data_0,
.num_parents = ARRAY_SIZE(lpass_aon_cc_parent_data_0),
.flags = CLK_OPS_PARENT_ENABLE,
- .ops = &clk_rcg2_ops,
+ .ops = &clk_rcg2_shared_ops,
},
};

@@ -665,6 +666,18 @@ static const struct qcom_cc_desc lpass_audio_cc_sc7280_desc = {
.num_clks = ARRAY_SIZE(lpass_audio_cc_sc7280_clocks),
};

+static const struct qcom_reset_map lpass_audio_cc_sc7280_resets[] = {
+ [LPASS_AUDIO_SWR_RX_CGCR] = { 0xa0, 1 },
+ [LPASS_AUDIO_SWR_TX_CGCR] = { 0xa8, 1 },
+ [LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
+};
+
+static const struct qcom_cc_desc lpass_audio_cc_reset_sc7280_desc = {
+ .config = &lpass_audio_cc_sc7280_regmap_config,
+ .resets = lpass_audio_cc_sc7280_resets,
+ .num_resets = ARRAY_SIZE(lpass_audio_cc_sc7280_resets),
+};
+
static const struct of_device_id lpass_audio_cc_sc7280_match_table[] = {
{ .compatible = "qcom,sc7280-lpassaudiocc" },
{ }
@@ -741,6 +754,8 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev)
return ret;
}

+ ret = qcom_cc_probe_by_index(pdev, 1, &lpass_audio_cc_reset_sc7280_desc);
+
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_put_autosuspend(&pdev->dev);
pm_runtime_put_sync(&pdev->dev);
diff --git a/drivers/clk/qcom/lpasscorecc-sc7280.c b/drivers/clk/qcom/lpasscorecc-sc7280.c
index 1f1f1bd1b68e..6ad19b06b1ce 100644
--- a/drivers/clk/qcom/lpasscorecc-sc7280.c
+++ b/drivers/clk/qcom/lpasscorecc-sc7280.c
@@ -190,6 +190,19 @@ static struct clk_rcg2 lpass_core_cc_ext_if1_clk_src = {
},
};

+static struct clk_rcg2 lpass_core_cc_ext_mclk0_clk_src = {
+ .cmd_rcgr = 0x20000,
+ .mnd_width = 8,
+ .hid_width = 5,
+ .parent_map = lpass_core_cc_parent_map_0,
+ .freq_tbl = ftbl_lpass_core_cc_ext_if0_clk_src,
+ .clkr.hw.init = &(const struct clk_init_data){
+ .name = "lpass_core_cc_ext_mclk0_clk_src",
+ .parent_data = lpass_core_cc_parent_data_0,
+ .num_parents = ARRAY_SIZE(lpass_core_cc_parent_data_0),
+ .ops = &clk_rcg2_ops,
+ },
+};

static struct clk_branch lpass_core_cc_core_clk = {
.halt_reg = 0x1f000,
@@ -283,6 +296,24 @@ static struct clk_branch lpass_core_cc_lpm_mem0_core_clk = {
},
};

+static struct clk_branch lpass_core_cc_ext_mclk0_clk = {
+ .halt_reg = 0x20014,
+ .halt_check = BRANCH_HALT,
+ .clkr = {
+ .enable_reg = 0x20014,
+ .enable_mask = BIT(0),
+ .hw.init = &(const struct clk_init_data){
+ .name = "lpass_core_cc_ext_mclk0_clk",
+ .parent_hws = (const struct clk_hw*[]){
+ &lpass_core_cc_ext_mclk0_clk_src.clkr.hw,
+ },
+ .num_parents = 1,
+ .flags = CLK_SET_RATE_PARENT,
+ .ops = &clk_branch2_ops,
+ },
+ },
+};
+
static struct clk_branch lpass_core_cc_sysnoc_mport_core_clk = {
.halt_reg = 0x23000,
.halt_check = BRANCH_HALT_VOTED,
@@ -326,6 +357,8 @@ static struct clk_regmap *lpass_core_cc_sc7280_clocks[] = {
[LPASS_CORE_CC_LPM_CORE_CLK] = &lpass_core_cc_lpm_core_clk.clkr,
[LPASS_CORE_CC_LPM_MEM0_CORE_CLK] = &lpass_core_cc_lpm_mem0_core_clk.clkr,
[LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK] = &lpass_core_cc_sysnoc_mport_core_clk.clkr,
+ [LPASS_CORE_CC_EXT_MCLK0_CLK] = &lpass_core_cc_ext_mclk0_clk.clkr,
+ [LPASS_CORE_CC_EXT_MCLK0_CLK_SRC] = &lpass_core_cc_ext_mclk0_clk_src.clkr,
};

static struct regmap_config lpass_core_cc_sc7280_regmap_config = {
--
2.17.1

2022-05-24 02:53:15

by Rob Herring

Subject: Re: [PATCH v2 2/3] dt-bindings: clock: Add support for external MCLKs for LPASS on SC7280

On Mon, 23 May 2022 14:53:13 +0530, Taniya Das wrote:
> Support external mclk to interface external MI2S clocks for SC7280.
>
> Fixes: 57405b795504 ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280").
> Signed-off-by: Taniya Das <[email protected]>
> ---
> include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h | 2 ++
> 1 file changed, 2 insertions(+)
>

Acked-by: Rob Herring <[email protected]>

2022-05-26 00:06:00

by Stephen Boyd

Subject: Re: [PATCH v2 3/3] clk: qcom: lpass: Add support for resets & external mclk for SC7280

Quoting Taniya Das (2022-05-23 02:23:14)
> diff --git a/drivers/clk/qcom/lpassaudiocc-sc7280.c b/drivers/clk/qcom/lpassaudiocc-sc7280.c
> index 6ab6e5a34c72..536509b78341 100644
> --- a/drivers/clk/qcom/lpassaudiocc-sc7280.c
> +++ b/drivers/clk/qcom/lpassaudiocc-sc7280.c
> static const struct of_device_id lpass_audio_cc_sc7280_match_table[] = {
> { .compatible = "qcom,sc7280-lpassaudiocc" },
> { }
> @@ -741,6 +754,8 @@ static int lpass_audio_cc_sc7280_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = qcom_cc_probe_by_index(pdev, 1, &lpass_audio_cc_reset_sc7280_desc);

What if it fails? Shouldn't we pm_runtime_disable()?

> +
> pm_runtime_mark_last_busy(&pdev->dev);
> pm_runtime_put_autosuspend(&pdev->dev);
> pm_runtime_put_sync(&pdev->dev);