2022-05-25 19:41:59

by Herve Codina

Subject: [PATCH v3 0/3] Microchip LAN966x USB device support

Hi,

This series add support for the USB device controller available on
the Microchip LAN966x SOCs (LAN9662 and LAN9668).

Both SOCs have the same controller and this controller is also the
same as the one present on the SAMAD3 SOC.

Regards,
Herve

Changes v2:
- Avoid wildcards in the DT compatible string
- Rename the DT node

Changes v3:
- Add Krzysztof's 'Acked-by' on patch 2/3
- Change node insertion point (sort nodes by base addresses) on patch 3/3

Herve Codina (3):
clk: lan966x: Fix the lan966x clock gate register address
dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
ARM: dts: lan966x: Add UDPHS support

Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
drivers/clk/clk-lan966x.c | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)

--
2.35.3

2022-05-25 19:44:34

by Herve Codina

Subject: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support

Add UDPHS (the USB High Speed Device Port controller) support.

The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.

Signed-off-by: Herve Codina <[email protected]>
---
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7d2869648050..e086df741f99 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
status = "disabled";
};

+ udc: usb@e0808000 {
+ compatible = "microchip,lan9662-udc",
+ "atmel,sama5d3-udc";
+ reg = <0x00200000 0x80000>,
+ <0xe0808000 0x400>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
can0: can@e081c000 {
compatible = "bosch,m_can";
reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
--
2.35.3

2022-06-30 09:58:11

by Claudiu Beznea

Subject: Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support

On 25.05.2022 10:10, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add UDPHS (the USB High Speed Device Port controller) support.
>
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
>
> Signed-off-by: Herve Codina <[email protected]>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..e086df741f99 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> status = "disabled";
> };
>
> + udc: usb@e0808000 {
> + compatible = "microchip,lan9662-udc",
> + "atmel,sama5d3-udc";
> + reg = <0x00200000 0x80000>,
> + <0xe0808000 0x400>;
> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> + clock-names = "pclk", "hclk";
> + status = "disabled";
> + };
> +

This doesn't apply clean on top of v5.19-rc1. Can you check and resend?

> can0: can@e081c000 {
> compatible = "bosch,m_can";
> reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
> --
> 2.35.3
>

2022-07-01 07:11:52

by Herve Codina

Subject: Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support

Hi Claudiu,

On Thu, 30 Jun 2022 09:31:00 +0000
<[email protected]> wrote:

> On 25.05.2022 10:10, Herve Codina wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Add UDPHS (the USB High Speed Device Port controller) support.
> >
> > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> > IP. This IP is also the same as the one present in the SAMA5D3
> > SOC.
> >
> > Signed-off-by: Herve Codina <[email protected]>
> > ---
> > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> > index 7d2869648050..e086df741f99 100644
> > --- a/arch/arm/boot/dts/lan966x.dtsi
> > +++ b/arch/arm/boot/dts/lan966x.dtsi
> > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> > status = "disabled";
> > };
> >
> > + udc: usb@e0808000 {
> > + compatible = "microchip,lan9662-udc",
> > + "atmel,sama5d3-udc";
> > + reg = <0x00200000 0x80000>,
> > + <0xe0808000 0x400>;
> > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> > + clock-names = "pclk", "hclk";
> > + status = "disabled";
> > + };
> > +
>
> This doesn't apply clean on top of v5.19-rc1. Can you check and resend?

Sure,
I am going to send a rebased version of this series.

Thanks,
Hervé

--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com