Now that all clock domains needed for SysMMUs are implemented [1]
(pending), and the basic SysMMU v7 support is ready as well [2], let's
add all related CMU and SysMMU nodes to Exynos850 SoC device tree.
All those SysMMU instances were tested with "emulated translation"
driver [4] on E850-96 board: both the emulated translation and fault
handling were verified.
This patch series depends on [1], so it must be taken into the account
when merging it.
[1] https://lkml.org/lkml/2022/8/8/752
[2] https://lkml.org/lkml/2022/7/14/1215
[3] https://lkml.org/lkml/2022/7/26/950
[4] https://github.com/joe-skb7/linux/tree/e850-96-mainline-iommu
Sam Protsenko (2):
arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850
arm64: dts: exynos: Add SysMMU nodes for Exynos850
arch/arm64/boot/dts/exynos/exynos850.dtsi | 83 +++++++++++++++++++++++
1 file changed, 83 insertions(+)
--
2.30.2
Add all SysMMU nodes to Exynos850 SoC device tree.
Signed-off-by: Sam Protsenko <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos850.dtsi | 45 +++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
index 8e78b50416d8..4204a443ea4a 100644
--- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
@@ -503,6 +503,51 @@ i2c_6: i2c@13890000 {
status = "disabled";
};
+ sysmmu_aud: sysmmu@14850000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14850000 0x9000>;
+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "sysmmu";
+ clocks = <&cmu_aud CLK_GOUT_AUD_SYSMMU_CLK>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_dpu: sysmmu@130c0000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x130c0000 0x9000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "sysmmu";
+ clocks = <&cmu_dpu CLK_GOUT_DPU_SMMU_CLK>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_is0: sysmmu@14550000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14550000 0x9000>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "sysmmu";
+ clocks = <&cmu_is CLK_GOUT_IS_SYSMMU_IS0_CLK>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_is1: sysmmu@14570000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x14570000 0x9000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "sysmmu";
+ clocks = <&cmu_is CLK_GOUT_IS_SYSMMU_IS1_CLK>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_mfcmscl: sysmmu@12c50000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x12c50000 0x9000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "sysmmu";
+ clocks = <&cmu_mfcmscl CLK_GOUT_MFCMSCL_SYSMMU_CLK>;
+ #iommu-cells = <0>;
+ };
+
sysreg_peri: syscon@10020000 {
compatible = "samsung,exynos850-sysreg", "syscon";
reg = <0x10020000 0x10000>;
--
2.30.2
On 08/08/2022 23:17, Sam Protsenko wrote:
> Now that all clock domains needed for SysMMUs are implemented [1]
> (pending), and the basic SysMMU v7 support is ready as well [2], let's
> add all related CMU and SysMMU nodes to Exynos850 SoC device tree.
>
> All those SysMMU instances were tested with "emulated translation"
> driver [4] on E850-96 board: both the emulated translation and fault
> handling were verified.
>
> This patch series depends on [1], so it must be taken into the account
> when merging it.
>
> [1] https://lkml.org/lkml/2022/8/8/752
It should not be sent separately then, unless you are fine waiting
entire cycle for this to land.
Best regards,
Krzysztof
On 08/08/2022 23:17, Sam Protsenko wrote:
> Add all SysMMU nodes to Exynos850 SoC device tree.
>
> Signed-off-by: Sam Protsenko <[email protected]>
> ---
> arch/arm64/boot/dts/exynos/exynos850.dtsi | 45 +++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> index 8e78b50416d8..4204a443ea4a 100644
> --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi
> @@ -503,6 +503,51 @@ i2c_6: i2c@13890000 {
> status = "disabled";
> };
>
> + sysmmu_aud: sysmmu@14850000 {
Order the nodes by unit address at least within each other.
Best regards,
Krzysztof
On Tue, 9 Aug 2022 at 10:07, Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 08/08/2022 23:17, Sam Protsenko wrote:
> > Now that all clock domains needed for SysMMUs are implemented [1]
> > (pending), and the basic SysMMU v7 support is ready as well [2], let's
> > add all related CMU and SysMMU nodes to Exynos850 SoC device tree.
> >
> > All those SysMMU instances were tested with "emulated translation"
> > driver [4] on E850-96 board: both the emulated translation and fault
> > handling were verified.
> >
> > This patch series depends on [1], so it must be taken into the account
> > when merging it.
> >
> > [1] https://lkml.org/lkml/2022/8/8/752
>
> It should not be sent separately then, unless you are fine waiting
> entire cycle for this to land.
>
Sure, good point. If it's possible to take all those patches in a
single tree. I remember we already had a similar issue previously.
> Best regards,
> Krzysztof
On Mon, 8 Aug 2022 at 23:17, Sam Protsenko <[email protected]> wrote:
>
> Now that all clock domains needed for SysMMUs are implemented [1]
> (pending), and the basic SysMMU v7 support is ready as well [2], let's
> add all related CMU and SysMMU nodes to Exynos850 SoC device tree.
>
> All those SysMMU instances were tested with "emulated translation"
> driver [4] on E850-96 board: both the emulated translation and fault
> handling were verified.
>
> This patch series depends on [1], so it must be taken into the account
> when merging it.
>
> [1] https://lkml.org/lkml/2022/8/8/752
> [2] https://lkml.org/lkml/2022/7/14/1215
> [3] https://lkml.org/lkml/2022/7/26/950
> [4] https://github.com/joe-skb7/linux/tree/e850-96-mainline-iommu
>
> Sam Protsenko (2):
> arm64: dts: exynos: Add CMU_AUD, CMU_IS and CMU_MFCMSCL for Exynos850
> arm64: dts: exynos: Add SysMMU nodes for Exynos850
>
> arch/arm64/boot/dts/exynos/exynos850.dtsi | 83 +++++++++++++++++++++++
> 1 file changed, 83 insertions(+)
>
> --
> 2.30.2
>
This patch series is superseded by v2 here: [1].
[1] https://lkml.org/lkml/2022/8/9/328