Some accumulated dts updates for NXP ls208xa SoC family.
v2 Updates:
- Cleaned up patch descriptions
- Updated node names to use - instead of _
v3 Updates:
- Move fpga mdiomux changes from seperate board dtses into common
ls208xa-qds dtsi
- Update interrupt properties to use MACRO
- More style fixes
v4 Updates:
- Fix node ordering issue
- Add SoB
Biwen Li (1):
arm64: dts: ls208xa-rdb: fix errata E-00013
Ioana Radulescu (1):
arm64: dts: ls2080a-rdb: add phy nodes
Li Yang (1):
arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGA
Pankaj Bansal (1):
arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.
Priyanka Jain (1):
arm64: dts: ls2081a-rdb: Add DTS for NXP LS2081ARDB
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../boot/dts/freescale/fsl-ls2080a-rdb.dts | 69 +++++++++
.../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 +
.../boot/dts/freescale/fsl-ls2081a-rdb.dts | 132 ++++++++++++++++++
.../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 65 ++++++++-
.../boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 2 +
.../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 3 +-
7 files changed, 271 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
--
2.37.1
From: Priyanka Jain <[email protected]>
This patch adds support for NXP LS2081ARDB board which has LS2081A SoC.
LS2081A SoC is 40-pin derivative of LS2088A SoC. From functional
perspective both are same. Hence, LS2088a SoC dtsi file is included
from LS2081ARDB dts.
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Santan Kumar <[email protected]>
Signed-off-by: Tao Yang <[email protected]>
Signed-off-by: Yogesh Gaur <[email protected]>
Signed-off-by: Abhimanyu Saini <[email protected]>
Signed-off-by: Li Yang <[email protected]>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../boot/dts/freescale/fsl-ls2081a-rdb.dts | 132 ++++++++++++++++++
2 files changed, 133 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 0815bc56fdbd..e712bbbf2257 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -36,6 +36,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-ten64.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
new file mode 100644
index 000000000000..4461e16fd53a
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for NXP LS2081A RDB Board.
+ *
+ * Copyright 2017 NXP
+ *
+ * Priyanka Jain <[email protected]>
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls2088a.dtsi"
+
+/ {
+ model = "NXP Layerscape 2081A RDB Board";
+ compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ };
+
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+};
+
+&dspi {
+ status = "okay";
+
+ n25q512a: flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <3000000>;
+ reg = <0>;
+ };
+};
+
+&esdhc {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+
+ pca9547: mux@75 {
+ compatible = "nxp,pca9547";
+ reg = <0x75>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <500>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ adt7481@4c {
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+ };
+ };
+};
+
+&ifc {
+ status = "disabled";
+};
+
+&qspi {
+ status = "okay";
+
+ s25fs512s0: flash@0 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+
+ s25fs512s1: flash@1 {
+ compatible = "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <4>;
+ spi-max-frequency = <20000000>;
+ reg = <1>;
+ };
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
--
2.37.1
From: Pankaj Bansal <[email protected]>
NXP Erratum A008585 affects A57 core cluster used in LS2085 rev1.
However this problem has been fixed in A72 core cluster used in LS2088.
Therefore remove the erratum from LS2088A. Keeping it only in LS2085.
Signed-off-by: Pankaj Bansal <[email protected]>
Reviewed-by: Sandeep Malik <[email protected]>
Acked-by: Priyanka Jain <[email protected]>
Signed-off-by: Li Yang <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 4 ++++
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 3 +--
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index 6f6667b70028..a2cadf757148 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -150,3 +150,7 @@ &pcie4 {
ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
+
+&timer {
+ fsl,erratum-a008585;
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index d76f1c42f3fa..f1b9cc8714dc 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -239,13 +239,12 @@ map0 {
};
};
- timer {
+ timer: timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
<1 14 4>, /* Physical Non-Secure PPI, active-low */
<1 11 4>, /* Virtual PPI, active-low */
<1 10 4>; /* Hypervisor PPI, active-low */
- fsl,erratum-a008585;
};
pmu {
--
2.37.1
Update the cpld node name to be generic board-contrl and add mmio mdio
mux nodes from the on-board FPGA.
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Li Yang <[email protected]>
---
.../boot/dts/freescale/fsl-ls208xa-qds.dtsi | 65 ++++++++++++++++++-
1 file changed, 62 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
index 6fab73d484b6..f598669e742f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
@@ -9,6 +9,27 @@
*
*/
+/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
+&dpmac9 {
+ phy-handle = <&mdio0_phy12>;
+ phy-connection-type = "sgmii";
+};
+
+&dpmac10 {
+ phy-handle = <&mdio0_phy13>;
+ phy-connection-type = "sgmii";
+};
+
+&dpmac11 {
+ phy-handle = <&mdio0_phy14>;
+ phy-connection-type = "sgmii";
+};
+
+&dpmac12 {
+ phy-handle = <&mdio0_phy15>;
+ phy-connection-type = "sgmii";
+};
+
&esdhc {
mmc-hs200-1_8v;
status = "okay";
@@ -36,9 +57,47 @@ nand@2,0 {
reg = <0x2 0x0 0x10000>;
};
- cpld@3,0 {
- reg = <0x3 0x0 0x10000>;
- compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
+ boardctrl: board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ls208xaqds-fpga", "fsl,fpga-qixis", "simple-mfd";
+ reg = <3 0 0x1000>;
+ ranges = <0 3 0 0x1000>;
+
+ mdio-mux-emi1@54 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&emdio1>;
+ reg = <0x54 1>; /* BRDCFG4 */
+ mux-mask = <0xe0>; /* EMI1_MDIO */
+ #address-cells=<1>;
+ #size-cells = <0>;
+
+ /* Child MDIO buses, one for each riser card:
+ * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
+ * VSC8234 PHYs on the riser cards.
+ */
+ mdio_mux3: mdio@60 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ mdio0_phy12: mdio-phy0@1c {
+ reg = <0x1c>;
+ };
+
+ mdio0_phy13: mdio-phy1@1d {
+ reg = <0x1d>;
+ };
+
+ mdio0_phy14: mdio-phy2@1e {
+ reg = <0x1e>;
+ };
+
+ mdio0_phy15: mdio-phy3@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
};
};
--
2.37.1
From: Biwen Li <[email protected]>
Specify a channel zero in idle state to avoid enterring tri-stated state
for PCA9547.
Some information about E-00013:
- Description: I2C1 and I2C3 buses are missing pull-up.
- Impact: When the PCA954x device is tri-stated, the I2C bus will float.
This makes the I2C bus and its associated downstream devices
inaccessible.
- Hardware fix: Populate resistors R189 and R190 for I2C1 and resistors
R228 and R229 for I2C3.
- Software fix: Remove the tri-state option from the PCA954x
driver(PCA954x always on enable status, specify a channel zero in dts to
fix the errata E-00013).
Signed-off-by: Biwen Li <[email protected]>
Signed-off-by: Li Yang <[email protected]>
---
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
index f8135c5c252d..3d9647b3da14 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -49,6 +49,8 @@ pca9547@75 {
reg = <0x75>;
#address-cells = <1>;
#size-cells = <0>;
+ idle-state = <0>;
+
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
--
2.37.1
From: Ioana Radulescu <[email protected]>
Define PHY nodes on the board.
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Li Yang <[email protected]>
---
.../boot/dts/freescale/fsl-ls2080a-rdb.dts | 69 +++++++++++++++++++
1 file changed, 69 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
index 44894356059c..8b6915136997 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -14,6 +14,7 @@
#include "fsl-ls2080a.dtsi"
#include "fsl-ls208xa-rdb.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "Freescale Layerscape 2080a RDB Board";
@@ -23,3 +24,71 @@ chosen {
stdout-path = "serial1:115200n8";
};
};
+
+&dpmac5 {
+ phy-handle = <&mdio2_phy1>;
+ phy-connection-type = "10gbase-r";
+};
+
+&dpmac6 {
+ phy-handle = <&mdio2_phy2>;
+ phy-connection-type = "10gbase-r";
+};
+
+&dpmac7 {
+ phy-handle = <&mdio2_phy3>;
+ phy-connection-type = "10gbase-r";
+};
+
+&dpmac8 {
+ phy-handle = <&mdio2_phy4>;
+ phy-connection-type = "10gbase-r";
+};
+
+&emdio1 {
+ status = "disabled";
+
+ /* CS4340 PHYs */
+ mdio1_phy1: emdio1-phy@10 {
+ reg = <0x10>;
+ };
+
+ mdio1_phy2: emdio1-phy@11 {
+ reg = <0x11>;
+ };
+
+ mdio1_phy3: emdio1-phy@12 {
+ reg = <0x12>;
+ };
+
+ mdio1_phy4: emdio1-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&emdio2 {
+ /* AQR405 PHYs */
+ mdio2_phy1: emdio2-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x0>;
+ };
+
+ mdio2_phy2: emdio2-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x1>;
+ };
+
+ mdio2_phy3: emdio2-phy@2 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x2>;
+ };
+
+ mdio2_phy4: emdio2-phy@3 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x3>;
+ };
+};
--
2.37.1
On Wed, Sep 14, 2022 at 04:15:33PM -0500, Li Yang wrote:
> Some accumulated dts updates for NXP ls208xa SoC family.
>
> v2 Updates:
> - Cleaned up patch descriptions
> - Updated node names to use - instead of _
>
> v3 Updates:
> - Move fpga mdiomux changes from seperate board dtses into common
> ls208xa-qds dtsi
> - Update interrupt properties to use MACRO
> - More style fixes
>
> v4 Updates:
> - Fix node ordering issue
> - Add SoB
>
> Biwen Li (1):
> arm64: dts: ls208xa-rdb: fix errata E-00013
>
> Ioana Radulescu (1):
> arm64: dts: ls2080a-rdb: add phy nodes
>
> Li Yang (1):
> arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGA
>
> Pankaj Bansal (1):
> arm64: dts: ls208x: remove NXP Erratum A008585 from LS2088A.
>
> Priyanka Jain (1):
> arm64: dts: ls2081a-rdb: Add DTS for NXP LS2081ARDB
Applied all, thanks!