This patch series converts atmel-flexcom bindings into json-schema format.
Adds support for lan966x flexcom chip-select configurations and its
DT bindings.
v7 -> v8:
- Added back patternProperties for child nodes.
- Changed compatible string to microchip,lan9668-flexcom.
v6 -> v7:
- Change filename to atmel,sama5d2-flexcom.yaml
- Add #address-cells, #size-cells to flexcom node - Fixed warnings.
v5 -> v6:
- Removed spi node from example as suggested by Rob and
also pattern properties(spi dt-bindings conversion to yaml patch is under review).
https://patchwork.kernel.org/project/linux-arm-kernel/patch/[email protected]/
Once this is accepted, I will add back spi example through new patch.
v4 -> v5:
- Fix indentations of DT example.
- Fix dt-schema errors - removed minItems, maxItems for allOf:if:then
"reg" property as it is not required.
v3 -> v4:
- Fix dtschema errors.
- Add a condition to flexcom chip-selects configuration as chip-select
lines are optional.
v2 -> v3:
- changed IRQ flag in dt-bindings example.
- added reg property specific to lan66x which is missed in v2.
- used goto label for clk_disable in error cases.
v1 -> v2:
- minor fix in title of dt-bindings.
- Modified new dt properties usage in atmel,flexcom.yaml.
- Used GENMASK and macros for maximum allowed values.
- Use u32 values for flexcom chipselects instead of strings.
- disable clock in case of errors.
Kavyasree Kotagiri (3):
dt-bindings: mfd: Convert atmel-flexcom to json-schema
dt-bindings: mfd: atmel,sama5d2-flexcom: Add new compatible string for
lan966x
mfd: atmel-flexcom: Add support for lan966x flexcom chip-select
configuration
.../bindings/mfd/atmel,sama5d2-flexcom.yaml | 155 ++++++++++++++++++
.../devicetree/bindings/mfd/atmel-flexcom.txt | 63 -------
drivers/mfd/atmel-flexcom.c | 94 ++++++++++-
3 files changed, 248 insertions(+), 64 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
--
2.25.1
Convert the Atmel flexcom device tree bindings to json schema.
Signed-off-by: Kavyasree Kotagiri <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
Changing reference to SPI yaml bindings is covered in below patch series:
https://lore.kernel.org/linux-arm-kernel/[email protected]/
https://lore.kernel.org/linux-arm-kernel/[email protected]/
v7 -> v8:
- Added back patternProperties for child nodes.
v6 -> v7:
- Change filename to atmel,sama5d2-flexcom.yaml
- Add #address-cells, #size-cells to flexcom node - Fixed warnings.
v5 -> v6:
- Removed spi node from example as suggested by Rob and
also pattern properties(spi dt-bindings conversion to yaml patch is under review).
Once that is accepted, I will add back spi example through new patch.
v4 -> v5:
- Fixed indentations.
v3 -> v4:
- Corrected format of enum used for compatible string.
v2 -> v3:
- used enum for compatible string.
- changed irq flag to IRQ_TYPE_LEVEL_HIGH in example.
- fixed dtschema errors.
v1 -> v2:
- Fix title.
.../bindings/mfd/atmel,sama5d2-flexcom.yaml | 92 +++++++++++++++++++
.../devicetree/bindings/mfd/atmel-flexcom.txt | 63 -------------
2 files changed, 92 insertions(+), 63 deletions(-)
create mode 100644 Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
delete mode 100644 Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
new file mode 100644
index 000000000000..bfa7d340a198
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -0,0 +1,92 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/atmel,sama5d2-flexcom.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Flexcom (Flexible Serial Communication Unit)
+
+maintainers:
+ - Kavyasree Kotagiri <[email protected]>
+
+description:
+ The Atmel Flexcom is just a wrapper which embeds a SPI controller,
+ an I2C controller and an USART. Only one function can be used at a
+ time and is chosen at boot time according to the device tree.
+
+properties:
+ compatible:
+ enum:
+ - atmel,sama5d2-flexcom
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges:
+ description:
+ One range for the full I/O register region. (including USART,
+ TWI and SPI registers).
+ items:
+ maxItems: 3
+
+ atmel,flexcom-mode:
+ description: |
+ Specifies the flexcom mode as follows:
+ 1: USART
+ 2: SPI
+ 3: I2C.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 3]
+
+patternProperties:
+ "^serial@[0-9a-f]+$":
+ type: object
+ description:
+ Child node describing USART. See atmel-usart.txt for details
+ of USART bindings.
+
+ "^spi@[0-9a-f]+$":
+ type: object
+ description:
+ Child node describing SPI. See ../spi/spi_atmel.txt for details
+ of SPI bindings.
+
+ "^i2c@[0-9a-f]+$":
+ $ref: ../i2c/atmel,at91sam-i2c.yaml
+ description:
+ Child node describing I2C.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+ - atmel,flexcom-mode
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ flx0: flexcom@f8034000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xf8034000 0x200>;
+ clocks = <&flx0_clk>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xf8034000 0x800>;
+ atmel,flexcom-mode = <2>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
deleted file mode 100644
index 9d837535637b..000000000000
--- a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-* Device tree bindings for Atmel Flexcom (Flexible Serial Communication Unit)
-
-The Atmel Flexcom is just a wrapper which embeds a SPI controller, an I2C
-controller and an USART. Only one function can be used at a time and is chosen
-at boot time according to the device tree.
-
-Required properties:
-- compatible: Should be "atmel,sama5d2-flexcom"
-- reg: Should be the offset/length value for Flexcom dedicated
- I/O registers (without USART, TWI or SPI registers).
-- clocks: Should be the Flexcom peripheral clock from PMC.
-- #address-cells: Should be <1>
-- #size-cells: Should be <1>
-- ranges: Should be one range for the full I/O register region
- (including USART, TWI and SPI registers).
-- atmel,flexcom-mode: Should be one of the following values:
- - <1> for USART
- - <2> for SPI
- - <3> for I2C
-
-Required child:
-A single available child device of type matching the "atmel,flexcom-mode"
-property.
-
-The phandle provided by the clocks property of the child is the same as one for
-the Flexcom parent.
-
-For other properties, please refer to the documentations of the respective
-device:
-- ../serial/atmel-usart.txt
-- ../spi/spi_atmel.txt
-- ../i2c/i2c-at91.txt
-
-Example:
-
-flexcom@f8034000 {
- compatible = "atmel,sama5d2-flexcom";
- reg = <0xf8034000 0x200>;
- clocks = <&flx0_clk>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x0 0xf8034000 0x800>;
- atmel,flexcom-mode = <2>;
-
- spi@400 {
- compatible = "atmel,at91rm9200-spi";
- reg = <0x400 0x200>;
- interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_flx0_default>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&flx0_clk>;
- clock-names = "spi_clk";
- atmel,fifo-size = <32>;
-
- flash@0 {
- compatible = "atmel,at25f512b";
- reg = <0>;
- spi-max-frequency = <20000000>;
- };
- };
-};
--
2.25.1
LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1
in flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins
can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage depends on
functions being configured.
Signed-off-by: Kavyasree Kotagiri <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
v7 -> v8:
- Changed compatible string to microchip,lan9668-flexcom.
v6 -> v7:
- Add #address-cells, #size-cells to flx3 example.
v5 -> v6:
- Removed spi node from flx3 example.
v4 -> v5:
- Fixed indentations and dt-schema errors.
- No errors seen with 'make dt_binding_check'.
v3 -> v4:
- Added else condition to allOf:if:then.
v2 -> v3:
- Add reg property of lan966x missed in v2.
v1 -> v2:
- Use allOf:if:then for lan966x dt properties
.../bindings/mfd/atmel,sama5d2-flexcom.yaml | 65 ++++++++++++++++++-
1 file changed, 64 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
index bfa7d340a198..568da7cb630c 100644
--- a/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
+++ b/Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml
@@ -18,9 +18,11 @@ properties:
compatible:
enum:
- atmel,sama5d2-flexcom
+ - microchip,lan9668-flexcom
reg:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
clocks:
maxItems: 1
@@ -47,6 +49,27 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 3]
+ microchip,flx-shrd-pins:
+ description: Specify the Flexcom shared pins to be used for flexcom
+ chip-selects.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 2
+ items:
+ minimum: 0
+ maximum: 20
+
+ microchip,flx-cs:
+ description: Flexcom chip selects. Here, value of '0' represents "cts" line
+ of flexcom USART or "cs0" line of flexcom SPI and value of '1' represents
+ "rts" line of flexcom USART or "cs1" line of flexcom SPI.
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 1
+ maxItems: 2
+ items:
+ minimum: 0
+ maximum: 1
+
patternProperties:
"^serial@[0-9a-f]+$":
type: object
@@ -74,6 +97,31 @@ required:
- ranges
- atmel,flexcom-mode
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: microchip,lan9668-flexcom
+
+ then:
+ properties:
+ reg:
+ items:
+ - description: Flexcom base registers map
+ - description: Flexcom shared registers map
+ required:
+ - microchip,flx-shrd-pins
+ - microchip,flx-cs
+
+ else:
+ properties:
+ reg:
+ items:
+ - description: Flexcom base registers map
+ microchip,flx-shrd-pins: false
+ microchip,flx-cs: false
+
additionalProperties: false
examples:
@@ -89,4 +137,19 @@ examples:
ranges = <0x0 0xf8034000 0x800>;
atmel,flexcom-mode = <2>;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ flx3: flexcom@e0064000 {
+ compatible = "microchip,lan9668-flexcom";
+ reg = <0xe0064000 0x100>,
+ <0xe2004180 0x8>;
+ clocks = <&flx0_clk>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xe0040000 0x800>;
+ atmel,flexcom-mode = <2>;
+ microchip,flx-shrd-pins = <9>;
+ microchip,flx-cs = <0>;
+ };
...
--
2.25.1
LAN966x SoC have 5 flexcoms. Each flexcom has 2 chip-selects
which are optional I/O lines. For each chip select of each
flexcom there is a configuration register FLEXCOM_SHARED[0-4]:SS_MASK[0-1].
The width of configuration register is 21 because there are
21 shared pins on each of which the chip select can be mapped.
Each bit of the register represents a different FLEXCOM_SHARED pin.
Signed-off-by: Kavyasree Kotagiri <[email protected]>
Reviewed-by: Claudiu Beznea <[email protected]>
---
v7 -> v8:
- Changed compatible string to microchip,lan9668-flexcom.
v6 -> v7:
- No changes.
v5 -> v6:
- No changes.
v4 -> v5:
- No changes.
v3 -> v4:
- Add condition for a flexcom whether to configure chip-select lines
or not, based on "microchip,flx-shrd-pins" property existence because
chip-select lines are optional.
v2 -> v3:
- used goto label for clk_disable in error cases.
v1 -> v2:
- use GENMASK for mask, macros for maximum allowed values.
- use u32 values for flexcom chipselects instead of strings.
- disable clock in case of errors.
drivers/mfd/atmel-flexcom.c | 94 ++++++++++++++++++++++++++++++++++++-
1 file changed, 93 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/atmel-flexcom.c b/drivers/mfd/atmel-flexcom.c
index 33caa4fba6af..92ea15d5fd72 100644
--- a/drivers/mfd/atmel-flexcom.c
+++ b/drivers/mfd/atmel-flexcom.c
@@ -28,15 +28,68 @@
#define FLEX_MR_OPMODE(opmode) (((opmode) << FLEX_MR_OPMODE_OFFSET) & \
FLEX_MR_OPMODE_MASK)
+/* LAN966x flexcom shared register offsets */
+#define FLEX_SHRD_SS_MASK_0 0x0
+#define FLEX_SHRD_SS_MASK_1 0x4
+#define FLEX_SHRD_PIN_MAX 20
+#define FLEX_CS_MAX 1
+#define FLEX_SHRD_MASK GENMASK(20, 0)
+
+struct atmel_flex_caps {
+ bool has_flx_cs;
+};
+
struct atmel_flexcom {
void __iomem *base;
+ void __iomem *flexcom_shared_base;
u32 opmode;
struct clk *clk;
};
+static int atmel_flexcom_lan966x_cs_config(struct platform_device *pdev)
+{
+ struct atmel_flexcom *ddata = dev_get_drvdata(&pdev->dev);
+ struct device_node *np = pdev->dev.of_node;
+ u32 flx_shrd_pins[2], flx_cs[2], val;
+ int err, i, count;
+
+ count = of_property_count_u32_elems(np, "microchip,flx-shrd-pins");
+ if (count <= 0 || count > 2) {
+ dev_err(&pdev->dev, "Invalid %s property (%d)\n", "flx-shrd-pins",
+ count);
+ return -EINVAL;
+ }
+
+ err = of_property_read_u32_array(np, "microchip,flx-shrd-pins", flx_shrd_pins, count);
+ if (err)
+ return err;
+
+ err = of_property_read_u32_array(np, "microchip,flx-cs", flx_cs, count);
+ if (err)
+ return err;
+
+ for (i = 0; i < count; i++) {
+ if (flx_shrd_pins[i] > FLEX_SHRD_PIN_MAX)
+ return -EINVAL;
+
+ if (flx_cs[i] > FLEX_CS_MAX)
+ return -EINVAL;
+
+ val = ~(1 << flx_shrd_pins[i]) & FLEX_SHRD_MASK;
+
+ if (flx_cs[i] == 0)
+ writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_0);
+ else
+ writel(val, ddata->flexcom_shared_base + FLEX_SHRD_SS_MASK_1);
+ }
+
+ return 0;
+}
+
static int atmel_flexcom_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
+ const struct atmel_flex_caps *caps;
struct resource *res;
struct atmel_flexcom *ddata;
int err;
@@ -76,13 +129,52 @@ static int atmel_flexcom_probe(struct platform_device *pdev)
*/
writel(FLEX_MR_OPMODE(ddata->opmode), ddata->base + FLEX_MR);
+ caps = of_device_get_match_data(&pdev->dev);
+ if (!caps) {
+ dev_err(&pdev->dev, "Could not retrieve flexcom caps\n");
+ err = -EINVAL;
+ goto clk_disable;
+ }
+
+ if (caps->has_flx_cs && of_property_read_bool(np, "microchip,flx-shrd-pins")) {
+ ddata->flexcom_shared_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
+ if (IS_ERR(ddata->flexcom_shared_base)) {
+ err = dev_err_probe(&pdev->dev,
+ PTR_ERR(ddata->flexcom_shared_base),
+ "failed to get flexcom shared base address\n");
+ goto clk_disable;
+ }
+
+ err = atmel_flexcom_lan966x_cs_config(pdev);
+ if (err)
+ goto clk_disable;
+ }
+
+clk_disable:
clk_disable_unprepare(ddata->clk);
+ if (err)
+ return err;
return devm_of_platform_populate(&pdev->dev);
}
+static const struct atmel_flex_caps atmel_flexcom_caps = {};
+
+static const struct atmel_flex_caps lan966x_flexcom_caps = {
+ .has_flx_cs = true,
+};
+
static const struct of_device_id atmel_flexcom_of_match[] = {
- { .compatible = "atmel,sama5d2-flexcom" },
+ {
+ .compatible = "atmel,sama5d2-flexcom",
+ .data = &atmel_flexcom_caps,
+ },
+
+ {
+ .compatible = "microchip,lan9668-flexcom",
+ .data = &lan966x_flexcom_caps,
+ },
+
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, atmel_flexcom_of_match);
--
2.25.1
On 15/09/2022 10:44, Kavyasree Kotagiri wrote:
> Convert the Atmel flexcom device tree bindings to json schema.
>
> Signed-off-by: Kavyasree Kotagiri <[email protected]>
> +
> +patternProperties:
> + "^serial@[0-9a-f]+$":
> + type: object
> + description:
> + Child node describing USART. See atmel-usart.txt for details
> + of USART bindings.
> +
> + "^spi@[0-9a-f]+$":
> + type: object
> + description:
> + Child node describing SPI. See ../spi/spi_atmel.txt for details
> + of SPI bindings.
> +
> + "^i2c@[0-9a-f]+$":
> + $ref: ../i2c/atmel,at91sam-i2c.yaml
No improvements here.
Best regards,
Krzysztof
On 15/09/2022 16:32, Krzysztof Kozlowski wrote:
> On 15/09/2022 10:44, Kavyasree Kotagiri wrote:
>> +
>> +patternProperties:
>> + "^serial@[0-9a-f]+$":
>> + type: object
>> + description:
>> + Child node describing USART. See atmel-usart.txt for details
>> + of USART bindings.
>> +
>> + "^spi@[0-9a-f]+$":
>> + type: object
>> + description:
>> + Child node describing SPI. See ../spi/spi_atmel.txt for details
>> + of SPI bindings.
>> +
>> + "^i2c@[0-9a-f]+$":
>> + $ref: ../i2c/atmel,at91sam-i2c.yaml
>
> No improvements here.
>
... probably because it is a resend, while it should not be a resend. I
asked to fix it, so I expect next version. If you do not agree, please
keep discussion going.
Best regards,
Krzysztof
> >> +patternProperties:
> >> + "^serial@[0-9a-f]+$":
> >> + type: object
> >> + description:
> >> + Child node describing USART. See atmel-usart.txt for details
> >> + of USART bindings.
> >> +
> >> + "^spi@[0-9a-f]+$":
> >> + type: object
> >> + description:
> >> + Child node describing SPI. See ../spi/spi_atmel.txt for details
> >> + of SPI bindings.
> >> +
> >> + "^i2c@[0-9a-f]+$":
> >> + $ref: ../i2c/atmel,at91sam-i2c.yaml
> >
> > No improvements here.
> >
>
Somehow, I missed your comment regarding full schema path.
I will update and send next version.
Thanks,
Kavya
> ... probably because it is a resend, while it should not be a resend. I
> asked to fix it, so I expect next version. If you do not agree, please
> keep discussion going.
>
>
> Best regards,
> Krzysztof