On STM32MP13 SoCs, each ADC peripheral has a single ADC block.
These ADC peripherals, ADC1 and ADC2, are fully independent.
The STM32MP131 SoC provides only ADC2, while other STM32MP13x
SoCs provide both ADC1 and ADC2.
The STM32MP13 ADC features and characteristics are slightly
different from STM32MP15 ADC ones, requiring a specific support
in the driver.
This patchset enables the ADC peripheral on STM32MP135F-DK board.
On STM32MP135F-DK board the ADC is connected to VDDA voltage
provided by the PMIC LOD1 supply, which has to be enabled through
SCMI regulator framework.
This serie introduces a fixed regulator to allow ADC probing,
while SCMI regulators support is not available. This does
not ensure ADC regulator enabling however.
Changes in v2:
- Rework commit message length
- Add missing spaces
- Remove useless defines
Olivier Moysan (8):
iio: adc: stm32-adc: fix channel sampling time init
dt-bindings: iio: adc: stm32-adc: add stm32mp13 compatibles
iio: adc: stm32-adc: add stm32mp13 support
iio: adc: stm32: manage min sampling time on all internal channels
ARM: dts: stm32: add adc support to stm32mp13
ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk
ARM: dts: stm32: add adc support on stm32mp135f-dk
.../bindings/iio/adc/st,stm32-adc.yaml | 68 ++++-
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 7 +
arch/arm/boot/dts/stm32mp131.dtsi | 43 +++
arch/arm/boot/dts/stm32mp133.dtsi | 31 +++
arch/arm/boot/dts/stm32mp135f-dk.dts | 34 +++
drivers/iio/adc/stm32-adc-core.c | 29 +-
drivers/iio/adc/stm32-adc-core.h | 30 +++
drivers/iio/adc/stm32-adc.c | 249 +++++++++++++++---
8 files changed, 444 insertions(+), 47 deletions(-)
--
2.25.1
Add a dummy fixed regulator vdd-adc for STM32 ADC,
on STM32MP135F-DK board, while SCMI regulators are not available.
This patch will have to be removed when SCMI regulator support
is added to STM32MP13.
This patch intends to allow ADC enabling on STM32MP13.
With this patch the ADC can probe but it cannot return
valid conversion data, as it's regulator is not actually enabled.
Signed-off-by: Olivier Moysan <[email protected]>
---
arch/arm/boot/dts/stm32mp135f-dk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index e6b8ffd332c7..95068231ed57 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -66,6 +66,14 @@ vdd_sd: vdd-sd {
regulator-max-microvolt = <2900000>;
regulator-always-on;
};
+
+ vdd_adc: vdd-adc {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_adc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
};
&iwdg2 {
--
2.25.1
Configure ADC support on stm32mp135f-dk. ADC can be used for
USB Type-C CC1 & CC2 pins wired to in6 & in12.
Signed-off-by: Olivier Moysan <[email protected]>
---
arch/arm/boot/dts/stm32mp135f-dk.dts | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 95068231ed57..5b7630a2452e 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -76,6 +76,32 @@ vdd_adc: vdd-adc {
};
};
+&adc_1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc1_usb_cc_pins_a>;
+ vdda-supply = <&vdd_adc>;
+ vref-supply = <&vdd_adc>;
+ status = "okay";
+
+ adc1: adc@0 {
+ status = "okay";
+ /*
+ * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in6 & in12.
+ * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C:
+ * 5 * (5.1 + 47kOhms) * 5pF => 1.3us.
+ * Use arbitrary margin here (e.g. 5us).
+ */
+ channel@6 {
+ reg = <6>;
+ st,min-sample-time-ns = <5000>;
+ };
+ channel@12 {
+ reg = <12>;
+ st,min-sample-time-ns = <5000>;
+ };
+ };
+};
+
&iwdg2 {
timeout-sec = <32>;
status = "okay";
--
2.25.1
Add ADC1 and ADC2 support to STM32MP13 SoC family.
The STM32MP131 provides only ADC2, while other STM32MP13 SoCs provide
both ADC1 and ADC2.
Internal channels support limitations:
- VREFINT internal channel requires calibration data from OTP memory.
The nvmem properties used to access OTP are not defined for time being,
as OTP support is not yet enabled.
- VBAT internal channel is not defined by default in SoC DT, and
has be defined in board DT when needed, instead. This avoids unwanted
current consumption on battery, when ADC conversions are performed
on any other channels.
Signed-off-by: Olivier Moysan <[email protected]>
---
arch/arm/boot/dts/stm32mp131.dtsi | 43 +++++++++++++++++++++++++++++++
arch/arm/boot/dts/stm32mp133.dtsi | 31 ++++++++++++++++++++++
2 files changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index 3a921db23e9f..5e46234f60f2 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -153,6 +153,49 @@ dmamux1: dma-router@48002000 {
dma-channels = <16>;
};
+ adc_2: adc@48004000 {
+ compatible = "st,stm32mp13-adc-core";
+ reg = <0x48004000 0x400>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc ADC2>, <&rcc ADC2_K>;
+ clock-names = "bus", "adc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ adc2: adc@0 {
+ compatible = "st,stm32mp13-adc";
+ #io-channel-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ interrupt-parent = <&adc_2>;
+ interrupts = <0>;
+ dmas = <&dmamux1 10 0x400 0x80000001>;
+ dma-names = "rx";
+ status = "disabled";
+
+ channel@13 {
+ reg = <13>;
+ label = "vrefint";
+ };
+ channel@14 {
+ reg = <14>;
+ label = "vddcore";
+ };
+ channel@16 {
+ reg = <16>;
+ label = "vddcpu";
+ };
+ channel@17 {
+ reg = <17>;
+ label = "vddq_ddr";
+ };
+ };
+ };
+
rcc: rcc@50000000 {
compatible = "st,stm32mp13-rcc", "syscon";
reg = <0x50000000 0x1000>;
diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi
index 531c263c9f46..6bc702fe43af 100644
--- a/arch/arm/boot/dts/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/stm32mp133.dtsi
@@ -8,6 +8,37 @@
/ {
soc {
+ adc_1: adc@48003000 {
+ compatible = "st,stm32mp13-adc-core";
+ reg = <0x48003000 0x400>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc ADC1>, <&rcc ADC1_K>;
+ clock-names = "bus", "adc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ adc1: adc@0 {
+ compatible = "st,stm32mp13-adc";
+ #io-channel-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ interrupt-parent = <&adc_1>;
+ interrupts = <0>;
+ dmas = <&dmamux1 9 0x400 0x80000001>;
+ dma-names = "rx";
+ status = "disabled";
+
+ channel@18 {
+ reg = <18>;
+ label = "vrefint";
+ };
+ };
+ };
+
m_can1: can@4400e000 {
compatible = "bosch,m_can";
reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
--
2.25.1
Add st,stm32mp13-adc-core and st,stm32mp13-adc compatibles
to support STM32MPU13 SoC.
On STM32MP13x, each ADC peripheral has a single ADC block.
These ADC peripherals, ADC1 and ADC2, are fully independent.
Main characteristics of STM32MP13x ADC:
- One interrupt line per ADC
- 6 to 12 bits resolution
- 19 channels
ADC2 instance supports two extra internal channels VDDCPU and VDDQ_DDR.
Add "vddcpu" and "vddq_ddr" internal channels names to the reserved
labels list.
Signed-off-by: Olivier Moysan <[email protected]>
---
.../bindings/iio/adc/st,stm32-adc.yaml | 68 ++++++++++++++++++-
1 file changed, 65 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
index fa8da42cb1e6..05265f381fde 100644
--- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
@@ -27,6 +27,7 @@ properties:
- st,stm32f4-adc-core
- st,stm32h7-adc-core
- st,stm32mp1-adc-core
+ - st,stm32mp13-adc-core
reg:
maxItems: 1
@@ -37,6 +38,7 @@ properties:
- stm32f4 and stm32h7 share a common ADC interrupt line.
- stm32mp1 has two separate interrupt lines, one for each ADC within
ADC block.
+ - stm32mp13 has an interrupt line per ADC block.
minItems: 1
maxItems: 2
@@ -180,6 +182,33 @@ allOf:
maximum: 36000000
default: 36000000
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp13-adc-core
+
+ then:
+ properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ items:
+ - const: bus
+ - const: adc
+ minItems: 1
+
+ interrupts:
+ items:
+ - description: ADC interrupt line
+
+ st,max-clk-rate-hz:
+ minimum: 150000
+ maximum: 75000000
+ default: 75000000
+
additionalProperties: false
required:
@@ -208,6 +237,7 @@ patternProperties:
- st,stm32f4-adc
- st,stm32h7-adc
- st,stm32mp1-adc
+ - st,stm32mp13-adc
reg:
description: |
@@ -229,7 +259,7 @@ patternProperties:
interrupts:
description: |
IRQ Line for the ADC instance. Valid values are:
- - 0 for adc@0
+ - 0 for adc@0 (single adc for stm32mp13)
- 1 for adc@100
- 2 for adc@200 (stm32f4 only)
maxItems: 1
@@ -250,13 +280,14 @@ patternProperties:
assigned-resolution-bits:
description: |
Resolution (bits) to use for conversions:
- - can be 6, 8, 10 or 12 on stm32f4
+ - can be 6, 8, 10 or 12 on stm32f4 and stm32mp13
- can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
st,adc-channels:
description: |
List of single-ended channels muxed for this ADC. It can have up to:
- 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
+ - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.
- 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
stm32mp1.
$ref: /schemas/types.yaml#/definitions/uint32-array
@@ -322,7 +353,7 @@ patternProperties:
label:
description: |
Unique name to identify which channel this is.
- Reserved label names "vddcore", "vrefint" and "vbat"
+ Reserved label names "vddcore", "vddcpu", "vddq_ddr", "vrefint" and "vbat"
are used to identify internal channels with matching names.
diff-channels:
@@ -419,6 +450,37 @@ patternProperties:
items:
minimum: 40
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: st,stm32mp13-adc
+
+ then:
+ properties:
+ reg:
+ const: 0x0
+
+ interrupts:
+ const: 0
+
+ assigned-resolution-bits:
+ enum: [6, 8, 10, 12]
+ default: 12
+
+ st,adc-channels:
+ minItems: 1
+ maxItems: 19
+ items:
+ minimum: 0
+ maximum: 18
+
+ st,min-sample-time-nsecs:
+ minItems: 1
+ maxItems: 19
+ items:
+ minimum: 40
additionalProperties: false
required:
--
2.25.1
Define pins muxing that can be used for ADC on stm32mp135f-dk board
(USB Type-C CC1 & CC2 pins).
Signed-off-by: Olivier Moysan <[email protected]>
---
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index d2472cd8f1d0..9cd58bf54ac8 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -6,6 +6,13 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
+ adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
+ <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
+ };
+ };
+
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
--
2.25.1
Fix channel init for ADC generic channel bindings.
In generic channel initialization, stm32_adc_smpr_init() is called
to initialize channel sampling time. The "st,min-sample-time-ns"
property is an optional property. If it is not defined,
stm32_adc_smpr_init() is currently skipped.
However stm32_adc_smpr_init() must always be called,
to force a minimum sampling time for the internal channels,
as the minimum sampling time is known.
Make stm32_adc_smpr_init() call unconditional.
Fixes: 796e5d0b1e9b ("iio: adc: stm32-adc: use generic binding for sample-time")
Signed-off-by: Olivier Moysan <[email protected]>
---
drivers/iio/adc/stm32-adc.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 6256977eb7f7..3cda529f081d 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -2086,18 +2086,19 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev,
stm32_adc_chan_init_one(indio_dev, &channels[scan_index], val,
vin[1], scan_index, differential);
+ val = 0;
ret = fwnode_property_read_u32(child, "st,min-sample-time-ns", &val);
/* st,min-sample-time-ns is optional */
- if (!ret) {
- stm32_adc_smpr_init(adc, channels[scan_index].channel, val);
- if (differential)
- stm32_adc_smpr_init(adc, vin[1], val);
- } else if (ret != -EINVAL) {
+ if (ret && ret != -EINVAL) {
dev_err(&indio_dev->dev, "Invalid st,min-sample-time-ns property %d\n",
ret);
goto err;
}
+ stm32_adc_smpr_init(adc, channels[scan_index].channel, val);
+ if (differential)
+ stm32_adc_smpr_init(adc, vin[1], val);
+
scan_index++;
}
--
2.25.1
On Wed, Oct 5, 2022 at 4:36 PM Olivier Moysan
<[email protected]> wrote:
>
> Fix channel init for ADC generic channel bindings.
> In generic channel initialization, stm32_adc_smpr_init() is called
> to initialize channel sampling time. The "st,min-sample-time-ns"
> property is an optional property. If it is not defined,
> stm32_adc_smpr_init() is currently skipped.
> However stm32_adc_smpr_init() must always be called,
> to force a minimum sampling time for the internal channels,
> as the minimum sampling time is known.
> Make stm32_adc_smpr_init() call unconditional.
The lines are quite different by their lengths. Are you sure you sent
the updated version (see also below)?
> Fixes: 796e5d0b1e9b ("iio: adc: stm32-adc: use generic binding for sample-time")
>
> Signed-off-by: Olivier Moysan <[email protected]>
I have told you already that the tag block doesn't tolerate blank lines.
--
With Best Regards,
Andy Shevchenko