From: Kory Maincent <[email protected]>
This patches series adds two features of the SPEAr600 SOC:
- Enable the display controller
- Enable the SPI buses using the SSP controller
Changes in v2:
- Keep the I2C_CONFIG in the spear6xx_defconfig while enabling DRM.
- Send cover letter which was not sent in v1 due to a mistake in my git
mail config.
Viresh, will you take the patches and submit a pull request to the ARM SoC
maintainers?
Kory Maincent (6):
arm: configs: spear6xx: Refresh defconfig
arm: dts: spear600: Fix clcd interrupt
arm: configs: spear6xx: Enable PL110 display controller
clk: spear: Fix CLCD clock definition on SPEAr600
arm: dts: spear600: Add ssp controller nodes
clk: spear: Fix SSP clock definition on SPEAr600
arch/arm/boot/dts/spear600.dtsi | 32 ++++++++++++++++++++++++++++-
arch/arm/configs/spear6xx_defconfig | 7 ++-----
drivers/clk/spear/spear6xx_clock.c | 8 ++++----
3 files changed, 37 insertions(+), 10 deletions(-)
--
2.25.1
From: Kory Maincent <[email protected]>
Interrupt 12 of the Interrupt controller belongs to the SMI controller,
the right one for the display controller is the interrupt 13.
Fixes: 8113ba917dfa ("ARM: SPEAr: DT: Update device nodes")
Signed-off-by: Kory Maincent <[email protected]>
Acked-by: Viresh Kumar <[email protected]>
---
arch/arm/boot/dts/spear600.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index fd41243a0b2c..9d5a04a46b14 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -47,7 +47,7 @@ clcd: clcd@fc200000 {
compatible = "arm,pl110", "arm,primecell";
reg = <0xfc200000 0x1000>;
interrupt-parent = <&vic1>;
- interrupts = <12>;
+ interrupts = <13>;
status = "disabled";
};
--
2.25.1
From: Kory Maincent <[email protected]>
There is no SPEAr600 device named "clcd". Instead, the description of the
CLCD (color liquid crystal display controller) name is "fc200000.clcd", so
we should associate the CLCD gateable clock to this device name.
Signed-off-by: Kory Maincent <[email protected]>
Acked-by: Viresh Kumar <[email protected]>
---
drivers/clk/spear/spear6xx_clock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index c192a9141b86..ee0ed89f2954 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -207,7 +207,7 @@ void __init spear6xx_clk_init(void __iomem *misc_base)
clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0,
PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock);
- clk_register_clkdev(clk, NULL, "clcd");
+ clk_register_clkdev(clk, NULL, "fc200000.clcd");
/* gpt clocks */
clk = clk_register_gpt("gpt0_1_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG,
--
2.25.1
From: Kory Maincent <[email protected]>
Enable the PL110 DRM driver, used by the spear600.
Signed-off-by: Kory Maincent <[email protected]>
---
Notes:
Changes since v1:
- Do not drop CONFIG_I2C
arch/arm/configs/spear6xx_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
index 1cf0621d2154..3e2c2abae5ba 100644
--- a/arch/arm/configs/spear6xx_defconfig
+++ b/arch/arm/configs/spear6xx_defconfig
@@ -40,6 +40,8 @@ CONFIG_GPIO_PL061=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_ARM_SP805_WATCHDOG=y
+CONFIG_DRM=y
+CONFIG_DRM_PL111=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
--
2.25.1
On 02-11-22, 18:10, K?ry Maincent wrote:
> From: Kory Maincent <[email protected]>
>
> Enable the PL110 DRM driver, used by the spear600.
>
> Signed-off-by: Kory Maincent <[email protected]>
> ---
>
> Notes:
> Changes since v1:
> - Do not drop CONFIG_I2C
>
> arch/arm/configs/spear6xx_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig
> index 1cf0621d2154..3e2c2abae5ba 100644
> --- a/arch/arm/configs/spear6xx_defconfig
> +++ b/arch/arm/configs/spear6xx_defconfig
> @@ -40,6 +40,8 @@ CONFIG_GPIO_PL061=y
> # CONFIG_HWMON is not set
> CONFIG_WATCHDOG=y
> CONFIG_ARM_SP805_WATCHDOG=y
> +CONFIG_DRM=y
> +CONFIG_DRM_PL111=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_OHCI_HCD=y
Acked-by: Viresh Kumar <[email protected]>
--
viresh
On Wed, Nov 2, 2022 at 6:10 PM Köry Maincent <[email protected]> wrote:
> From: Kory Maincent <[email protected]>
>
> Enable the PL110 DRM driver, used by the spear600.
>
> Signed-off-by: Kory Maincent <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Thanks for using the DRM driver!
Yours,
Linus Walleij
On Wed, Nov 2, 2022, at 18:10, Köry Maincent wrote:
> From: Kory Maincent <[email protected]>
>
> This patches series adds two features of the SPEAr600 SOC:
>
> - Enable the display controller
>
> - Enable the SPI buses using the SSP controller
>
> Changes in v2:
> - Keep the I2C_CONFIG in the spear6xx_defconfig while enabling DRM.
> - Send cover letter which was not sent in v1 due to a mistake in my git
> mail config.
>
> Viresh, will you take the patches and submit a pull request to the ARM SoC
> maintainers?
>
> Kory Maincent (6):
> arm: configs: spear6xx: Refresh defconfig
> arm: dts: spear600: Fix clcd interrupt
> arm: configs: spear6xx: Enable PL110 display controller
> clk: spear: Fix CLCD clock definition on SPEAr600
> arm: dts: spear600: Add ssp controller nodes
> clk: spear: Fix SSP clock definition on SPEAr600
I've picked up patches 1 and 3 into the arm/defconfig branch,
and patches 2 and 5 into the soc/dt branch now.
I can also take patches 4 and 6, but I think it's better to have
them merged through the clk tree.
Maybe resend them to just the clk maintainers.
Arnd