Read dma-channel-mask from device tree and register only the
specified channels. This is useful to reserve some channels for the
firmware.
Also update the channel number and interrupts to include all 32
channels. The current DT bindings has only 31 interrupts which is wrong
and doesn't align with the hardware. This was done to reserve channel0
for the firmware. Now with this change, the driver can align more to the
actual hardware. but this implies that there will be a breakage in the
ABI and device tree must be updated along with the driver change
for it to pickup the right interrupt corresponding to the channel.
This breakage is okay right now because GPC DMA was introduced on
Tegra186 and the DT bindings were added in 5.19. Any products released
with this IP were released with kernels prior to 5.19 and bindings that
were never in-tree. Any of those products that are supported upstream we
know have replaceable DTB images (i.e. by default they are flashed at the
same time as the kernel image).
v3->v4:
* Reverted back to v2 based on the discussion in the thread
https://lore.kernel.org/all/Y2EFoG1H9YpfxRjs@orome/
* Added description of the ABI breakage
v2->v3:
* Updates in driver and DT to provide only the interrupts
corresponding to the channels used in kernel. This would fix
the ABI breakage that could occur with the previous version
v1->v2:
* Reversed the operands and used BIT macro in 'if' condition.
* Fixed warning reported-by: kernel test robot <[email protected]>
Akhil R (3):
dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA
arm64: tegra: Add dma-channel-mask in GPCDMA node
dmaengine: tegra: Add support for dma-channel-mask
.../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 7 +++-
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +-
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 4 +-
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 4 +-
drivers/dma/tegra186-gpc-dma.c | 37 +++++++++++++++----
5 files changed, 45 insertions(+), 11 deletions(-)
--
2.17.1
On 10-11-22, 22:47, Akhil R wrote:
> Read dma-channel-mask from device tree and register only the
> specified channels. This is useful to reserve some channels for the
> firmware.
>
> Also update the channel number and interrupts to include all 32
> channels. The current DT bindings has only 31 interrupts which is wrong
> and doesn't align with the hardware. This was done to reserve channel0
> for the firmware. Now with this change, the driver can align more to the
> actual hardware. but this implies that there will be a breakage in the
> ABI and device tree must be updated along with the driver change
> for it to pickup the right interrupt corresponding to the channel.
>
> This breakage is okay right now because GPC DMA was introduced on
> Tegra186 and the DT bindings were added in 5.19. Any products released
> with this IP were released with kernels prior to 5.19 and bindings that
> were never in-tree. Any of those products that are supported upstream we
> know have replaceable DTB images (i.e. by default they are flashed at the
> same time as the kernel image).
Applied 1 & 3, thanks
--
~Vinod