RISC-V semihosting spec [1] is built on top of the existing Arm one;
we can add RISC-V earlycon semihost driver easily.
This series refactors the existing driver a little bit, to move smh_putc()
variants in respective arch's semihost.h, then we can implement RISC-V's
version in the riscv arch directory.
Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
Changes in v3:
- add #ifdef in the header to prevent from multiple inclusion
- add forward-declare struct uart_port
- add a Link tag in the commit message
Changes in v2:
- new patch: "serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h"
- Move the RISC-V implementation to semihost.h
Bin Meng (3):
serial: earlycon-arm-semihost: Move smh_putc() variants in respective
arch's semihost.h
riscv: Implement semihost.h for earlycon semihost driver
serial: Rename earlycon semihost driver
arch/arm/include/asm/semihost.h | 30 +++++++++++++++++++
arch/arm64/include/asm/semihost.h | 24 +++++++++++++++
arch/riscv/include/asm/semihost.h | 26 ++++++++++++++++
drivers/tty/serial/Kconfig | 14 ++++-----
drivers/tty/serial/Makefile | 2 +-
...con-arm-semihost.c => earlycon-semihost.c} | 25 +---------------
6 files changed, 89 insertions(+), 32 deletions(-)
create mode 100644 arch/arm/include/asm/semihost.h
create mode 100644 arch/arm64/include/asm/semihost.h
create mode 100644 arch/riscv/include/asm/semihost.h
rename drivers/tty/serial/{earlycon-arm-semihost.c => earlycon-semihost.c} (57%)
--
2.34.1
Now that earlycon semihost driver works on RISC-V too, let's use a
much more generic name for the driver.
Signed-off-by: Bin Meng <[email protected]>
---
(no changes since v1)
drivers/tty/serial/Kconfig | 12 ++++++------
drivers/tty/serial/Makefile | 2 +-
.../{earlycon-arm-semihost.c => earlycon-semihost.c} | 0
3 files changed, 7 insertions(+), 7 deletions(-)
rename drivers/tty/serial/{earlycon-arm-semihost.c => earlycon-semihost.c} (100%)
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index e94d1265151c..a3779472edf6 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -73,17 +73,17 @@ config SERIAL_AMBA_PL011_CONSOLE
your boot loader (lilo or loadlin) about how to pass options to the
kernel at boot time.)
-config SERIAL_EARLYCON_ARM_SEMIHOST
- bool "Early console using ARM semihosting"
+config SERIAL_EARLYCON_SEMIHOST
+ bool "Early console using Arm compatible semihosting"
depends on ARM64 || ARM || RISCV
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
help
- Support for early debug console using ARM semihosting. This enables
- the console before standard serial driver is probed. This is enabled
- with "earlycon=smh" on the kernel command line. The console is
- enabled when early_param is processed.
+ Support for early debug console using Arm compatible semihosting.
+ This enables the console before standard serial driver is probed.
+ This is enabled with "earlycon=smh" on the kernel command line.
+ The console is enabled when early_param is processed.
config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index 238a9557b487..cd9afd9e3018 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -6,7 +6,7 @@
obj-$(CONFIG_SERIAL_CORE) += serial_core.o
obj-$(CONFIG_SERIAL_EARLYCON) += earlycon.o
-obj-$(CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST) += earlycon-arm-semihost.o
+obj-$(CONFIG_SERIAL_EARLYCON_SEMIHOST) += earlycon-semihost.o
obj-$(CONFIG_SERIAL_EARLYCON_RISCV_SBI) += earlycon-riscv-sbi.o
# These Sparc drivers have to appear before others such as 8250
diff --git a/drivers/tty/serial/earlycon-arm-semihost.c b/drivers/tty/serial/earlycon-semihost.c
similarity index 100%
rename from drivers/tty/serial/earlycon-arm-semihost.c
rename to drivers/tty/serial/earlycon-semihost.c
--
2.34.1
On 2022/12/9 23:04:34, "Bin Meng" <[email protected]> wrote:
>RISC-V semihosting spec [1] is built on top of the existing Arm one;
>we can add RISC-V earlycon semihost driver easily.
>
>This series refactors the existing driver a little bit, to move smh_putc()
>variants in respective arch's semihost.h, then we can implement RISC-V's
>version in the riscv arch directory.
>
>Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
>
>Changes in v3:
>- add #ifdef in the header to prevent from multiple inclusion
>- add forward-declare struct uart_port
>- add a Link tag in the commit message
>
Ping?
Regards,
Bin
On Wed, Dec 21, 2022 at 03:51:59PM +0000, Bin Meng wrote:
> On 2022/12/9 23:04:34, "Bin Meng" <[email protected]> wrote:
>
> > RISC-V semihosting spec [1] is built on top of the existing Arm one;
> > we can add RISC-V earlycon semihost driver easily.
> >
> > This series refactors the existing driver a little bit, to move smh_putc()
> > variants in respective arch's semihost.h, then we can implement RISC-V's
> > version in the riscv arch directory.
> >
> > Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
> >
> > Changes in v3:
> > - add #ifdef in the header to prevent from multiple inclusion
> > - add forward-declare struct uart_port
> > - add a Link tag in the commit message
> >
> Ping?
It is the middle of the merge window, we can not do anything until after
6.2-rc1 is out, please be patient.
While you wait, please take the time to review other patches on the
mailing list to help with the workload of the maintainers.
thanks,
greg k-h
Hi Bin,
> RISC-V semihosting spec [1] is built on top of the existing Arm one;
> we can add RISC-V earlycon semihost driver easily.
>
> This series refactors the existing driver a little bit, to move smh_putc()
> variants in respective arch's semihost.h, then we can implement RISC-V's
> version in the riscv arch directory.
>
> Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
>
> Changes in v3:
> - add #ifdef in the header to prevent from multiple inclusion
> - add forward-declare struct uart_port
> - add a Link tag in the commit message
>
> Changes in v2:
> - new patch: "serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h"
> - Move the RISC-V implementation to semihost.h
>
> Bin Meng (3):
> serial: earlycon-arm-semihost: Move smh_putc() variants in respective
> arch's semihost.h
> riscv: Implement semihost.h for earlycon semihost driver
> serial: Rename earlycon semihost driver
>
> arch/arm/include/asm/semihost.h | 30 +++++++++++++++++++
> arch/arm64/include/asm/semihost.h | 24 +++++++++++++++
> arch/riscv/include/asm/semihost.h | 26 ++++++++++++++++
> drivers/tty/serial/Kconfig | 14 ++++-----
> drivers/tty/serial/Makefile | 2 +-
> ...con-arm-semihost.c => earlycon-semihost.c} | 25 +---------------
> 6 files changed, 89 insertions(+), 32 deletions(-)
> create mode 100644 arch/arm/include/asm/semihost.h
> create mode 100644 arch/arm64/include/asm/semihost.h
> create mode 100644 arch/riscv/include/asm/semihost.h
> rename drivers/tty/serial/{earlycon-arm-semihost.c => earlycon-semihost.c} (57%)
Tested-by: Sergey Matyukevich <[email protected]>
Applied the patches on top of Linux 6.1 and tested earlycon logs from
RISC-V target in OpenOCD.
Regards,
Sergey
Hi Sergey,
On 2022/12/23 4:06:23, "Sergey Matyukevich" <[email protected]> wrote:
>Hi Bin,
>
>> RISC-V semihosting spec [1] is built on top of the existing Arm one;
>> we can add RISC-V earlycon semihost driver easily.
>>
>> This series refactors the existing driver a little bit, to move smh_putc()
>> variants in respective arch's semihost.h, then we can implement RISC-V's
>> version in the riscv arch directory.
>>
>> Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
>>
>> Changes in v3:
>> - add #ifdef in the header to prevent from multiple inclusion
>> - add forward-declare struct uart_port
>> - add a Link tag in the commit message
>>
>> Changes in v2:
>> - new patch: "serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h"
>> - Move the RISC-V implementation to semihost.h
>>
>> Bin Meng (3):
>> serial: earlycon-arm-semihost: Move smh_putc() variants in respective
>> arch's semihost.h
>> riscv: Implement semihost.h for earlycon semihost driver
>> serial: Rename earlycon semihost driver
>>
>> arch/arm/include/asm/semihost.h | 30 +++++++++++++++++++
>> arch/arm64/include/asm/semihost.h | 24 +++++++++++++++
>> arch/riscv/include/asm/semihost.h | 26 ++++++++++++++++
>> drivers/tty/serial/Kconfig | 14 ++++-----
>> drivers/tty/serial/Makefile | 2 +-
>> ...con-arm-semihost.c => earlycon-semihost.c} | 25 +---------------
>> 6 files changed, 89 insertions(+), 32 deletions(-)
>> create mode 100644 arch/arm/include/asm/semihost.h
>> create mode 100644 arch/arm64/include/asm/semihost.h
>> create mode 100644 arch/riscv/include/asm/semihost.h
>> rename drivers/tty/serial/{earlycon-arm-semihost.c => earlycon-semihost.c} (57%)
>
>Tested-by: Sergey Matyukevich <[email protected]>
>
>Applied the patches on top of Linux 6.1 and tested earlycon logs from
>RISC-V target in OpenOCD.
>
Thanks for your testing!
Regards,
Bin
On Fri, 09 Dec 2022 07:04:34 PST (-0800), [email protected] wrote:
>
> RISC-V semihosting spec [1] is built on top of the existing Arm one;
> we can add RISC-V earlycon semihost driver easily.
>
> This series refactors the existing driver a little bit, to move smh_putc()
> variants in respective arch's semihost.h, then we can implement RISC-V's
> version in the riscv arch directory.
>
> Link: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc [1]
>
> Changes in v3:
> - add #ifdef in the header to prevent from multiple inclusion
> - add forward-declare struct uart_port
> - add a Link tag in the commit message
>
> Changes in v2:
> - new patch: "serial: earlycon-arm-semihost: Move smh_putc() variants in respective arch's semihost.h"
> - Move the RISC-V implementation to semihost.h
>
> Bin Meng (3):
> serial: earlycon-arm-semihost: Move smh_putc() variants in respective
> arch's semihost.h
> riscv: Implement semihost.h for earlycon semihost driver
> serial: Rename earlycon semihost driver
>
> arch/arm/include/asm/semihost.h | 30 +++++++++++++++++++
> arch/arm64/include/asm/semihost.h | 24 +++++++++++++++
> arch/riscv/include/asm/semihost.h | 26 ++++++++++++++++
> drivers/tty/serial/Kconfig | 14 ++++-----
> drivers/tty/serial/Makefile | 2 +-
> ...con-arm-semihost.c => earlycon-semihost.c} | 25 +---------------
> 6 files changed, 89 insertions(+), 32 deletions(-)
> create mode 100644 arch/arm/include/asm/semihost.h
> create mode 100644 arch/arm64/include/asm/semihost.h
> create mode 100644 arch/riscv/include/asm/semihost.h
> rename drivers/tty/serial/{earlycon-arm-semihost.c => earlycon-semihost.c} (57%)
Acked-by: Palmer Dabbelt <[email protected]>