From: Guo Ren <[email protected]>
The patches convert riscv to use the generic entry infrastructure from
kernel/entry/*. Some optimization for entry.S with new .macro and merge
ret_from_kernel_thread into ret_from_fork.
The 1,2 are the preparation of generic entry. 3~7 are the main part
of generic entry.
All tested with rv64, rv32, rv64 + 32rootfs, all are passed.
You can directly try it with:
[1] https://github.com/guoren83/linux/tree/generic_entry_v11
Any reviews and tests are helpful.
v11:
- Rebase on newest for-next-20221211
- Remove stack optimization patch series
- Optimize comments
- Replace ENTRY with SYM_CODE/FUNC_START in entry.S
v10:
https://lore.kernel.org/linux-riscv/[email protected]/
- Rebase on palmer/for-next branch (20221208)
- Remove unrelated patches from the series (Suggested-by: Bjorn)
- Fixup Typos.
v9:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup NR_syscalls check (by Ben Hutchings)
- Add Tested-by: Jisheng Zhang
v8:
https://lore.kernel.org/linux-riscv/[email protected]/
- Rebase on palmer/for-next branch (20221102)
- Add save/restore_from_x5_to_x31 .macro (JishengZhang)
- Consolidate ret_from_kernel_thread into ret_from_fork (JishengZhang)
- Optimize __noinstr_section comment (JiangshanLai)
v7:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup regs_irqs_disabled with SR_PIE
- Optimize stackleak_erase -> stackleak_erase_on_task_stack (Thx Mark
Rutland)
- Add BUG_ON(!irqs_disabled()) in trap handlers
- Using regs_irqs_disabled in __do_page_fault
- Remove unnecessary irq disable in ret_from_exception and add comment
v6:
https://lore.kernel.org/linux-riscv/[email protected]/
- Use THEAD_SIZE_ORDER for thread size adjustment in kconfig (Thx Arnd)
- Move call_on_stack to inline style (Thx Peter Zijlstra)
- Fixup fp chain broken (Thx Chen Zhongjin)
- Remove common entry modification, and fixup page_fault entry (Thx
Peter Zijlstra)
- Treat some traps as nmi entry (Thx Peter Zijlstra)
v5:
https://lore.kernel.org/linux-riscv/[email protected]/
- Add riscv own stackleak patch instead of generic entry modification
(by Mark Rutland)
- Add EXPERT dependency for THREAD_SIZE (by Arnd)
- Add EXPERT dependency for IRQ_STACK (by Sebastian, David Laight)
- Corrected __trap_section (by Peter Zijlstra)
- Add Tested-by (Yipeng Zou)
- Use CONFIG_SOFTIRQ_ON_OWN_STACK replace "#ifndef CONFIG_PREEMPT_RT"
- Fixup systrace_enter compile error
- Fixup exit_to_user_mode_prepare preempt_disable warning
V4:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup entry.S with "la" bug (by Conor.Dooley)
- Fixup missing noinstr bug (by Peter Zijlstra)
V3:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition
V2:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup compile error by include "riscv: ptrace: Remove duplicate
operation"
- Fixup compile warning
Reported-by: kernel test robot <[email protected]>
- Add test repo link in cover letter
V1:
https://lore.kernel.org/linux-riscv/[email protected]/
Guo Ren (3):
riscv: ptrace: Remove duplicate operation
riscv: entry: Add noinstr to prevent instrumentation inserted
riscv: entry: Convert to generic entry
Jisheng Zhang (3):
riscv: entry: Remove extra level wrappers of trace_hardirqs_{on,off}
riscv: entry: Consolidate ret_from_kernel_thread into ret_from_fork
riscv: entry: Consolidate general regs saving/restoring
Lai Jiangshan (1):
compiler_types.h: Add __noinstr_section() for noinstr
arch/riscv/Kconfig | 1 +
arch/riscv/include/asm/asm.h | 63 +++++
arch/riscv/include/asm/csr.h | 1 -
arch/riscv/include/asm/entry-common.h | 8 +
arch/riscv/include/asm/ptrace.h | 10 +-
arch/riscv/include/asm/stacktrace.h | 5 +
arch/riscv/include/asm/syscall.h | 6 +
arch/riscv/include/asm/thread_info.h | 13 +-
arch/riscv/kernel/Makefile | 2 -
arch/riscv/kernel/entry.S | 334 +++-----------------------
arch/riscv/kernel/irq.c | 15 ++
arch/riscv/kernel/mcount-dyn.S | 56 +----
arch/riscv/kernel/process.c | 5 +-
arch/riscv/kernel/ptrace.c | 44 ----
arch/riscv/kernel/signal.c | 29 +--
arch/riscv/kernel/sys_riscv.c | 31 +++
arch/riscv/kernel/trace_irq.c | 27 ---
arch/riscv/kernel/trace_irq.h | 11 -
arch/riscv/kernel/traps.c | 86 +++++--
arch/riscv/mm/fault.c | 16 +-
include/linux/compiler_types.h | 15 +-
21 files changed, 279 insertions(+), 499 deletions(-)
create mode 100644 arch/riscv/include/asm/entry-common.h
delete mode 100644 arch/riscv/kernel/trace_irq.c
delete mode 100644 arch/riscv/kernel/trace_irq.h
--
2.36.1
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think
all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not
yet ready to run this early in the entry path, for instance it could
rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
Link: https://lore.kernel.org/linux-riscv/[email protected]/
Suggested-by: Peter Zijlstra <[email protected]>
Tested-by: Jisheng Zhang <[email protected]>
Signed-off-by: Guo Ren <[email protected]>
Signed-off-by: Guo Ren <[email protected]>
---
arch/riscv/kernel/traps.c | 4 ++--
arch/riscv/mm/fault.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
index f3e96d60a2ff..f7fa973558bc 100644
--- a/arch/riscv/kernel/traps.c
+++ b/arch/riscv/kernel/traps.c
@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code,
}
#if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_RISCV_ALTERNATIVE)
-#define __trap_section __section(".xip.traps")
+#define __trap_section __noinstr_section(".xip.traps")
#else
-#define __trap_section
+#define __trap_section noinstr
#endif
#define DO_ERROR_INFO(name, signo, code, str) \
asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index d86f7cebd4a7..b26f68eac61c 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)
* This routine handles page faults. It determines the address and the
* problem, and then passes it off to one of the appropriate routines.
*/
-asmlinkage void do_page_fault(struct pt_regs *regs)
+asmlinkage void noinstr do_page_fault(struct pt_regs *regs)
{
struct task_struct *tsk;
struct vm_area_struct *vma;
--
2.36.1
[email protected] writes:
> From: Guo Ren <[email protected]>
>
> The patches convert riscv to use the generic entry infrastructure from
> kernel/entry/*. Some optimization for entry.S with new .macro and merge
> ret_from_kernel_thread into ret_from_fork.
>
> The 1,2 are the preparation of generic entry. 3~7 are the main part
> of generic entry.
>
> All tested with rv64, rv32, rv64 + 32rootfs, all are passed.
>
> You can directly try it with:
> [1] https://github.com/guoren83/linux/tree/generic_entry_v11
FWIW, the v11 branch is not available here.
This series is a really nice cleanup for the RISC-V entry code. I've run
it on some kernel selftests, and haven't seen any issues.
I'm looking forward to having this series pulled in!
Reviewed-by: Björn Töpel <[email protected]>
On Mon, Dec 12, 2022 at 3:18 PM Björn Töpel <[email protected]> wrote:
>
> [email protected] writes:
>
> > From: Guo Ren <[email protected]>
> >
> > The patches convert riscv to use the generic entry infrastructure from
> > kernel/entry/*. Some optimization for entry.S with new .macro and merge
> > ret_from_kernel_thread into ret_from_fork.
> >
> > The 1,2 are the preparation of generic entry. 3~7 are the main part
> > of generic entry.
> >
> > All tested with rv64, rv32, rv64 + 32rootfs, all are passed.
> >
> > You can directly try it with:
> > [1] https://github.com/guoren83/linux/tree/generic_entry_v11
Sorry, I forgot to push. Now it's ready.
>
> FWIW, the v11 branch is not available here.
>
> This series is a really nice cleanup for the RISC-V entry code. I've run
> it on some kernel selftests, and haven't seen any issues.
>
> I'm looking forward to having this series pulled in!
>
> Reviewed-by: Björn Töpel <[email protected]>
Thx.
--
Best Regards
Guo Ren