FSD platform has two instances of EQoS IP, one is in FSYS0 block and
another one is in PERIC block. This patch series add required DT binding,
DT file modifications and platform driver specific changes for the same.
This series needs following two patches [1,2] posted as part of SYSREG
controller support for FSD platform.
[1]: https://git.kernel.org/krzk/linux/c/7e03ca7429b23105b740eb79364dc410f214848b
[2]: https://git.kernel.org/krzk/linux/c/beaf55952d46fb14387d92de280bed7985ea85e5
Changes since v1:
1. Addressed all the review comments suggested by Krzysztof with respect to
DT files.
2. Updated dwc_eqos_setup_rxclock() function as per the review comments
given by Andrew.
Sriranjani P (4):
dt-bindings: net: Add FSD EQoS device tree bindings
net: stmmac: dwc-qos: Add FSD EQoS support
arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC
arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../net/tesla,dwc-qos-ethernet-4.21.yaml | 103 ++++++++
arch/arm64/boot/dts/tesla/fsd-evb.dts | 18 ++
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 112 +++++++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 51 ++++
.../stmicro/stmmac/dwmac-dwc-qos-eth.c | 227 ++++++++++++++++++
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 20 ++
include/linux/stmmac.h | 1 +
8 files changed, 533 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
--
2.17.1
The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one
in FSYS0 block and other in PERIC block.
Adds device tree node for Ethernet in FSYS0 Block and enables the same for
FSD platform.
Signed-off-by: Pankaj Dubey <[email protected]>
Signed-off-by: Jayati Sahu <[email protected]>
Signed-off-by: Sriranjani P <[email protected]>
---
arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 22 +++++++++
3 files changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
index 1db6ddf03f01..ca0c1a28d562 100644
--- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
+++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
@@ -30,6 +30,15 @@
};
};
+ðernet_0 {
+ status = "okay";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
&fin_pll {
clock-frequency = <24000000>;
};
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index d0abb9aa0e9e..7ccc0738a149 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -64,6 +64,62 @@
samsung,pin-pud = <FSD_PIN_PULL_NONE>;
samsung,pin-drv = <FSD_PIN_DRV_LV2>;
};
+
+ eth0_tx_clk: eth0-tx-clk-pins {
+ samsung,pins = "gpf0-0";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_tx_data: eth0-tx-data-pins {
+ samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_tx_ctrl: eth0-tx-ctrl-pins {
+ samsung,pins = "gpf0-5";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_phy_intr: eth0-phy-intr-pins {
+ samsung,pins = "gpf0-6";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_NONE>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
+
+ eth0_rx_clk: eth0-rx-clk-pins {
+ samsung,pins = "gpf1-0";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_rx_data: eth0-rx-data-pins {
+ samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_rx_ctrl: eth0-rx-ctrl-pins {
+ samsung,pins = "gpf1-5";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth0_mdio: eth0-mdio-pins {
+ samsung,pins = "gpf1-6", "gpf1-7";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_NONE>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
};
&pinctrl_peric {
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index f35bc5a288c2..ade707cc646b 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -32,6 +32,7 @@
spi0 = &spi_0;
spi1 = &spi_1;
spi2 = &spi_2;
+ eth0 = ðernet_0;
};
cpus {
@@ -860,6 +861,27 @@
clocks = <&clock_fsys0 UFS0_MPHY_REFCLK_IXTAL26>;
clock-names = "ref_clk";
};
+
+ ethernet_0: ethernet@15300000 {
+ compatible = "tesla,dwc-qos-ethernet-4.21";
+ reg = <0x0 0x15300000 0x0 0x10000>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_PTP_REF_I>,
+ <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_ACLK_I>,
+ <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_HCLK_I>,
+ <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_RGMII_CLK_I>,
+ <&clock_fsys0 FSYS0_EQOS_TOP0_IPCLKPORT_CLK_RX_I>;
+ clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð0_tx_clk>, <ð0_tx_data>, <ð0_tx_ctrl>,
+ <ð0_phy_intr>, <ð0_rx_clk>, <ð0_rx_data>,
+ <ð0_rx_ctrl>, <ð0_mdio>;
+ local-mac-address = [00 00 00 00 00 00];
+ rx-clock-skew = <&sysreg_fsys0 0x0>;
+ iommus = <&smmu_fsys0 0x0 0x1>;
+ phy-mode = "rgmii";
+ status = "disabled";
+ };
};
};
--
2.17.1
Add FSD Ethernet compatible in Synopsys dt-bindings document. Add FSD
Ethernet YAML schema to enable the DT validation.
Signed-off-by: Pankaj Dubey <[email protected]>
Signed-off-by: Ravi Patel <[email protected]>
Signed-off-by: Sriranjani P <[email protected]>
---
.../devicetree/bindings/net/snps,dwmac.yaml | 1 +
.../net/tesla,dwc-qos-ethernet-4.21.yaml | 103 ++++++++++++++++++
2 files changed, 104 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 2f909ffe2fe8..e8d53061fd35 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -89,6 +89,7 @@ properties:
- snps,dwmac-5.10a
- snps,dwxgmac
- snps,dwxgmac-2.10
+ - tesla,dwc-qos-ethernet-4.21
reg:
minItems: 1
diff --git a/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml b/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
new file mode 100644
index 000000000000..d0dfc4a38d17
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
@@ -0,0 +1,103 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/tesla,dwc-qos-ethernet-4.21.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FSD Ethernet Quality of Service Device Tree Bindings
+
+allOf:
+ - $ref: "snps,dwmac.yaml#"
+
+maintainers:
+ - Sriranjani P <[email protected]>
+
+properties:
+ compatible:
+ const: tesla,dwc-qos-ethernet-4.21.yaml
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 4
+
+ clock-names:
+ minItems: 4
+ items:
+ - const: ptp_ref
+ - const: master_bus
+ - const: slave_bus
+ - const: tx
+ - const: rx
+ - const: master2_bus
+ - const: slave2_bus
+ - const: eqos_rxclk_mux
+ - const: eqos_phyrxclk
+ - const: dout_peric_rgmii_clk
+
+ rx-clock-skew:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ iommus:
+ maxItems: 1
+
+ phy-mode:
+ $ref: ethernet-controller.yaml#/properties/phy-connection-type
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - rx-clock-skew
+ - iommus
+ - phy-mode
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/fsd-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ethernet_1: ethernet@14300000 {
+ compatible = "tesla,dwc-qos-ethernet-4.21";
+ reg = <0x0 0x14300000 0x0 0x10000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks =
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
+ <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK>,
+ <&clock_peric PERIC_DOUT_RGMII_CLK>;
+ clock-names =
+ "ptp_ref",
+ "master_bus",
+ "slave_bus",
+ "tx",
+ "rx",
+ "master2_bus",
+ "slave2_bus",
+ "eqos_rxclk_mux",
+ "eqos_phyrxclk",
+ "dout_peric_rgmii_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>,
+ <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>,
+ <ð1_rx_ctrl>, <ð1_mdio>;
+ rx-clock-skew = <&sysreg_peric 0x10 0x0>;
+ iommus = <&smmu_peric 0x0 0x1>;
+ phy-mode = "rgmii";
+ };
+
+...
--
2.17.1
The FSD SoC contains two instance of the Synopsys DWC ethernet QOS IP core.
The binding that it uses is slightly different from existing ones because
of the integration (clocks, resets).
For FSD SoC, a mux switch is needed between internal and external clocks.
By default after reset internal clock is used but for receiving packets
properly, external clock is needed. Mux switch to external clock happens
only when the external clock is present.
Signed-off-by: Chandrasekar R <[email protected]>
Signed-off-by: Suresh Siddha <[email protected]>
Signed-off-by: Sriranjani P <[email protected]>
---
.../stmicro/stmmac/dwmac-dwc-qos-eth.c | 174 ++++++++++++++++++
.../net/ethernet/stmicro/stmmac/stmmac_main.c | 24 +++
include/linux/stmmac.h | 1 +
3 files changed, 199 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
index 358fc26f8d1f..e41b6e849a9d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -20,6 +20,7 @@
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/stmmac.h>
+#include <linux/regmap.h>
#include "stmmac_platform.h"
#include "dwmac4.h"
@@ -37,6 +38,45 @@ struct tegra_eqos {
struct gpio_desc *reset;
};
+enum fsd_rxmux_clk {
+ FSD_RXCLK_MUX = 7,
+ FSD_RXCLK_EXTERNAL,
+ FSD_RXCLK_INTERNAL
+};
+
+struct fsd_eqos_plat_data {
+ const struct fsd_eqos_variant *fsd_eqos_instance_variant;
+ struct clk_bulk_data *clks;
+ struct device *dev;
+};
+
+struct fsd_eqos_variant {
+ const char * const *clk_list;
+ int num_clks;
+};
+
+static const char * const fsd_eqos_instance_0_clk[] = {
+ "ptp_ref", "master_bus", "slave_bus", "tx", "rx"
+};
+
+static const char * const fsd_eqos_instance_1_clk[] = {
+ "ptp_ref", "master_bus", "slave_bus", "tx", "rx", "master2_bus",
+ "slave2_bus", "eqos_rxclk_mux", "eqos_phyrxclk", "dout_peric_rgmii_clk"
+};
+
+static const int rx_clock_skew_val[] = {0x2, 0x0};
+
+static const struct fsd_eqos_variant fsd_eqos_clk_info[] = {
+ {
+ .clk_list = fsd_eqos_instance_0_clk,
+ .num_clks = ARRAY_SIZE(fsd_eqos_instance_0_clk)
+ },
+ {
+ .clk_list = fsd_eqos_instance_1_clk,
+ .num_clks = ARRAY_SIZE(fsd_eqos_instance_1_clk)
+ },
+};
+
static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
struct plat_stmmacenet_data *plat_dat)
{
@@ -267,6 +307,134 @@ static int tegra_eqos_init(struct platform_device *pdev, void *priv)
return 0;
}
+static int dwc_eqos_rxmux_setup(void *priv, bool external)
+{
+ struct fsd_eqos_plat_data *plat = priv;
+
+ /* doesn't support RX clock mux */
+ if (!plat->clks[FSD_RXCLK_MUX].clk)
+ return 0;
+
+ if (external)
+ return clk_set_parent(plat->clks[FSD_RXCLK_MUX].clk,
+ plat->clks[FSD_RXCLK_EXTERNAL].clk);
+ else
+ return clk_set_parent(plat->clks[FSD_RXCLK_MUX].clk,
+ plat->clks[FSD_RXCLK_INTERNAL].clk);
+}
+
+static int dwc_eqos_setup_rxclock(struct platform_device *pdev, int ins_num)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct regmap *syscon;
+ unsigned int reg;
+
+ if (np && of_property_read_bool(np, "rx-clock-skew")) {
+ syscon = syscon_regmap_lookup_by_phandle_args(np,
+ "rx-clock-skew", 1, ®);
+ if (IS_ERR(syscon)) {
+ dev_err(&pdev->dev,
+ "couldn't get the rx-clock-skew syscon!\n");
+ return PTR_ERR(syscon);
+ }
+
+ regmap_write(syscon, reg, rx_clock_skew_val[ins_num]);
+ }
+
+ return 0;
+}
+
+static int fsd_eqos_clk_init(struct fsd_eqos_plat_data *plat,
+ struct plat_stmmacenet_data *data)
+{
+ int ret = 0, i;
+
+ const struct fsd_eqos_variant *fsd_eqos_variant_data =
+ plat->fsd_eqos_instance_variant;
+
+ plat->clks = devm_kcalloc(plat->dev, fsd_eqos_variant_data->num_clks,
+ sizeof(*plat->clks), GFP_KERNEL);
+ if (!plat->clks)
+ return -ENOMEM;
+
+ for (i = 0; i < fsd_eqos_variant_data->num_clks; i++)
+ plat->clks[i].id = fsd_eqos_variant_data->clk_list[i];
+
+ ret = devm_clk_bulk_get(plat->dev, fsd_eqos_variant_data->num_clks,
+ plat->clks);
+
+ return ret;
+}
+
+static int fsd_clks_endisable(void *priv, bool enabled)
+{
+ int ret, num_clks;
+ struct fsd_eqos_plat_data *plat = priv;
+
+ num_clks = plat->fsd_eqos_instance_variant->num_clks;
+
+ if (enabled) {
+ ret = clk_bulk_prepare_enable(num_clks, plat->clks);
+ if (ret) {
+ dev_err(plat->dev, "Clock enable failed, err = %d\n", ret);
+ return ret;
+ }
+ } else {
+ clk_bulk_disable_unprepare(num_clks, plat->clks);
+ }
+
+ return 0;
+}
+
+static int fsd_eqos_probe(struct platform_device *pdev,
+ struct plat_stmmacenet_data *data,
+ struct stmmac_resources *res)
+{
+ struct fsd_eqos_plat_data *priv_plat;
+ struct device_node *np = pdev->dev.of_node;
+ int ret = 0;
+
+ priv_plat = devm_kzalloc(&pdev->dev, sizeof(*priv_plat), GFP_KERNEL);
+ if (!priv_plat) {
+ ret = -ENOMEM;
+ goto error;
+ }
+
+ priv_plat->dev = &pdev->dev;
+ data->bus_id = of_alias_get_id(np, "eth");
+
+ priv_plat->fsd_eqos_instance_variant = &fsd_eqos_clk_info[data->bus_id];
+
+ ret = fsd_eqos_clk_init(priv_plat, data);
+
+ data->bsp_priv = priv_plat;
+ data->clks_config = fsd_clks_endisable;
+ data->rxmux_setup = dwc_eqos_rxmux_setup;
+
+ ret = fsd_clks_endisable(priv_plat, true);
+ if (ret)
+ goto error;
+
+ ret = dwc_eqos_setup_rxclock(pdev, data->bus_id);
+ if (ret) {
+ fsd_clks_endisable(priv_plat, false);
+ dev_err_probe(&pdev->dev, ret, "Unable to setup rxclock\n");
+ }
+
+error:
+ return ret;
+}
+
+static int fsd_eqos_remove(struct platform_device *pdev)
+{
+ int ret = 0;
+ struct fsd_eqos_plat_data *priv_plat = get_stmmac_bsp_priv(&pdev->dev);
+
+ ret = fsd_clks_endisable(priv_plat, false);
+
+ return ret;
+}
+
static int tegra_eqos_probe(struct platform_device *pdev,
struct plat_stmmacenet_data *data,
struct stmmac_resources *res)
@@ -415,6 +583,11 @@ static const struct dwc_eth_dwmac_data tegra_eqos_data = {
.remove = tegra_eqos_remove,
};
+static const struct dwc_eth_dwmac_data fsd_eqos_data = {
+ .probe = fsd_eqos_probe,
+ .remove = fsd_eqos_remove,
+};
+
static int dwc_eth_dwmac_probe(struct platform_device *pdev)
{
const struct dwc_eth_dwmac_data *data;
@@ -495,6 +668,7 @@ static int dwc_eth_dwmac_remove(struct platform_device *pdev)
static const struct of_device_id dwc_eth_dwmac_match[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10", .data = &dwc_qos_data },
{ .compatible = "nvidia,tegra186-eqos", .data = &tegra_eqos_data },
+ { .compatible = "tesla,dwc-qos-ethernet-4.21", .data = &fsd_eqos_data },
{ }
};
MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 592d29abcb1c..0330647ca8b6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3821,6 +3821,12 @@ static int __stmmac_open(struct net_device *dev,
netif_tx_start_all_queues(priv->dev);
stmmac_enable_all_dma_irq(priv);
+ if (priv->plat->rxmux_setup) {
+ ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, true);
+ if (ret)
+ netdev_err(priv->dev, "Rxmux setup failed\n");
+ }
+
return 0;
irq_error:
@@ -3874,6 +3880,12 @@ static int stmmac_release(struct net_device *dev)
struct stmmac_priv *priv = netdev_priv(dev);
u32 chan;
+ if (priv->plat->rxmux_setup) {
+ ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, false);
+ if (ret)
+ netdev_err(priv->dev, "Rxmux setup failed\n");
+ }
+
if (device_may_wakeup(priv->device))
phylink_speed_down(priv->phylink, false);
/* Stop and disconnect the PHY */
@@ -7397,6 +7409,12 @@ int stmmac_suspend(struct device *dev)
if (!ndev || !netif_running(ndev))
return 0;
+ if (priv->plat->rxmux_setup) {
+ ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, false);
+ if (ret)
+ netdev_err(priv->dev, "Rxmux setup failed\n");
+ }
+
mutex_lock(&priv->lock);
netif_device_detach(ndev);
@@ -7560,6 +7578,12 @@ int stmmac_resume(struct device *dev)
mutex_unlock(&priv->lock);
rtnl_unlock();
+ if (priv->plat->rxmux_setup) {
+ ret = priv->plat->rxmux_setup(priv->plat->bsp_priv, true);
+ if (ret)
+ netdev_err(priv->dev, "Rxmux setup failed\n");
+ }
+
netif_device_attach(ndev);
return 0;
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index fb2e88614f5d..8867646917e0 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -229,6 +229,7 @@ struct plat_stmmacenet_data {
void (*ptp_clk_freq_config)(void *priv);
int (*init)(struct platform_device *pdev, void *priv);
void (*exit)(struct platform_device *pdev, void *priv);
+ int (*rxmux_setup)(void *priv, bool external);
struct mac_device_info *(*setup)(void *priv);
int (*clks_config)(void *priv, bool enabled);
int (*crosststamp)(ktime_t *device, struct system_counterval_t *system,
--
2.17.1
The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one in
FSYS0 block and other in PERIC block.
Adds device tree node for Ethernet in PERIC Block and enables the same for
FSD platform.
Signed-off-by: Pankaj Dubey <[email protected]>
Signed-off-by: Jayati Sahu <[email protected]>
Signed-off-by: Sriranjani P <[email protected]>
---
arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++
arch/arm64/boot/dts/tesla/fsd.dtsi | 29 +++++++++++
3 files changed, 94 insertions(+)
diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
index ca0c1a28d562..2c0cbe775e04 100644
--- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
+++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
@@ -39,6 +39,15 @@
};
};
+ðernet_1 {
+ status = "okay";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
&fin_pll {
clock-frequency = <24000000>;
};
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
index 7ccc0738a149..c955bf159786 100644
--- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
@@ -395,6 +395,62 @@
samsung,pin-pud = <FSD_PIN_PULL_UP>;
samsung,pin-drv = <FSD_PIN_DRV_LV1>;
};
+
+ eth1_tx_clk: eth1-tx-clk-pins {
+ samsung,pins = "gpf2-0";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_tx_data: eth1-tx-data-pins {
+ samsung,pins = "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_tx_ctrl: eth1-tx-ctrl-pins {
+ samsung,pins = "gpf2-5";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_phy_intr: eth1-phy-intr-pins {
+ samsung,pins = "gpf2-6";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
+
+ eth1_rx_clk: eth1-rx-clk-pins {
+ samsung,pins = "gpf3-0";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_rx_data: eth1-rx-data-pins {
+ samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_rx_ctrl: eth1-rx-ctrl-pins {
+ samsung,pins = "gpf3-5";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV6>;
+ };
+
+ eth1_mdio: eth1-mdio-pins {
+ samsung,pins = "gpf3-6", "gpf3-7";
+ samsung,pin-function = <FSD_PIN_FUNC_2>;
+ samsung,pin-pud = <FSD_PIN_PULL_UP>;
+ samsung,pin-drv = <FSD_PIN_DRV_LV4>;
+ };
};
&pinctrl_pmu {
diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
index ade707cc646b..8807055807dd 100644
--- a/arch/arm64/boot/dts/tesla/fsd.dtsi
+++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
@@ -33,6 +33,7 @@
spi1 = &spi_1;
spi2 = &spi_2;
eth0 = ðernet_0;
+ eth1 = ðernet_1;
};
cpus {
@@ -882,6 +883,34 @@
phy-mode = "rgmii";
status = "disabled";
};
+
+ ethernet_1: ethernet@14300000 {
+ compatible = "tesla,dwc-qos-ethernet-4.21";
+ reg = <0x0 0x14300000 0x0 0x10000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
+ <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
+ <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
+ <&clock_peric PERIC_EQOS_PHYRXCLK>,
+ <&clock_peric PERIC_DOUT_RGMII_CLK>;
+ clock-names = "ptp_ref", "master_bus", "slave_bus", "tx", "rx",
+ "master2_bus", "slave2_bus", "eqos_rxclk_mux",
+ "eqos_phyrxclk", "dout_peric_rgmii_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>,
+ <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>,
+ <ð1_rx_ctrl>, <ð1_mdio>;
+ local-mac-address = [00 00 00 00 00 00];
+ rx-clock-skew = <&sysreg_peric 0x10>;
+ iommus = <&smmu_peric 0x0 0x1>;
+ phy-mode = "rgmii";
+ status = "disabled";
+ };
};
};
--
2.17.1
On 11/01/2023 08:54, Sriranjani P wrote:
> Add FSD Ethernet compatible in Synopsys dt-bindings document. Add FSD
> Ethernet YAML schema to enable the DT validation.
>
> Signed-off-by: Pankaj Dubey <[email protected]>
> Signed-off-by: Ravi Patel <[email protected]>
> Signed-off-by: Sriranjani P <[email protected]>
> ---
> .../devicetree/bindings/net/snps,dwmac.yaml | 1 +
> .../net/tesla,dwc-qos-ethernet-4.21.yaml | 103 ++++++++++++++++++
> 2 files changed, 104 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 2f909ffe2fe8..e8d53061fd35 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -89,6 +89,7 @@ properties:
> - snps,dwmac-5.10a
> - snps,dwxgmac
> - snps,dwxgmac-2.10
> + - tesla,dwc-qos-ethernet-4.21
I don't get, why did you add the IP version number? Can Tesla FSD come
with different ones? The compatible should be specific to SoC and that's
all. Also keep consistent naming, so this is a "mac", right?
>
> reg:
> minItems: 1
> diff --git a/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml b/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
> new file mode 100644
> index 000000000000..d0dfc4a38d17
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/tesla,dwc-qos-ethernet-4.21.yaml
> @@ -0,0 +1,103 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/tesla,dwc-qos-ethernet-4.21.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: FSD Ethernet Quality of Service Device Tree Bindings
Drop "Device Tree Bindings"
> +
> +allOf:
> + - $ref: "snps,dwmac.yaml#"
Drop quoets.
> +
> +maintainers:
> + - Sriranjani P <[email protected]>
> +
> +properties:
> + compatible:
> + const: tesla,dwc-qos-ethernet-4.21.yaml
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 4
> +
> + clock-names:
> + minItems: 4
Why rx clock might be not connected?
> + items:
> + - const: ptp_ref
> + - const: master_bus
> + - const: slave_bus
> + - const: tx
> + - const: rx
> + - const: master2_bus
> + - const: slave2_bus
> + - const: eqos_rxclk_mux
> + - const: eqos_phyrxclk
> + - const: dout_peric_rgmii_clk
You have here 10 clocks, but snps,dwmac allows maximum 8. You need to
update it and fix any other dependent schemas.
> +
> + rx-clock-skew:
Does not look like generic property. Missing vendor prefix, description,
constraints.
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> + iommus:
> + maxItems: 1
> +
> + phy-mode:
> + $ref: ethernet-controller.yaml#/properties/phy-connection-type
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - rx-clock-skew
> + - iommus
> + - phy-mode
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/fsd-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + ethernet_1: ethernet@14300000 {
> + compatible = "tesla,dwc-qos-ethernet-4.21";
> + reg = <0x0 0x14300000 0x0 0x10000>;
Are you sure you tested the bindings? 100% sure?
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + clocks =
Don't introduce fake blank lines.
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
> + <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
> + <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
> + <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
> + <&clock_peric PERIC_EQOS_PHYRXCLK>,
> + <&clock_peric PERIC_DOUT_RGMII_CLK>;
> + clock-names =
Ditto
> + "ptp_ref",
> + "master_bus",
Best regards,
Krzysztof
On 11/01/2023 08:54, Sriranjani P wrote:
> The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one in
> FSYS0 block and other in PERIC block.
>
> Adds device tree node for Ethernet in PERIC Block and enables the same for
> FSD platform.
>
> Signed-off-by: Pankaj Dubey <[email protected]>
> Signed-off-by: Jayati Sahu <[email protected]>
> Signed-off-by: Sriranjani P <[email protected]>
> ---
> arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++
> arch/arm64/boot/dts/tesla/fsd.dtsi | 29 +++++++++++
> 3 files changed, 94 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index ca0c1a28d562..2c0cbe775e04 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -39,6 +39,15 @@
> };
> };
>
> +ðernet_1 {
> + status = "okay";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> +};
> +
> &fin_pll {
> clock-frequency = <24000000>;
> };
> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> index 7ccc0738a149..c955bf159786 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> @@ -395,6 +395,62 @@
> samsung,pin-pud = <FSD_PIN_PULL_UP>;
> samsung,pin-drv = <FSD_PIN_DRV_LV1>;
> };
> +
> + eth1_tx_clk: eth1-tx-clk-pins {
> + samsung,pins = "gpf2-0";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_tx_data: eth1-tx-data-pins {
> + samsung,pins = "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_tx_ctrl: eth1-tx-ctrl-pins {
> + samsung,pins = "gpf2-5";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_phy_intr: eth1-phy-intr-pins {
> + samsung,pins = "gpf2-6";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> +
> + eth1_rx_clk: eth1-rx-clk-pins {
> + samsung,pins = "gpf3-0";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_rx_data: eth1-rx-data-pins {
> + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_rx_ctrl: eth1-rx-ctrl-pins {
> + samsung,pins = "gpf3-5";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth1_mdio: eth1-mdio-pins {
> + samsung,pins = "gpf3-6", "gpf3-7";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> };
>
> &pinctrl_pmu {
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index ade707cc646b..8807055807dd 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -33,6 +33,7 @@
> spi1 = &spi_1;
> spi2 = &spi_2;
> eth0 = ðernet_0;
> + eth1 = ðernet_1;
Nope for the reasons I explained last time.
> };
>
> cpus {
> @@ -882,6 +883,34 @@
> phy-mode = "rgmii";
> status = "disabled";
> };
> +
> + ethernet_1: ethernet@14300000 {
Do not add nodes to the end.
Best regards,
Krzysztof
On 11/01/2023 08:54, Sriranjani P wrote:
> The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP, one
> in FSYS0 block and other in PERIC block.
>
> Adds device tree node for Ethernet in FSYS0 Block and enables the same for
> FSD platform.
>
> Signed-off-by: Pankaj Dubey <[email protected]>
> Signed-off-by: Jayati Sahu <[email protected]>
> Signed-off-by: Sriranjani P <[email protected]>
> ---
> arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56 ++++++++++++++++++++++
> arch/arm64/boot/dts/tesla/fsd.dtsi | 22 +++++++++
> 3 files changed, 87 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> index 1db6ddf03f01..ca0c1a28d562 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> @@ -30,6 +30,15 @@
> };
> };
>
> +ðernet_0 {
> + status = "okay";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> +};
> +
> &fin_pll {
> clock-frequency = <24000000>;
> };
> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> index d0abb9aa0e9e..7ccc0738a149 100644
> --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> @@ -64,6 +64,62 @@
> samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> samsung,pin-drv = <FSD_PIN_DRV_LV2>;
> };
> +
> + eth0_tx_clk: eth0-tx-clk-pins {
Wrong indentation.
> + samsung,pins = "gpf0-0";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_tx_data: eth0-tx-data-pins {
> + samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_tx_ctrl: eth0-tx-ctrl-pins {
> + samsung,pins = "gpf0-5";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_phy_intr: eth0-phy-intr-pins {
> + samsung,pins = "gpf0-6";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> +
> + eth0_rx_clk: eth0-rx-clk-pins {
> + samsung,pins = "gpf1-0";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_rx_data: eth0-rx-data-pins {
> + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_rx_ctrl: eth0-rx-ctrl-pins {
> + samsung,pins = "gpf1-5";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> + };
> +
> + eth0_mdio: eth0-mdio-pins {
> + samsung,pins = "gpf1-6", "gpf1-7";
> + samsung,pin-function = <FSD_PIN_FUNC_2>;
> + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> + };
> };
>
> &pinctrl_peric {
> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi
> index f35bc5a288c2..ade707cc646b 100644
> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> @@ -32,6 +32,7 @@
> spi0 = &spi_0;
> spi1 = &spi_1;
> spi2 = &spi_2;
> + eth0 = ðernet_0;
This is a friendly reminder during the review process.
It seems my previous comments were not fully addressed. Maybe my
feedback got lost between the quotes, maybe you just forgot to apply it.
Please go back to the previous discussion and either implement all
requested changes or keep discussing them.
Thank you.
Best regards,
Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:[email protected]]
> Sent: 12 January 2023 15:05
> To: Sriranjani P <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; [email protected];
> [email protected]; [email protected]; Jayati Sahu
> <[email protected]>
> Subject: Re: [PATCH v2 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0
> Block of FSD SoC
>
> On 11/01/2023 08:54, Sriranjani P wrote:
> > The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP,
> > one in FSYS0 block and other in PERIC block.
> >
> > Adds device tree node for Ethernet in FSYS0 Block and enables the same
> > for FSD platform.
> >
> > Signed-off-by: Pankaj Dubey <[email protected]>
> > Signed-off-by: Jayati Sahu <[email protected]>
> > Signed-off-by: Sriranjani P <[email protected]>
> > ---
> > arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
> > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56
> ++++++++++++++++++++++
> > arch/arm64/boot/dts/tesla/fsd.dtsi | 22 +++++++++
> > 3 files changed, 87 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > index 1db6ddf03f01..ca0c1a28d562 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > @@ -30,6 +30,15 @@
> > };
> > };
> >
> > +ðernet_0 {
> > + status = "okay";
> > +
> > + fixed-link {
> > + speed = <1000>;
> > + full-duplex;
> > + };
> > +};
> > +
> > &fin_pll {
> > clock-frequency = <24000000>;
> > };
> > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > index d0abb9aa0e9e..7ccc0738a149 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > @@ -64,6 +64,62 @@
> > samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> > samsung,pin-drv = <FSD_PIN_DRV_LV2>;
> > };
> > +
> > + eth0_tx_clk: eth0-tx-clk-pins {
>
> Wrong indentation.
Will fix in the next version.
>
> > + samsung,pins = "gpf0-0";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_tx_data: eth0-tx-data-pins {
> > + samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_tx_ctrl: eth0-tx-ctrl-pins {
> > + samsung,pins = "gpf0-5";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_phy_intr: eth0-phy-intr-pins {
> > + samsung,pins = "gpf0-6";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> > + };
> > +
> > + eth0_rx_clk: eth0-rx-clk-pins {
> > + samsung,pins = "gpf1-0";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_rx_data: eth0-rx-data-pins {
> > + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_rx_ctrl: eth0-rx-ctrl-pins {
> > + samsung,pins = "gpf1-5";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth0_mdio: eth0-mdio-pins {
> > + samsung,pins = "gpf1-6", "gpf1-7";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> > + };
> > };
> >
> > &pinctrl_peric {
> > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
> > b/arch/arm64/boot/dts/tesla/fsd.dtsi
> > index f35bc5a288c2..ade707cc646b 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> > @@ -32,6 +32,7 @@
> > spi0 = &spi_0;
> > spi1 = &spi_1;
> > spi2 = &spi_2;
> > + eth0 = ðernet_0;
>
> This is a friendly reminder during the review process.
>
> It seems my previous comments were not fully addressed. Maybe my
> feedback got lost between the quotes, maybe you just forgot to apply it.
> Please go back to the previous discussion and either implement all requested
> changes or keep discussing them.
Sorry somehow I'm not able to find my previous mail chain.
I had replied to your comment in the previous version of the mail.
In this case alias id is used to differentiate between Ethernet instance 0 and 1 in the driver code.
>
> Thank you.
>
>
> Best regards,
> Krzysztof
> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:[email protected]]
> Sent: 12 January 2023 15:07
> To: Sriranjani P <[email protected]>; [email protected];
> [email protected]; [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected];
> [email protected]; [email protected]
> Cc: [email protected]; [email protected]; linux-
> [email protected]; [email protected];
> [email protected]; [email protected]; Jayati Sahu
> <[email protected]>
> Subject: Re: [PATCH v2 4/4] arm64: dts: fsd: Add Ethernet support for PERIC
> Block of FSD SoC
>
> On 11/01/2023 08:54, Sriranjani P wrote:
> > The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP,
> > one in
> > FSYS0 block and other in PERIC block.
> >
> > Adds device tree node for Ethernet in PERIC Block and enables the same
> > for FSD platform.
> >
> > Signed-off-by: Pankaj Dubey <[email protected]>
> > Signed-off-by: Jayati Sahu <[email protected]>
> > Signed-off-by: Sriranjani P <[email protected]>
> > ---
> > arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
> > arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56
> ++++++++++++++++++++++
> > arch/arm64/boot/dts/tesla/fsd.dtsi | 29 +++++++++++
> > 3 files changed, 94 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > index ca0c1a28d562..2c0cbe775e04 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
> > @@ -39,6 +39,15 @@
> > };
> > };
> >
> > +ðernet_1 {
> > + status = "okay";
> > +
> > + fixed-link {
> > + speed = <1000>;
> > + full-duplex;
> > + };
> > +};
> > +
> > &fin_pll {
> > clock-frequency = <24000000>;
> > };
> > diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > index 7ccc0738a149..c955bf159786 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
> > @@ -395,6 +395,62 @@
> > samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > samsung,pin-drv = <FSD_PIN_DRV_LV1>;
> > };
> > +
> > + eth1_tx_clk: eth1-tx-clk-pins {
> > + samsung,pins = "gpf2-0";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_tx_data: eth1-tx-data-pins {
> > + samsung,pins = "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-4";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_tx_ctrl: eth1-tx-ctrl-pins {
> > + samsung,pins = "gpf2-5";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_phy_intr: eth1-phy-intr-pins {
> > + samsung,pins = "gpf2-6";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> > + };
> > +
> > + eth1_rx_clk: eth1-rx-clk-pins {
> > + samsung,pins = "gpf3-0";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_rx_data: eth1-rx-data-pins {
> > + samsung,pins = "gpf3-1", "gpf3-2", "gpf3-3", "gpf3-4";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_rx_ctrl: eth1-rx-ctrl-pins {
> > + samsung,pins = "gpf3-5";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
> > + };
> > +
> > + eth1_mdio: eth1-mdio-pins {
> > + samsung,pins = "gpf3-6", "gpf3-7";
> > + samsung,pin-function = <FSD_PIN_FUNC_2>;
> > + samsung,pin-pud = <FSD_PIN_PULL_UP>;
> > + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
> > + };
> > };
> >
> > &pinctrl_pmu {
> > diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
> > b/arch/arm64/boot/dts/tesla/fsd.dtsi
> > index ade707cc646b..8807055807dd 100644
> > --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
> > +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
> > @@ -33,6 +33,7 @@
> > spi1 = &spi_1;
> > spi2 = &spi_2;
> > eth0 = ðernet_0;
> > + eth1 = ðernet_1;
>
> Nope for the reasons I explained last time.
Sorry somehow I'm not able to find my previous mail chain.
I had replied to your comment in the previous version of the mail.
In this case alias id is used to differentiate between Ethernet instance 0 and 1 in the driver code.
>
> > };
> >
> > cpus {
> > @@ -882,6 +883,34 @@
> > phy-mode = "rgmii";
> > status = "disabled";
> > };
> > +
> > + ethernet_1: ethernet@14300000 {
>
> Do not add nodes to the end.
If you mean to say that the nodes are supposed to be in the increasing order of physical address,
I can see that the existing file is not arranged in that format. If that is required I can first fix the
existing file and post the revised patch for the same.
>
> Best regards,
> Krzysztof
On 14/08/2023 12:18, Sriranjani P wrote:
>
>
>> -----Original Message-----
>> From: Krzysztof Kozlowski [mailto:[email protected]]
>> Sent: 12 January 2023 15:05
>> To: Sriranjani P <[email protected]>; [email protected];
>> [email protected]; [email protected]; [email protected];
>> [email protected]; [email protected];
>> [email protected]; [email protected];
>> [email protected]; [email protected]
>> Cc: [email protected]; [email protected]; linux-
>> [email protected]; [email protected];
>> [email protected]; [email protected]; Jayati Sahu
>> <[email protected]>
>> Subject: Re: [PATCH v2 3/4] arm64: dts: fsd: Add Ethernet support for FSYS0
>> Block of FSD SoC
>>
>> On 11/01/2023 08:54, Sriranjani P wrote:
>>> The FSD SoC contains two instances of Synopsys DWC QoS Ethernet IP,
>>> one in FSYS0 block and other in PERIC block.
>>>
>>> Adds device tree node for Ethernet in FSYS0 Block and enables the same
>>> for FSD platform.
>>>
>>> Signed-off-by: Pankaj Dubey <[email protected]>
>>> Signed-off-by: Jayati Sahu <[email protected]>
>>> Signed-off-by: Sriranjani P <[email protected]>
>>> ---
>>> arch/arm64/boot/dts/tesla/fsd-evb.dts | 9 ++++
>>> arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 56
>> ++++++++++++++++++++++
>>> arch/arm64/boot/dts/tesla/fsd.dtsi | 22 +++++++++
>>> 3 files changed, 87 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts
>>> b/arch/arm64/boot/dts/tesla/fsd-evb.dts
>>> index 1db6ddf03f01..ca0c1a28d562 100644
>>> --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts
>>> +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts
>>> @@ -30,6 +30,15 @@
>>> };
>>> };
>>>
>>> +ðernet_0 {
>>> + status = "okay";
>>> +
>>> + fixed-link {
>>> + speed = <1000>;
>>> + full-duplex;
>>> + };
>>> +};
>>> +
>>> &fin_pll {
>>> clock-frequency = <24000000>;
>>> };
>>> diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>>> b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>>> index d0abb9aa0e9e..7ccc0738a149 100644
>>> --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>>> +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
>>> @@ -64,6 +64,62 @@
>>> samsung,pin-pud = <FSD_PIN_PULL_NONE>;
>>> samsung,pin-drv = <FSD_PIN_DRV_LV2>;
>>> };
>>> +
>>> + eth0_tx_clk: eth0-tx-clk-pins {
>>
>> Wrong indentation.
> Will fix in the next version.
>>
>>> + samsung,pins = "gpf0-0";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_DOWN>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_tx_data: eth0-tx-data-pins {
>>> + samsung,pins = "gpf0-1", "gpf0-2", "gpf0-3", "gpf0-4";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_tx_ctrl: eth0-tx-ctrl-pins {
>>> + samsung,pins = "gpf0-5";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_phy_intr: eth0-phy-intr-pins {
>>> + samsung,pins = "gpf0-6";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
>>> + };
>>> +
>>> + eth0_rx_clk: eth0-rx-clk-pins {
>>> + samsung,pins = "gpf1-0";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_rx_data: eth0-rx-data-pins {
>>> + samsung,pins = "gpf1-1", "gpf1-2", "gpf1-3", "gpf1-4";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_rx_ctrl: eth0-rx-ctrl-pins {
>>> + samsung,pins = "gpf1-5";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_UP>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV6>;
>>> + };
>>> +
>>> + eth0_mdio: eth0-mdio-pins {
>>> + samsung,pins = "gpf1-6", "gpf1-7";
>>> + samsung,pin-function = <FSD_PIN_FUNC_2>;
>>> + samsung,pin-pud = <FSD_PIN_PULL_NONE>;
>>> + samsung,pin-drv = <FSD_PIN_DRV_LV4>;
>>> + };
>>> };
>>>
>>> &pinctrl_peric {
>>> diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi
>>> b/arch/arm64/boot/dts/tesla/fsd.dtsi
>>> index f35bc5a288c2..ade707cc646b 100644
>>> --- a/arch/arm64/boot/dts/tesla/fsd.dtsi
>>> +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi
>>> @@ -32,6 +32,7 @@
>>> spi0 = &spi_0;
>>> spi1 = &spi_1;
>>> spi2 = &spi_2;
>>> + eth0 = ðernet_0;
>>
>> This is a friendly reminder during the review process.
>>
>> It seems my previous comments were not fully addressed. Maybe my
>> feedback got lost between the quotes, maybe you just forgot to apply it.
>> Please go back to the previous discussion and either implement all requested
>> changes or keep discussing them.
> Sorry somehow I'm not able to find my previous mail chain.
Why? It is in the lore. I think this proves that responding after half a
year make it difficult for both reviewer and submitter.
> I had replied to your comment in the previous version of the mail.
> In this case alias id is used to differentiate between Ethernet instance 0 and 1 in the driver code.
Nope. Aliases are per board, not per SoC, so how is this supposed to
work if we number them reversed (1->0) in another board?
Best regards,
Krzysztof