LinuxLists.cc - [PATCH 00/12] mips: ralink: introduce 'soc

2023-02-27 10:58:17

Subject: [PATCH 00/12] mips: ralink: introduce 'soc_device' initialization

This series align old SoCs ralink code with current mt7621 code refactoring
SoC related information into more readable functions as well as introducing
'soc_device' for all of them. This allows to be able to distinc SoC info
from driver code without using architecture dependent includes.

I am also planning to extract from ralink code current clock related stuff
into proper clk drivers at some time and be able to distinc SoC in this way
let me to mark future drivers to be easily marked for COMPILE_TEST target.

Changes have been compile tested for:
- RT2880
- RT3883
- MT7620

Changes have been properly tested in RT5350 SoC based board (ALL5003 board)
resulting in a working platform.

Thanks in advance for your time.

Best regards,
Sergio Paracuellos

Sergio Paracuellos (12):
mips: ralink: rt305x: define RT305X_SYSC_BASE with __iomem
mips: ralink: rt305x: soc queries and tests as functions
mips: ralink: rt305x: introduce 'soc_device' initialization
mips: ralink: rt3883: define RT3883_SYSC_BASE with __iomem
mips: ralink: rt3883: soc queries and tests as functions
mips: ralink: rt3883: introduce 'soc_device' initialization
mips: ralink: rt288x: define RT2880_SYSC_BASE with __iomem
mips: ralink: rt288x: soc queries and tests as functions
mips: ralink: rt288x: introduce 'soc_device' initialization
mips: ralink: mt7620: define MT7620_SYSC_BASE with __iomem
mips: ralink: mt7620: soc queries and tests as functions
mips: ralink: mt7620: introduce 'soc_device' initialization

arch/mips/include/asm/mach-ralink/mt7620.h | 3 +-
arch/mips/include/asm/mach-ralink/rt288x.h | 3 +-
arch/mips/include/asm/mach-ralink/rt305x.h | 3 +-
arch/mips/include/asm/mach-ralink/rt3883.h | 4 +-
arch/mips/ralink/Kconfig | 4 +
arch/mips/ralink/mt7620.c | 145 ++++++++++++++++----
arch/mips/ralink/rt288x.c | 94 ++++++++++---
arch/mips/ralink/rt305x.c | 147 +++++++++++++++++----
arch/mips/ralink/rt3883.c | 94 ++++++++++---
9 files changed, 410 insertions(+), 87 deletions(-)

--
2.25.1

2023-02-27 10:58:23

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 01/12] mips: ralink: rt305x: define RT305X_SYSC_BASE with __iomem

So that RT305X_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/include/asm/mach-ralink/rt305x.h | 3 ++-
arch/mips/ralink/rt305x.c | 8 +++-----
2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/mips/include/asm/mach-ralink/rt305x.h b/arch/mips/include/asm/mach-ralink/rt305x.h
index 4d8e8c8d83ce..ef58f7bff957 100644
--- a/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -43,7 +43,8 @@ static inline int soc_is_rt5350(void)
return ralink_soc == RT305X_SOC_RT5350;
}

-#define RT305X_SYSC_BASE 0x10000000
+#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))
+#define RT305X_SYSC_BASE IOMEM(0x10000000)

#define SYSC_REG_CHIP_NAME0 0x00
#define SYSC_REG_CHIP_NAME1 0x04
diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 8b095a9dcb15..135a46517763 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -21,11 +21,10 @@

static unsigned long rt5350_get_mem_size(void)
{
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
unsigned long ret;
u32 t;

- t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG);
+ t = __raw_readl(RT305X_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG);
t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) &
RT5350_SYSCFG0_DRAM_SIZE_MASK;

@@ -142,14 +141,13 @@ void __init ralink_of_remap(void)

void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
unsigned char *name;
u32 n0;
u32 n1;
u32 id;

- n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+ n0 = __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME1);

if (n0 == RT3052_CHIP_NAME0 && n1 == RT3052_CHIP_NAME1) {
unsigned long icache_sets;
--
2.25.1

2023-02-27 10:58:26

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 02/12] mips: ralink: rt305x: soc queries and tests as functions

Move the SoC register value queries and tests to specific functions,
to remove repetition of logic. No functional changes intended

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/rt305x.c | 97 +++++++++++++++++++++++++++++++--------
1 file changed, 77 insertions(+), 20 deletions(-)

diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 135a46517763..a24143c739ee 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -139,52 +139,109 @@ void __init ralink_of_remap(void)
panic("Failed to remap core resources");
}

-void __init prom_soc_init(struct ralink_soc_info *soc_info)
+static unsigned int __init rt305x_get_soc_name0(void)
+{
+ return __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+}
+
+static unsigned int __init rt305x_get_soc_name1(void)
{
- unsigned char *name;
- u32 n0;
- u32 n1;
- u32 id;
+ return __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+}

- n0 = __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+static bool __init rt3052_soc_valid(void)
+{
+ if (rt305x_get_soc_name0() == RT3052_CHIP_NAME0 &&
+ rt305x_get_soc_name1() == RT3052_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}

- if (n0 == RT3052_CHIP_NAME0 && n1 == RT3052_CHIP_NAME1) {
+static bool __init rt3350_soc_valid(void)
+{
+ if (rt305x_get_soc_name0() == RT3350_CHIP_NAME0 &&
+ rt305x_get_soc_name1() == RT3350_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}
+
+static bool __init rt3352_soc_valid(void)
+{
+ if (rt305x_get_soc_name0() == RT3352_CHIP_NAME0 &&
+ rt305x_get_soc_name1() == RT3352_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}
+
+static bool __init rt5350_soc_valid(void)
+{
+ if (rt305x_get_soc_name0() == RT5350_CHIP_NAME0 &&
+ rt305x_get_soc_name1() == RT5350_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}
+
+static const char __init *rt305x_get_soc_name(struct ralink_soc_info *soc_info)
+{
+ if (rt3052_soc_valid()) {
unsigned long icache_sets;

icache_sets = (read_c0_config1() >> 22) & 7;
if (icache_sets == 1) {
ralink_soc = RT305X_SOC_RT3050;
- name = "RT3050";
soc_info->compatible = "ralink,rt3050-soc";
+ return "RT3050";
} else {
ralink_soc = RT305X_SOC_RT3052;
- name = "RT3052";
soc_info->compatible = "ralink,rt3052-soc";
+ return "RT3052";
}
- } else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) {
+ } else if (rt3350_soc_valid()) {
ralink_soc = RT305X_SOC_RT3350;
- name = "RT3350";
soc_info->compatible = "ralink,rt3350-soc";
- } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) {
+ return "RT3350";
+ } else if (rt3352_soc_valid()) {
ralink_soc = RT305X_SOC_RT3352;
- name = "RT3352";
soc_info->compatible = "ralink,rt3352-soc";
- } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) {
+ return "RT3352";
+ } else if (rt5350_soc_valid()) {
ralink_soc = RT305X_SOC_RT5350;
- name = "RT5350";
soc_info->compatible = "ralink,rt5350-soc";
+ return "RT5350";
} else {
- panic("rt305x: unknown SoC, n0:%08x n1:%08x", n0, n1);
+ panic("rt305x: unknown SoC, n0:%08x n1:%08x",
+ rt305x_get_soc_name0(), rt305x_get_soc_name1());
}
+}
+
+static unsigned int __init rt305x_get_soc_id(void)
+{
+ return __raw_readl(RT305X_SYSC_BASE + SYSC_REG_CHIP_ID);
+}
+
+static unsigned int __init rt305x_get_soc_ver(void)
+{
+ return (rt305x_get_soc_id() >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK;
+}

- id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
+static unsigned int __init rt305x_get_soc_rev(void)
+{
+ return (rt305x_get_soc_id() & CHIP_ID_REV_MASK);
+}
+
+void __init prom_soc_init(struct ralink_soc_info *soc_info)
+{
+ const char *name = rt305x_get_soc_name(soc_info);

snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
"Ralink %s id:%u rev:%u",
name,
- (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
- (id & CHIP_ID_REV_MASK));
+ rt305x_get_soc_ver(),
+ rt305x_get_soc_rev());

soc_info->mem_base = RT305X_SDRAM_BASE;
if (soc_is_rt5350()) {
--
2.25.1

2023-02-27 10:58:32

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 03/12] mips: ralink: rt305x: introduce 'soc_device' initialization

RT305x SoCs have their own 'ralink_soc_info' structure with some
information about the soc itself. In order to be able to retrieve this
information from driver code and avoid architecture dependencies for
retrieving these details introduce this 'soc_device'. Set 'data' pointer
points to the struct 'ralink_soc_info' to be able to export also current
soc information using this mechanism. We need to select 'SOC_BUS' in
Kconfig configuration for these SoCs.

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/Kconfig | 1 +
arch/mips/ralink/rt305x.c | 46 +++++++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+)

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 06031796c87b..658e12b34ccc 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -32,6 +32,7 @@ choice

config SOC_RT305X
bool "RT305x"
+ select SOC_BUS

config SOC_RT3883
bool "RT3883"
diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index a24143c739ee..d8dcc5cc66cc 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -11,6 +11,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bug.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>

#include <asm/io.h>
#include <asm/mipsregs.h>
@@ -19,6 +21,8 @@

#include "common.h"

+static struct ralink_soc_info *soc_info_ptr;
+
static unsigned long rt5350_get_mem_size(void)
{
unsigned long ret;
@@ -233,6 +237,46 @@ static unsigned int __init rt305x_get_soc_rev(void)
return (rt305x_get_soc_id() & CHIP_ID_REV_MASK);
}

+static const char __init *rt305x_get_soc_id_name(void)
+{
+ if (soc_is_rt3050())
+ return "rt3050";
+ else if (soc_is_rt3052())
+ return "rt3052";
+ else if (soc_is_rt3350())
+ return "rt3350";
+ else if (soc_is_rt3352())
+ return "rt3352";
+ else if (soc_is_rt5350())
+ return "rt5350";
+ else
+ return "invalid";
+}
+
+static int __init rt305x_soc_dev_init(void)
+{
+ struct soc_device *soc_dev;
+ struct soc_device_attribute *soc_dev_attr;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ soc_dev_attr->family = "Ralink";
+ soc_dev_attr->soc_id = rt305x_get_soc_id_name();
+
+ soc_dev_attr->data = soc_info_ptr;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr);
+ return PTR_ERR(soc_dev);
+ }
+
+ return 0;
+}
+device_initcall(rt305x_soc_dev_init);
+
void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
const char *name = rt305x_get_soc_name(soc_info);
@@ -253,4 +297,6 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
soc_info->mem_size_min = RT3352_MEM_SIZE_MIN;
soc_info->mem_size_max = RT3352_MEM_SIZE_MAX;
}
+
+ soc_info_ptr = soc_info;
}
--
2.25.1

2023-02-27 10:59:01

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 04/12] mips: ralink: rt3883: define RT3883_SYSC_BASE with __iomem

So that RT3883_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/include/asm/mach-ralink/rt3883.h | 4 +++-
arch/mips/ralink/rt3883.c | 7 +++----
2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/mips/include/asm/mach-ralink/rt3883.h b/arch/mips/include/asm/mach-ralink/rt3883.h
index f250de9c055b..ad25d5e8d2dc 100644
--- a/arch/mips/include/asm/mach-ralink/rt3883.h
+++ b/arch/mips/include/asm/mach-ralink/rt3883.h
@@ -10,8 +10,10 @@

#include <linux/bitops.h>

+#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))
+
#define RT3883_SDRAM_BASE 0x00000000
-#define RT3883_SYSC_BASE 0x10000000
+#define RT3883_SYSC_BASE IOMEM(0x10000000)
#define RT3883_TIMER_BASE 0x10000100
#define RT3883_INTC_BASE 0x10000200
#define RT3883_MEMC_BASE 0x10000300
diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
index d9875f146d66..fa215c07558d 100644
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -72,15 +72,14 @@ void __init ralink_of_remap(void)

void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE);
const char *name;
u32 n0;
u32 n1;
u32 id;

- n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3);
- n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7);
- id = __raw_readl(sysc + RT3883_SYSC_REG_REVID);
+ n0 = __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_CHIPID0_3);
+ n1 = __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_CHIPID4_7);
+ id = __raw_readl(RT3883_SYSC_BASE + RT3883_SYSC_REG_REVID);

if (n0 == RT3883_CHIP_NAME0 && n1 == RT3883_CHIP_NAME1) {
soc_info->compatible = "ralink,rt3883-soc";
--
2.25.1

2023-02-27 10:59:02

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 08/12] mips: ralink: rt288x: soc queries and tests as functions

2023-02-27 10:59:01

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 06/12] mips: ralink: rt3883: introduce 'soc_device' initialization

RT3883 SoC have its own 'ralink_soc_info' structure with some
information about the soc itself. In order to be able to retrieve this
information from driver code and avoid architecture dependencies for
retrieving these details introduce this 'soc_device'. Set 'data' pointer
points to the struct 'ralink_soc_info' to be able to export also current
soc information using this mechanism. We need to select 'SOC_BUS' in
Kconfig configuration for these SoCs.

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/Kconfig | 1 +
arch/mips/ralink/rt3883.c | 29 +++++++++++++++++++++++++++++
2 files changed, 30 insertions(+)

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 658e12b34ccc..f657e55b10b7 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -37,6 +37,7 @@ choice
config SOC_RT3883
bool "RT3883"
select HAVE_PCI
+ select SOC_BUS

config SOC_MT7620
bool "MT7620/8"
diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
index 6f8541a4bc8e..cca887af378f 100644
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -10,6 +10,8 @@

#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>

#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -17,6 +19,8 @@

#include "common.h"

+static struct ralink_soc_info *soc_info_ptr;
+
void __init ralink_clk_init(void)
{
unsigned long cpu_rate, sys_rate;
@@ -112,6 +116,30 @@ static unsigned int __init rt3883_get_soc_rev(void)
return (rt3883_get_soc_id() & RT3883_REVID_ECO_ID_MASK);
}

+static int __init rt3883_soc_dev_init(void)
+{
+ struct soc_device *soc_dev;
+ struct soc_device_attribute *soc_dev_attr;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ soc_dev_attr->family = "Ralink";
+ soc_dev_attr->soc_id = rt3883_get_soc_name();
+
+ soc_dev_attr->data = soc_info_ptr;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr);
+ return PTR_ERR(soc_dev);
+ }
+
+ return 0;
+}
+device_initcall(rt3883_soc_dev_init);
+
void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
if (rt3883_soc_valid())
@@ -131,4 +159,5 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
soc_info->mem_size_max = RT3883_MEM_SIZE_MAX;

ralink_soc = RT3883_SOC;
+ soc_info_ptr = soc_info;
}
--
2.25.1

2023-02-27 10:59:02

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 07/12] mips: ralink: rt288x: define RT2880_SYSC_BASE with __iomem

So that RT2880_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/include/asm/mach-ralink/rt288x.h | 3 ++-
arch/mips/ralink/rt288x.c | 7 +++----
2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h
index 5f213534f0f5..66a999cd1d80 100644
--- a/arch/mips/include/asm/mach-ralink/rt288x.h
+++ b/arch/mips/include/asm/mach-ralink/rt288x.h
@@ -11,7 +11,8 @@
#ifndef _RT288X_REGS_H_
#define _RT288X_REGS_H_

-#define RT2880_SYSC_BASE 0x00300000
+#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))
+#define RT2880_SYSC_BASE IOMEM(0x00300000)

#define SYSC_REG_CHIP_NAME0 0x00
#define SYSC_REG_CHIP_NAME1 0x04
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
index 493335db2fe1..12f339138c4c 100644
--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -59,15 +59,14 @@ void __init ralink_of_remap(void)

void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE);
const char *name;
u32 n0;
u32 n1;
u32 id;

- n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
- id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
+ n0 = __raw_readl(RT2880_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(RT2880_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+ id = __raw_readl(RT2880_SYSC_BASE + SYSC_REG_CHIP_ID);

if (n0 == RT2880_CHIP_NAME0 && n1 == RT2880_CHIP_NAME1) {
soc_info->compatible = "ralink,r2880-soc";
--
2.25.1

2023-02-27 10:59:02

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 09/12] mips: ralink: rt288x: introduce 'soc_device' initialization

RT288X SoCs have their own 'ralink_soc_info' structure with some
information about the soc itself. In order to be able to retrieve this
information from driver code and avoid architecture dependencies for
retrieving these details introduce this 'soc_device'. Set 'data' pointer
points to the struct 'ralink_soc_info' to be able to export also current
soc information using this mechanism. We need to select 'SOC_BUS' in
Kconfig configuration for these SoCs.

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/Kconfig | 1 +
arch/mips/ralink/rt288x.c | 30 ++++++++++++++++++++++++++++++
2 files changed, 31 insertions(+)

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index f657e55b10b7..3e01e2df96b0 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -29,6 +29,7 @@ choice
select MIPS_AUTO_PFN_OFFSET
select MIPS_L1_CACHE_SHIFT_4
select HAVE_PCI
+ select SOC_BUS

config SOC_RT305X
bool "RT305x"
diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c
index a417b8b89b94..456ba0b2599e 100644
--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -10,6 +10,8 @@

#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>

#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -17,6 +19,8 @@

#include "common.h"

+static struct ralink_soc_info *soc_info_ptr;
+
void __init ralink_clk_init(void)
{
unsigned long cpu_rate, wmac_rate = 40000000;
@@ -98,6 +102,31 @@ static unsigned int __init rt2880_get_soc_rev(void)
{
return (rt2880_get_soc_id() & CHIP_ID_REV_MASK);
}
+
+static int __init rt2880_soc_dev_init(void)
+{
+ struct soc_device *soc_dev;
+ struct soc_device_attribute *soc_dev_attr;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ soc_dev_attr->family = "Ralink";
+ soc_dev_attr->soc_id = rt2880_get_soc_name();
+
+ soc_dev_attr->data = soc_info_ptr;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr);
+ return PTR_ERR(soc_dev);
+ }
+
+ return 0;
+}
+device_initcall(rt2880_soc_dev_init);
+
void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
if (rt2880_soc_valid())
@@ -117,4 +146,5 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
soc_info->mem_size_max = RT2880_MEM_SIZE_MAX;

ralink_soc = RT2880_SOC;
+ soc_info_ptr = soc_info;
}
--
2.25.1

2023-02-27 10:59:01

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 05/12] mips: ralink: rt3883: soc queries and tests as functions

2023-02-27 10:59:02

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 10/12] mips: ralink: mt7620: define MT7620_SYSC_BASE with __iomem

So that MT7620_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/include/asm/mach-ralink/mt7620.h | 3 ++-
arch/mips/ralink/mt7620.c | 15 +++++++--------
2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
index d51dfad8f543..3e37705ea9cf 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -11,7 +11,8 @@
#ifndef _MT7620_REGS_H_
#define _MT7620_REGS_H_

-#define MT7620_SYSC_BASE 0x10000000
+#define IOMEM(x) ((void __iomem *)(KSEG1ADDR(x)))
+#define MT7620_SYSC_BASE IOMEM(0x10000000)

#define SYSC_REG_CHIP_NAME0 0x00
#define SYSC_REG_CHIP_NAME1 0x04
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index ae1fa0391c88..c13b73b6ee3f 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -326,7 +326,6 @@ mt7628_dram_init(struct ralink_soc_info *soc_info)

void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7620_SYSC_BASE);
unsigned char *name = NULL;
u32 n0;
u32 n1;
@@ -336,9 +335,9 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
u32 pmu1;
u32 bga;

- n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
- rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
+ n0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+ n1 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+ rev = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_REV);
bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;

if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {
@@ -352,7 +351,7 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
soc_info->compatible = "ralink,mt7620n-soc";
}
} else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) {
- u32 efuse = __raw_readl(sysc + SYSC_REG_EFUSE_CFG);
+ u32 efuse = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_EFUSE_CFG);

if (efuse & EFUSE_MT7688) {
ralink_soc = MT762X_SOC_MT7688;
@@ -372,7 +371,7 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
(rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
(rev & CHIP_REV_ECO_MASK));

- cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
+ cfg0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG0);
if (is_mt76x8()) {
dram_type = cfg0 & DRAM_TYPE_MT7628_MASK;
} else {
@@ -388,8 +387,8 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
else
mt7620_dram_init(soc_info);

- pmu0 = __raw_readl(sysc + PMU0_CFG);
- pmu1 = __raw_readl(sysc + PMU1_CFG);
+ pmu0 = __raw_readl(MT7620_SYSC_BASE + PMU0_CFG);
+ pmu1 = __raw_readl(MT7620_SYSC_BASE + PMU1_CFG);

pr_info("Analog PMU set to %s control\n",
(pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
--
2.25.1

2023-02-27 10:59:33

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 11/12] mips: ralink: mt7620: soc queries and tests as functions

Move the SoC register value queries and tests to specific functions,
to remove repetition of logic. No functional changes intended

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/mt7620.c | 94 ++++++++++++++++++++++++++++++---------
1 file changed, 72 insertions(+), 22 deletions(-)

diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index c13b73b6ee3f..8604d91f3375 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -324,34 +324,76 @@ mt7628_dram_init(struct ralink_soc_info *soc_info)
}
}

-void __init prom_soc_init(struct ralink_soc_info *soc_info)
+static unsigned int __init mt7620_get_soc_name0(void)
{
- unsigned char *name = NULL;
- u32 n0;
- u32 n1;
- u32 rev;
- u32 cfg0;
- u32 pmu0;
- u32 pmu1;
- u32 bga;
+ return __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+}
+
+static unsigned int __init mt7620_get_soc_name1(void)
+{
+ return __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME1);
+}
+
+static bool __init mt7620_soc_valid(void)
+{
+ if (mt7620_get_soc_name0() == MT7620_CHIP_NAME0 &&
+ mt7620_get_soc_name1() == MT7620_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}
+
+static bool __init mt7628_soc_valid(void)
+{
+ if (mt7620_get_soc_name0() == MT7620_CHIP_NAME0 &&
+ mt7620_get_soc_name1() == MT7628_CHIP_NAME1)
+ return true;
+ else
+ return false;
+}

- n0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_NAME1);
- rev = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_REV);
- bga = (rev >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
+static unsigned int __init mt7620_get_rev(void)
+{
+ return __raw_readl(MT7620_SYSC_BASE + SYSC_REG_CHIP_REV);
+}
+
+static unsigned int __init mt7620_get_bga(void)
+{
+ return (mt7620_get_rev() >> CHIP_REV_PKG_SHIFT) & CHIP_REV_PKG_MASK;
+}
+
+static unsigned int __init mt7620_get_efuse(void)
+{
+ return __raw_readl(MT7620_SYSC_BASE + SYSC_REG_EFUSE_CFG);
+}
+
+static unsigned int __init mt7620_get_soc_ver(void)
+{
+ return (mt7620_get_rev() >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK;
+}
+
+static unsigned int __init mt7620_get_soc_eco(void)
+{
+ return (mt7620_get_rev() & CHIP_REV_ECO_MASK);
+}
+
+static const char __init *mt7620_get_soc_name(struct ralink_soc_info *soc_info)
+{
+ if (mt7620_soc_valid()) {
+ u32 bga = mt7620_get_bga();

- if (n0 == MT7620_CHIP_NAME0 && n1 == MT7620_CHIP_NAME1) {
if (bga) {
ralink_soc = MT762X_SOC_MT7620A;
- name = "MT7620A";
soc_info->compatible = "ralink,mt7620a-soc";
+ return "MT7620A";
} else {
ralink_soc = MT762X_SOC_MT7620N;
- name = "MT7620N";
soc_info->compatible = "ralink,mt7620n-soc";
+ return "MT7620N";
}
- } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) {
- u32 efuse = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_EFUSE_CFG);
+ } else if (mt7628_soc_valid()) {
+ u32 efuse = mt7620_get_efuse();
+ unsigned char *name = NULL;

if (efuse & EFUSE_MT7688) {
ralink_soc = MT762X_SOC_MT7688;
@@ -361,15 +403,23 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
name = "MT7628AN";
}
soc_info->compatible = "ralink,mt7628an-soc";
+ return name;
} else {
- panic("mt762x: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
+ panic("mt762x: unknown SoC, n0:%08x n1:%08x\n",
+ mt7620_get_soc_name0(), mt7620_get_soc_name1());
}
+}
+
+void __init prom_soc_init(struct ralink_soc_info *soc_info)
+{
+ const char *name = mt7620_get_soc_name(soc_info);
+ u32 cfg0;
+ u32 pmu0;
+ u32 pmu1;

snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
"MediaTek %s ver:%u eco:%u",
- name,
- (rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
- (rev & CHIP_REV_ECO_MASK));
+ name, mt7620_get_soc_ver(), mt7620_get_soc_eco());

cfg0 = __raw_readl(MT7620_SYSC_BASE + SYSC_REG_SYSTEM_CONFIG0);
if (is_mt76x8()) {
--
2.25.1

2023-02-27 10:59:33

by Sergio Paracuellos

[permalink] [raw]

Subject: [PATCH 12/12] mips: ralink: mt7620: introduce 'soc_device' initialization

MT7620 SoCs have their own 'ralink_soc_info' structure with some
information about the soc itself. In order to be able to retrieve this
information from driver code and avoid architecture dependencies for
retrieving these details introduce this 'soc_device'. Set 'data' pointer
points to the struct 'ralink_soc_info' to be able to export also current
soc information using this mechanism. We need to select 'SOC_BUS' in
Kconfig configuration for these SoCs.

Signed-off-by: Sergio Paracuellos <[email protected]>
---
arch/mips/ralink/Kconfig | 1 +
arch/mips/ralink/mt7620.c | 44 +++++++++++++++++++++++++++++++++++++++
2 files changed, 45 insertions(+)

diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 3e01e2df96b0..088d46f16800 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -44,6 +44,7 @@ choice
bool "MT7620/8"
select CPU_MIPSR2_IRQ_VI
select HAVE_PCI
+ select SOC_BUS

config SOC_MT7621
bool "MT7621"
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
index 8604d91f3375..4435f50b8d24 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -11,6 +11,8 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/bug.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>

#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -49,6 +51,8 @@
/* does the board have sdram or ddram */
static int dram_type;

+static struct ralink_soc_info *soc_info_ptr;
+
static __init u32
mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div)
{
@@ -410,6 +414,44 @@ static const char __init *mt7620_get_soc_name(struct ralink_soc_info *soc_info)
}
}

+static const char __init *mt7620_get_soc_id_name(void)
+{
+ if (ralink_soc == MT762X_SOC_MT7620A)
+ return "mt7620a";
+ else if (ralink_soc == MT762X_SOC_MT7620N)
+ return "mt7620n";
+ else if (ralink_soc == MT762X_SOC_MT7688)
+ return "mt7688";
+ else if (ralink_soc == MT762X_SOC_MT7628AN)
+ return "mt7628n";
+ else
+ return "invalid";
+}
+
+static int __init mt7620_soc_dev_init(void)
+{
+ struct soc_device *soc_dev;
+ struct soc_device_attribute *soc_dev_attr;
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return -ENOMEM;
+
+ soc_dev_attr->family = "Ralink";
+ soc_dev_attr->soc_id = mt7620_get_soc_id_name();
+
+ soc_dev_attr->data = soc_info_ptr;
+
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr);
+ return PTR_ERR(soc_dev);
+ }
+
+ return 0;
+}
+device_initcall(mt7620_soc_dev_init);
+
void __init prom_soc_init(struct ralink_soc_info *soc_info)
{
const char *name = mt7620_get_soc_name(soc_info);
@@ -444,4 +486,6 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
(pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
pr_info("Digital PMU set to %s control\n",
(pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
+
+ soc_info_ptr = soc_info;
}
--
2.25.1

2023-03-14 16:27:24

by Thomas Bogendoerfer

[permalink] [raw]

Subject: Re: [PATCH 00/12] mips: ralink: introduce 'soc_device' initialization

On Mon, Feb 27, 2023 at 11:57:54AM +0100, Sergio Paracuellos wrote:
> This series align old SoCs ralink code with current mt7621 code refactoring
> SoC related information into more readable functions as well as introducing
> 'soc_device' for all of them. This allows to be able to distinc SoC info
> from driver code without using architecture dependent includes.
>
> I am also planning to extract from ralink code current clock related stuff
> into proper clk drivers at some time and be able to distinc SoC in this way
> let me to mark future drivers to be easily marked for COMPILE_TEST target.
>
> Changes have been compile tested for:
> - RT2880
> - RT3883
> - MT7620
>
> Changes have been properly tested in RT5350 SoC based board (ALL5003 board)
> resulting in a working platform.
>
> Thanks in advance for your time.
>
> Best regards,
> Sergio Paracuellos
>
> Sergio Paracuellos (12):
> mips: ralink: rt305x: define RT305X_SYSC_BASE with __iomem
> mips: ralink: rt305x: soc queries and tests as functions
> mips: ralink: rt305x: introduce 'soc_device' initialization
> mips: ralink: rt3883: define RT3883_SYSC_BASE with __iomem
> mips: ralink: rt3883: soc queries and tests as functions
> mips: ralink: rt3883: introduce 'soc_device' initialization
> mips: ralink: rt288x: define RT2880_SYSC_BASE with __iomem
> mips: ralink: rt288x: soc queries and tests as functions
> mips: ralink: rt288x: introduce 'soc_device' initialization
> mips: ralink: mt7620: define MT7620_SYSC_BASE with __iomem
> mips: ralink: mt7620: soc queries and tests as functions
> mips: ralink: mt7620: introduce 'soc_device' initialization
>
> arch/mips/include/asm/mach-ralink/mt7620.h | 3 +-
> arch/mips/include/asm/mach-ralink/rt288x.h | 3 +-
> arch/mips/include/asm/mach-ralink/rt305x.h | 3 +-
> arch/mips/include/asm/mach-ralink/rt3883.h | 4 +-
> arch/mips/ralink/Kconfig | 4 +
> arch/mips/ralink/mt7620.c | 145 ++++++++++++++++----
> arch/mips/ralink/rt288x.c | 94 ++++++++++---
> arch/mips/ralink/rt305x.c | 147 +++++++++++++++++----
> arch/mips/ralink/rt3883.c | 94 ++++++++++---
> 9 files changed, 410 insertions(+), 87 deletions(-)
>
> --
> 2.25.1

series applied to mips-next.

Thomas.

--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]