2023-03-07 15:32:24

by Manivannan Sadhasivam

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Subject: [PATCH 1/2] arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent

The UFS controller on SM8350 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 1c97e28da6ad..1a5a612d4234 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1664,6 +1664,7 @@ ufs_mem_hc: ufshc@1d84000 {
power-domains = <&gcc UFS_PHY_GDSC>;

iommus = <&apps_smmu 0xe0 0x0>;
+ dma-coherent;

clock-names =
"core_clk",
--
2.25.1



2023-03-07 15:32:27

by Manivannan Sadhasivam

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Subject: [PATCH 2/2] arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent

The UFS controller on SM8450 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.

Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 1a744a33bcf4..3ef47b4e9af7 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4003,6 +4003,7 @@ ufs_mem_hc: ufshc@1d84000 {
power-domains = <&gcc UFS_PHY_GDSC>;

iommus = <&apps_smmu 0xe0 0x0>;
+ dma-coherent;

interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
--
2.25.1


2023-03-08 08:11:45

by Neil Armstrong

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Subject: Re: [PATCH 1/2] arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent

On 07/03/2023 16:32, Manivannan Sadhasivam wrote:
> The UFS controller on SM8350 supports cache coherency, hence add the
> "dma-coherent" property to mark it as such.
>
> Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index 1c97e28da6ad..1a5a612d4234 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -1664,6 +1664,7 @@ ufs_mem_hc: ufshc@1d84000 {
> power-domains = <&gcc UFS_PHY_GDSC>;
>
> iommus = <&apps_smmu 0xe0 0x0>;
> + dma-coherent;
>
> clock-names =
> "core_clk",

Reviewed-by: Neil Armstrong <[email protected]>

2023-03-08 08:11:59

by Neil Armstrong

[permalink] [raw]
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent

On 07/03/2023 16:32, Manivannan Sadhasivam wrote:
> The UFS controller on SM8450 supports cache coherency, hence add the
> "dma-coherent" property to mark it as such.
>
> Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
> Signed-off-by: Manivannan Sadhasivam <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 1a744a33bcf4..3ef47b4e9af7 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -4003,6 +4003,7 @@ ufs_mem_hc: ufshc@1d84000 {
> power-domains = <&gcc UFS_PHY_GDSC>;
>
> iommus = <&apps_smmu 0xe0 0x0>;
> + dma-coherent;
>
> interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>,
> <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>;

Reviewed-by: Neil Armstrong <[email protected]>

2023-03-15 23:35:14

by Bjorn Andersson

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Subject: Re: (subset) [PATCH 1/2] arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent

On Tue, 7 Mar 2023 21:02:00 +0530, Manivannan Sadhasivam wrote:
> The UFS controller on SM8350 supports cache coherency, hence add the
> "dma-coherent" property to mark it as such.
>
>

Applied, thanks!

[1/2] arm64: dts: qcom: sm8350: Mark UFS controller as cache coherent
commit: e607b3c1fa0e1579951acd00f9559a77f97d0927
[2/2] arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent
commit: 8ba961d4339c5db0e69ff6627606fe1f34c838e5

Best regards,
--
Bjorn Andersson <[email protected]>