2023-03-20 16:46:07

by Chester Lin

[permalink] [raw]
Subject: [PATCH v2 0/4] pinctrl: s32: driver improvements and generic struct use

Hello,

This patch series contains some improvements for s32 pinctrl drivers suggested
by upstream[1], such as
- Fix error shadowings and improve return value handlings.
- Fix print format.
- Remove unnecessary blanks.
- Use proper macros and helpers to simplify codes.
- Refactor config param parsing and remove config arguments that are never used.
- Use generic struct pingroup and struct pinfunction to describe pin data.

Regards,
Chester

[1] https://lore.kernel.org/all/[email protected]/

Changes in v2:
- Use of_device_get_match_data() to get matched of_device_id data.
- Enhance sizeof() arguments.
- Fix blanks and remove unnecessary parentheses.
- Drop unnecessary marcos and s32_pin_config() implemented in v1 and set/clear
mask/config values transparently.
- Put pull-function related cases together in s32_pin_set_pull().
- Simply use generic 'struct pinfunction' rather than having extra 'struct
s32_pmx_func'.

Chester Lin (4):
pinctrl: s32: use of_device_get_match_data() to get device data
pinctrl: s32: refine error/return/config checks and simplify driver
codes
pinctrl: s32cc: refactor pin config parsing
pinctrl: s32cc: embed generic struct pingroup and pinfunction

drivers/pinctrl/nxp/pinctrl-s32.h | 26 +--
drivers/pinctrl/nxp/pinctrl-s32cc.c | 261 +++++++++++++++-------------
drivers/pinctrl/nxp/pinctrl-s32g2.c | 14 +-
3 files changed, 152 insertions(+), 149 deletions(-)

--
2.37.3



2023-03-20 16:46:24

by Chester Lin

[permalink] [raw]
Subject: [PATCH v2 1/4] pinctrl: s32: use of_device_get_match_data() to get device data

Instead of relying on of_match_device(), using of_device_get_match_data()
can simplify implementation and avoid code duplication.

Signed-off-by: Chester Lin <[email protected]>
---
(An initial version since v2)

drivers/pinctrl/nxp/pinctrl-s32g2.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c
index 5028f4adc389..f99f88615ef6 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32g2.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c
@@ -740,14 +740,12 @@ MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);

static int s32g_pinctrl_probe(struct platform_device *pdev)
{
- const struct of_device_id *of_id =
- of_match_device(s32_pinctrl_of_match, &pdev->dev);
+ struct s32_pinctrl_soc_info *soc_info;

- if (!of_id)
- return -ENODEV;
+ soc_info = (struct s32_pinctrl_soc_info *)
+ of_device_get_match_data(&pdev->dev);

- return s32_pinctrl_probe
- (pdev, (struct s32_pinctrl_soc_info *) of_id->data);
+ return s32_pinctrl_probe(pdev, soc_info);
}

static const struct dev_pm_ops s32g_pinctrl_pm_ops = {
--
2.37.3


2023-03-20 16:46:57

by Chester Lin

[permalink] [raw]
Subject: [PATCH v2 3/4] pinctrl: s32cc: refactor pin config parsing

Move common codes into smaller inline functions and remove some argument
handlings that are not actually used by either S32 MSCR register or generic
config params.

Signed-off-by: Chester Lin <[email protected]>
---
Changes in v2:
- Drop unnecessary marcos and s32_pin_config() implemented in v1 and set/clear
mask/config values transparently.
- Put pull-function related cases together in s32_pin_set_pull().

drivers/pinctrl/nxp/pinctrl-s32cc.c | 62 +++++++++++++++++------------
1 file changed, 36 insertions(+), 26 deletions(-)

diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index f698e1a240ef..cb8a0844c0fa 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -474,11 +474,38 @@ static int s32_get_slew_regval(int arg)
return -EINVAL;
}

-static int s32_get_pin_conf(enum pin_config_param param, u32 arg,
- unsigned int *mask, unsigned int *config)
+static inline void s32_pin_set_pull(enum pin_config_param param,
+ unsigned int *mask, unsigned int *config)
{
+ switch (param) {
+ case PIN_CONFIG_BIAS_DISABLE:
+ case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
+ *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
+ break;
+ case PIN_CONFIG_BIAS_PULL_UP:
+ *config |= S32_MSCR_PUS | S32_MSCR_PUE;
+ break;
+ case PIN_CONFIG_BIAS_PULL_DOWN:
+ *config &= ~S32_MSCR_PUS;
+ *config |= S32_MSCR_PUE;
+ break;
+ default:
+ return;
+ }
+
+ *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
+}
+
+static int s32_parse_pincfg(unsigned long pincfg, unsigned int *mask,
+ unsigned int *config)
+{
+ enum pin_config_param param;
+ u32 arg;
int ret;

+ param = pinconf_to_config_param(pincfg);
+ arg = pinconf_to_config_argument(pincfg);
+
switch (param) {
/* All pins are persistent over suspend */
case PIN_CONFIG_PERSIST_STATE:
@@ -488,17 +515,11 @@ static int s32_get_pin_conf(enum pin_config_param param, u32 arg,
*mask |= S32_MSCR_ODE;
break;
case PIN_CONFIG_OUTPUT_ENABLE:
- if (arg)
- *config |= S32_MSCR_OBE;
- else
- *config &= ~S32_MSCR_OBE;
+ *config |= S32_MSCR_OBE;
*mask |= S32_MSCR_OBE;
break;
case PIN_CONFIG_INPUT_ENABLE:
- if (arg)
- *config |= S32_MSCR_IBE;
- else
- *config &= ~S32_MSCR_IBE;
+ *config |= S32_MSCR_IBE;
*mask |= S32_MSCR_IBE;
break;
case PIN_CONFIG_SLEW_RATE:
@@ -509,25 +530,16 @@ static int s32_get_pin_conf(enum pin_config_param param, u32 arg,
*mask |= S32_MSCR_SRE(~0);
break;
case PIN_CONFIG_BIAS_PULL_UP:
- if (arg)
- *config |= S32_MSCR_PUS;
- else
- *config &= ~S32_MSCR_PUS;
- fallthrough;
case PIN_CONFIG_BIAS_PULL_DOWN:
- if (arg)
- *config |= S32_MSCR_PUE;
- else
- *config &= ~S32_MSCR_PUE;
- *mask |= S32_MSCR_PUE | S32_MSCR_PUS;
+ s32_pin_set_pull(param, mask, config);
break;
case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
*config &= ~(S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE);
*mask |= S32_MSCR_ODE | S32_MSCR_OBE | S32_MSCR_IBE;
- fallthrough;
+ s32_pin_set_pull(param, mask, config);
+ break;
case PIN_CONFIG_BIAS_DISABLE:
- *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
- *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
+ s32_pin_set_pull(param, mask, config);
break;
default:
return -EOPNOTSUPP;
@@ -553,9 +565,7 @@ static int s32_pinconf_mscr_update(struct pinctrl_dev *pctldev,
pin_get_name(pctldev, pin_id), num_configs);

for (i = 0; i < num_configs; i++) {
- ret = s32_get_pin_conf(pinconf_to_config_param(configs[i]),
- pinconf_to_config_argument(configs[i]),
- &mask, &config);
+ ret = s32_parse_pincfg(configs[i], &mask, &config);
if (ret)
return ret;
}
--
2.37.3


2023-03-20 16:47:28

by Chester Lin

[permalink] [raw]
Subject: [PATCH v2 4/4] pinctrl: s32cc: embed generic struct pingroup and pinfunction

Use generic data structure to describe pin control functions and groups in
S32 SoC family and drop duplicated struct members.

Signed-off-by: Chester Lin <[email protected]>
---
Changes in v2:
- Simply use generic 'struct pinfunction' rather than having extra 'struct
s32_pmx_func'.

drivers/pinctrl/nxp/pinctrl-s32.h | 26 ++--------
drivers/pinctrl/nxp/pinctrl-s32cc.c | 76 +++++++++++++++--------------
2 files changed, 45 insertions(+), 57 deletions(-)

diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h
index 545bf16b988d..2f7aecd462e4 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32.h
+++ b/drivers/pinctrl/nxp/pinctrl-s32.h
@@ -15,31 +15,15 @@ struct platform_device;

/**
* struct s32_pin_group - describes an S32 pin group
- * @name: the name of this specific pin group
- * @npins: the number of pins in this group array, i.e. the number of
- * elements in pin_ids and pin_sss so we can iterate over that array
- * @pin_ids: an array of pin IDs in this group
- * @pin_sss: an array of source signal select configs paired with pin_ids
+ * @data: generic data describes group name, number of pins, and a pin array in
+ this group.
+ * @pin_sss: an array of source signal select configs paired with pin array.
*/
struct s32_pin_group {
- const char *name;
- unsigned int npins;
- unsigned int *pin_ids;
+ struct pingroup data;
unsigned int *pin_sss;
};

-/**
- * struct s32_pmx_func - describes S32 pinmux functions
- * @name: the name of this specific function
- * @groups: corresponding pin groups
- * @num_groups: the number of groups
- */
-struct s32_pmx_func {
- const char *name;
- const char **groups;
- unsigned int num_groups;
-};
-
/**
* struct s32_pin_range - pin ID range for each memory region.
* @start: start pin ID
@@ -56,7 +40,7 @@ struct s32_pinctrl_soc_info {
unsigned int npins;
struct s32_pin_group *groups;
unsigned int ngroups;
- struct s32_pmx_func *functions;
+ struct pinfunction *functions;
unsigned int nfunctions;
unsigned int grp_index;
const struct s32_pin_range *mem_pin_ranges;
diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index cb8a0844c0fa..4ed0cc905232 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -188,7 +188,7 @@ static const char *s32_get_group_name(struct pinctrl_dev *pctldev,
struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
const struct s32_pinctrl_soc_info *info = ipctl->info;

- return info->groups[selector].name;
+ return info->groups[selector].data.name;
}

static int s32_get_group_pins(struct pinctrl_dev *pctldev,
@@ -198,8 +198,8 @@ static int s32_get_group_pins(struct pinctrl_dev *pctldev,
struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
const struct s32_pinctrl_soc_info *info = ipctl->info;

- *pins = info->groups[selector].pin_ids;
- *npins = info->groups[selector].npins;
+ *pins = info->groups[selector].data.pins;
+ *npins = info->groups[selector].data.npins;

return 0;
}
@@ -314,23 +314,23 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
grp = &info->groups[group];

dev_dbg(ipctl->dev, "set mux for function %s group %s\n",
- info->functions[selector].name, grp->name);
+ info->functions[selector].name, grp->data.name);

/* Check beforehand so we don't have a partial config. */
- for (i = 0; i < grp->npins; i++) {
- if (s32_check_pin(pctldev, grp->pin_ids[i]) != 0) {
+ for (i = 0; i < grp->data.npins; i++) {
+ if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
dev_err(info->dev, "invalid pin: %u in group: %u\n",
- grp->pin_ids[i], group);
+ grp->data.pins[i], group);
return -EINVAL;
}
}

- for (i = 0, ret = 0; i < grp->npins && !ret; i++) {
- ret = s32_regmap_update(pctldev, grp->pin_ids[i],
+ for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {
+ ret = s32_regmap_update(pctldev, grp->data.pins[i],
S32_MSCR_SSS_MASK, grp->pin_sss[i]);
if (ret) {
dev_err(info->dev, "Failed to set pin %u\n",
- grp->pin_ids[i]);
+ grp->data.pins[i]);
return ret;
}
}
@@ -364,7 +364,7 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
const struct s32_pinctrl_soc_info *info = ipctl->info;

*groups = info->functions[selector].groups;
- *num_groups = info->functions[selector].num_groups;
+ *num_groups = info->functions[selector].ngroups;

return 0;
}
@@ -602,8 +602,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
int i, ret;

grp = &info->groups[selector];
- for (i = 0; i < grp->npins; i++) {
- ret = s32_pinconf_mscr_update(pctldev, grp->pin_ids[i],
+ for (i = 0; i < grp->data.npins; i++) {
+ ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
configs, num_configs);
if (ret)
return ret;
@@ -637,9 +637,9 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,

seq_puts(s, "\n");
grp = &info->groups[selector];
- for (i = 0; i < grp->npins; i++) {
- name = pin_get_name(pctldev, grp->pin_ids[i]);
- ret = s32_regmap_read(pctldev, grp->pin_ids[i], &config);
+ for (i = 0; i < grp->data.npins; i++) {
+ name = pin_get_name(pctldev, grp->data.pins[i]);
+ ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
if (ret)
return;
seq_printf(s, "%s: 0x%x\n", name, config);
@@ -732,6 +732,7 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
const __be32 *p;
struct device *dev;
struct property *prop;
+ unsigned int *pins, *sss;
int i, npins;
u32 pinmux;

@@ -740,38 +741,38 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
dev_dbg(dev, "group: %pOFn\n", np);

/* Initialise group */
- grp->name = np->name;
+ grp->data.name = np->name;

npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
if (npins < 0) {
dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
- grp->name);
+ grp->data.name);
return -EINVAL;
}
if (!npins) {
- dev_err(dev, "The group %s has no pins.\n", grp->name);
+ dev_err(dev, "The group %s has no pins.\n", grp->data.name);
return -EINVAL;
}

- grp->npins = npins;
+ grp->data.npins = npins;

- grp->pin_ids = devm_kcalloc(info->dev, grp->npins,
- sizeof(unsigned int), GFP_KERNEL);
- grp->pin_sss = devm_kcalloc(info->dev, grp->npins,
- sizeof(unsigned int), GFP_KERNEL);
- if (!grp->pin_ids || !grp->pin_sss)
+ pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);
+ sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);
+ if (!pins || !sss)
return -ENOMEM;

i = 0;
of_property_for_each_u32(np, "pinmux", prop, p, pinmux) {
- grp->pin_ids[i] = get_pin_no(pinmux);
- grp->pin_sss[i] = get_pin_func(pinmux);
+ pins[i] = get_pin_no(pinmux);
+ sss[i] = get_pin_func(pinmux);

- dev_dbg(info->dev, "pin-id: 0x%x, sss: 0x%x",
- grp->pin_ids[i], grp->pin_sss[i]);
+ dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);
i++;
}

+ grp->data.pins = pins;
+ grp->pin_sss = sss;
+
return 0;
}

@@ -780,8 +781,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
u32 index)
{
struct device_node *child;
- struct s32_pmx_func *func;
+ struct pinfunction *func;
struct s32_pin_group *grp;
+ char **groups;
u32 i = 0;
int ret = 0;

@@ -791,18 +793,18 @@ static int s32_pinctrl_parse_functions(struct device_node *np,

/* Initialise function */
func->name = np->name;
- func->num_groups = of_get_child_count(np);
- if (func->num_groups == 0) {
+ func->ngroups = of_get_child_count(np);
+ if (func->ngroups == 0) {
dev_err(info->dev, "no groups defined in %pOF\n", np);
return -EINVAL;
}
- func->groups = devm_kcalloc(info->dev, func->num_groups,
- sizeof(*func->groups), GFP_KERNEL);
- if (!func->groups)
+ groups = devm_kcalloc(info->dev, func->ngroups,
+ sizeof(*func->groups), GFP_KERNEL);
+ if (!groups)
return -ENOMEM;

for_each_child_of_node(np, child) {
- func->groups[i] = child->name;
+ groups[i] = (char *)child->name;
grp = &info->groups[info->grp_index++];
ret = s32_pinctrl_parse_groups(child, grp, info);
if (ret)
@@ -810,6 +812,8 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
i++;
}

+ func->groups = (const char **)groups;
+
return 0;
}

--
2.37.3


2023-03-20 17:07:09

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v2 1/4] pinctrl: s32: use of_device_get_match_data() to get device data

On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
>
> Instead of relying on of_match_device(), using of_device_get_match_data()
> can simplify implementation and avoid code duplication.

Suggested-by?

> Signed-off-by: Chester Lin <[email protected]>

...

> + soc_info = (struct s32_pinctrl_soc_info *)
> + of_device_get_match_data(&pdev->dev);

Drop the ugly casting, it's not needed.

--
With Best Regards,
Andy Shevchenko

2023-03-20 17:13:12

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v2 3/4] pinctrl: s32cc: refactor pin config parsing

On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
>
> Move common codes into smaller inline functions and remove some argument
> handlings that are not actually used by either S32 MSCR register or generic
> config params.

...

> case PIN_CONFIG_OUTPUT_ENABLE:
> - if (arg)
> - *config |= S32_MSCR_OBE;
> - else
> - *config &= ~S32_MSCR_OBE;
> + *config |= S32_MSCR_OBE;
> *mask |= S32_MSCR_OBE;
> break;
> case PIN_CONFIG_INPUT_ENABLE:
> - if (arg)
> - *config |= S32_MSCR_IBE;
> - else
> - *config &= ~S32_MSCR_IBE;
> + *config |= S32_MSCR_IBE;
> *mask |= S32_MSCR_IBE;
> break;

Isn't it a regression here?
Otherwise needs an explicit explanation in the commit message on
what's going on here and why it's not a regression.

...

> case PIN_CONFIG_BIAS_DISABLE:
> - *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
> - *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
> + s32_pin_set_pull(param, mask, config);
> break;

This now can be unified with PU and PD cases above.

--
With Best Regards,
Andy Shevchenko

2023-03-20 17:16:51

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v2 4/4] pinctrl: s32cc: embed generic struct pingroup and pinfunction

On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
>
> Use generic data structure to describe pin control functions and groups in
> S32 SoC family and drop duplicated struct members.

Not sure about the need of the casting, see below, otherwise LGTM.
Reviewed-by: Andy Shevchenko <[email protected]>

> Signed-off-by: Chester Lin <[email protected]>
> ---
> Changes in v2:
> - Simply use generic 'struct pinfunction' rather than having extra 'struct
> s32_pmx_func'.
>
> drivers/pinctrl/nxp/pinctrl-s32.h | 26 ++--------
> drivers/pinctrl/nxp/pinctrl-s32cc.c | 76 +++++++++++++++--------------
> 2 files changed, 45 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h
> index 545bf16b988d..2f7aecd462e4 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32.h
> +++ b/drivers/pinctrl/nxp/pinctrl-s32.h
> @@ -15,31 +15,15 @@ struct platform_device;
>
> /**
> * struct s32_pin_group - describes an S32 pin group
> - * @name: the name of this specific pin group
> - * @npins: the number of pins in this group array, i.e. the number of
> - * elements in pin_ids and pin_sss so we can iterate over that array
> - * @pin_ids: an array of pin IDs in this group
> - * @pin_sss: an array of source signal select configs paired with pin_ids
> + * @data: generic data describes group name, number of pins, and a pin array in
> + this group.
> + * @pin_sss: an array of source signal select configs paired with pin array.
> */
> struct s32_pin_group {
> - const char *name;
> - unsigned int npins;
> - unsigned int *pin_ids;
> + struct pingroup data;
> unsigned int *pin_sss;
> };
>
> -/**
> - * struct s32_pmx_func - describes S32 pinmux functions
> - * @name: the name of this specific function
> - * @groups: corresponding pin groups
> - * @num_groups: the number of groups
> - */
> -struct s32_pmx_func {
> - const char *name;
> - const char **groups;
> - unsigned int num_groups;
> -};
> -
> /**
> * struct s32_pin_range - pin ID range for each memory region.
> * @start: start pin ID
> @@ -56,7 +40,7 @@ struct s32_pinctrl_soc_info {
> unsigned int npins;
> struct s32_pin_group *groups;
> unsigned int ngroups;
> - struct s32_pmx_func *functions;
> + struct pinfunction *functions;
> unsigned int nfunctions;
> unsigned int grp_index;
> const struct s32_pin_range *mem_pin_ranges;
> diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> index cb8a0844c0fa..4ed0cc905232 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
> +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> @@ -188,7 +188,7 @@ static const char *s32_get_group_name(struct pinctrl_dev *pctldev,
> struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> const struct s32_pinctrl_soc_info *info = ipctl->info;
>
> - return info->groups[selector].name;
> + return info->groups[selector].data.name;
> }
>
> static int s32_get_group_pins(struct pinctrl_dev *pctldev,
> @@ -198,8 +198,8 @@ static int s32_get_group_pins(struct pinctrl_dev *pctldev,
> struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> const struct s32_pinctrl_soc_info *info = ipctl->info;
>
> - *pins = info->groups[selector].pin_ids;
> - *npins = info->groups[selector].npins;
> + *pins = info->groups[selector].data.pins;
> + *npins = info->groups[selector].data.npins;
>
> return 0;
> }
> @@ -314,23 +314,23 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
> grp = &info->groups[group];
>
> dev_dbg(ipctl->dev, "set mux for function %s group %s\n",
> - info->functions[selector].name, grp->name);
> + info->functions[selector].name, grp->data.name);
>
> /* Check beforehand so we don't have a partial config. */
> - for (i = 0; i < grp->npins; i++) {
> - if (s32_check_pin(pctldev, grp->pin_ids[i]) != 0) {
> + for (i = 0; i < grp->data.npins; i++) {
> + if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
> dev_err(info->dev, "invalid pin: %u in group: %u\n",
> - grp->pin_ids[i], group);
> + grp->data.pins[i], group);
> return -EINVAL;
> }
> }
>
> - for (i = 0, ret = 0; i < grp->npins && !ret; i++) {
> - ret = s32_regmap_update(pctldev, grp->pin_ids[i],
> + for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {
> + ret = s32_regmap_update(pctldev, grp->data.pins[i],
> S32_MSCR_SSS_MASK, grp->pin_sss[i]);
> if (ret) {
> dev_err(info->dev, "Failed to set pin %u\n",
> - grp->pin_ids[i]);
> + grp->data.pins[i]);
> return ret;
> }
> }
> @@ -364,7 +364,7 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
> const struct s32_pinctrl_soc_info *info = ipctl->info;
>
> *groups = info->functions[selector].groups;
> - *num_groups = info->functions[selector].num_groups;
> + *num_groups = info->functions[selector].ngroups;
>
> return 0;
> }
> @@ -602,8 +602,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
> int i, ret;
>
> grp = &info->groups[selector];
> - for (i = 0; i < grp->npins; i++) {
> - ret = s32_pinconf_mscr_update(pctldev, grp->pin_ids[i],
> + for (i = 0; i < grp->data.npins; i++) {
> + ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
> configs, num_configs);
> if (ret)
> return ret;
> @@ -637,9 +637,9 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
>
> seq_puts(s, "\n");
> grp = &info->groups[selector];
> - for (i = 0; i < grp->npins; i++) {
> - name = pin_get_name(pctldev, grp->pin_ids[i]);
> - ret = s32_regmap_read(pctldev, grp->pin_ids[i], &config);
> + for (i = 0; i < grp->data.npins; i++) {
> + name = pin_get_name(pctldev, grp->data.pins[i]);
> + ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
> if (ret)
> return;
> seq_printf(s, "%s: 0x%x\n", name, config);
> @@ -732,6 +732,7 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
> const __be32 *p;
> struct device *dev;
> struct property *prop;
> + unsigned int *pins, *sss;
> int i, npins;
> u32 pinmux;
>
> @@ -740,38 +741,38 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
> dev_dbg(dev, "group: %pOFn\n", np);
>
> /* Initialise group */
> - grp->name = np->name;
> + grp->data.name = np->name;
>
> npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
> if (npins < 0) {
> dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
> - grp->name);
> + grp->data.name);
> return -EINVAL;
> }
> if (!npins) {
> - dev_err(dev, "The group %s has no pins.\n", grp->name);
> + dev_err(dev, "The group %s has no pins.\n", grp->data.name);
> return -EINVAL;
> }
>
> - grp->npins = npins;
> + grp->data.npins = npins;
>
> - grp->pin_ids = devm_kcalloc(info->dev, grp->npins,
> - sizeof(unsigned int), GFP_KERNEL);
> - grp->pin_sss = devm_kcalloc(info->dev, grp->npins,
> - sizeof(unsigned int), GFP_KERNEL);
> - if (!grp->pin_ids || !grp->pin_sss)
> + pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);
> + sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);
> + if (!pins || !sss)
> return -ENOMEM;
>
> i = 0;
> of_property_for_each_u32(np, "pinmux", prop, p, pinmux) {
> - grp->pin_ids[i] = get_pin_no(pinmux);
> - grp->pin_sss[i] = get_pin_func(pinmux);
> + pins[i] = get_pin_no(pinmux);
> + sss[i] = get_pin_func(pinmux);
>
> - dev_dbg(info->dev, "pin-id: 0x%x, sss: 0x%x",
> - grp->pin_ids[i], grp->pin_sss[i]);
> + dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);
> i++;
> }
>
> + grp->data.pins = pins;
> + grp->pin_sss = sss;
> +
> return 0;
> }
>
> @@ -780,8 +781,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
> u32 index)
> {
> struct device_node *child;
> - struct s32_pmx_func *func;
> + struct pinfunction *func;
> struct s32_pin_group *grp;
> + char **groups;
> u32 i = 0;
> int ret = 0;
>
> @@ -791,18 +793,18 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
>
> /* Initialise function */
> func->name = np->name;
> - func->num_groups = of_get_child_count(np);
> - if (func->num_groups == 0) {
> + func->ngroups = of_get_child_count(np);
> + if (func->ngroups == 0) {
> dev_err(info->dev, "no groups defined in %pOF\n", np);
> return -EINVAL;
> }
> - func->groups = devm_kcalloc(info->dev, func->num_groups,
> - sizeof(*func->groups), GFP_KERNEL);
> - if (!func->groups)
> + groups = devm_kcalloc(info->dev, func->ngroups,
> + sizeof(*func->groups), GFP_KERNEL);
> + if (!groups)
> return -ENOMEM;
>
> for_each_child_of_node(np, child) {
> - func->groups[i] = child->name;
> + groups[i] = (char *)child->name;
> grp = &info->groups[info->grp_index++];
> ret = s32_pinctrl_parse_groups(child, grp, info);
> if (ret)
> @@ -810,6 +812,8 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
> i++;
> }
>
> + func->groups = (const char **)groups;

Hmm... Why is casting needed?

> return 0;
> }

--
With Best Regards,
Andy Shevchenko

2023-03-21 04:44:47

by Chester Lin

[permalink] [raw]
Subject: Re: [PATCH v2 1/4] pinctrl: s32: use of_device_get_match_data() to get device data

Hi Andy,

Thank you for reviewing this series!

On Mon, Mar 20, 2023 at 06:59:41PM +0200, Andy Shevchenko wrote:
> On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
> >
> > Instead of relying on of_match_device(), using of_device_get_match_data()
> > can simplify implementation and avoid code duplication.
>
> Suggested-by?
>

Sorry for the miss. I will fix it in v3.

> > Signed-off-by: Chester Lin <[email protected]>
>
> ...
>
> > + soc_info = (struct s32_pinctrl_soc_info *)
> > + of_device_get_match_data(&pdev->dev);
>
> Drop the ugly casting, it's not needed.
>

Actually it's used for suppressing the compiler warning since some members in
this soc_info need to be filled by pinctrl-s32cc.

drivers/pinctrl/nxp/pinctrl-s32g2.c:745:18: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]


I am thinking of allocating & copying a dedicate struct in pinctrl-s32cc.c rather
than reusing the .data attached on of_device_id in order to solve this warning
properly. Here is an example based on this v2:

diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h
index 2f7aecd462e4..f3a0b579757c 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32.h
+++ b/drivers/pinctrl/nxp/pinctrl-s32.h
@@ -51,7 +51,7 @@ struct s32_pinctrl_soc_info {
#define S32_PIN_RANGE(_start, _end) { .start = _start, .end = _end }

int s32_pinctrl_probe(struct platform_device *pdev,
- struct s32_pinctrl_soc_info *info);
+ const struct s32_pinctrl_soc_info *soc_data);
int s32_pinctrl_resume(struct device *dev);
int s32_pinctrl_suspend(struct device *dev);
#endif /* __DRIVERS_PINCTRL_S32_H */
diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index 4ed0cc905232..4c70ab753d15 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -899,20 +899,28 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
}

int s32_pinctrl_probe(struct platform_device *pdev,
- struct s32_pinctrl_soc_info *info)
+ const struct s32_pinctrl_soc_info *soc_data)
{
struct s32_pinctrl *ipctl;
int ret;
struct pinctrl_desc *s32_pinctrl_desc;
+ struct s32_pinctrl_soc_info *info;
#ifdef CONFIG_PM_SLEEP
struct s32_pinctrl_context *saved_context;
#endif

- if (!info || !info->pins || !info->npins) {
+ if (!soc_data || !soc_data->pins || !soc_data->npins) {
dev_err(&pdev->dev, "wrong pinctrl info\n");
return -EINVAL;
}

+
+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
+ memcpy(info, soc_data, sizeof(*info));
+
info->dev = &pdev->dev;

/* Create state holders etc for this driver */
diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c
index 9f521312f768..0a49205414eb 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32g2.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c
@@ -740,10 +740,9 @@ MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);

static int s32g_pinctrl_probe(struct platform_device *pdev)
{
- struct s32_pinctrl_soc_info *soc_info;
+ const struct s32_pinctrl_soc_info *soc_info;

- soc_info = (struct s32_pinctrl_soc_info *)
- of_device_get_match_data(&pdev->dev);
+ soc_info = of_device_get_match_data(&pdev->dev);

return s32_pinctrl_probe(pdev, soc_info);
}

> --
> With Best Regards,
> Andy Shevchenko

2023-03-21 05:03:31

by Chester Lin

[permalink] [raw]
Subject: Re: [PATCH v2 3/4] pinctrl: s32cc: refactor pin config parsing

On Mon, Mar 20, 2023 at 07:06:53PM +0200, Andy Shevchenko wrote:
> On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
> >
> > Move common codes into smaller inline functions and remove some argument
> > handlings that are not actually used by either S32 MSCR register or generic
> > config params.
>
> ...
>
> > case PIN_CONFIG_OUTPUT_ENABLE:
> > - if (arg)
> > - *config |= S32_MSCR_OBE;
> > - else
> > - *config &= ~S32_MSCR_OBE;
> > + *config |= S32_MSCR_OBE;
> > *mask |= S32_MSCR_OBE;
> > break;
> > case PIN_CONFIG_INPUT_ENABLE:
> > - if (arg)
> > - *config |= S32_MSCR_IBE;
> > - else
> > - *config &= ~S32_MSCR_IBE;
> > + *config |= S32_MSCR_IBE;
> > *mask |= S32_MSCR_IBE;
> > break;
>
> Isn't it a regression here?
> Otherwise needs an explicit explanation in the commit message on
> what's going on here and why it's not a regression.

Oops, it's wrong implementation. The argument checks of OUTPUT_EN and INPUT_EN
shouldn't be dropped. Thanks for the reminder and I will fix it.

Regards,
Chester

>
> ...
>
> > case PIN_CONFIG_BIAS_DISABLE:
> > - *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
> > - *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
> > + s32_pin_set_pull(param, mask, config);
> > break;
>
> This now can be unified with PU and PD cases above.
>
> --
> With Best Regards,
> Andy Shevchenko

2023-03-21 05:11:08

by Chester Lin

[permalink] [raw]
Subject: Re: [PATCH v2 4/4] pinctrl: s32cc: embed generic struct pingroup and pinfunction

On Mon, Mar 20, 2023 at 07:10:40PM +0200, Andy Shevchenko wrote:
> On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:
> >
> > Use generic data structure to describe pin control functions and groups in
> > S32 SoC family and drop duplicated struct members.
>
> Not sure about the need of the casting, see below, otherwise LGTM.
> Reviewed-by: Andy Shevchenko <[email protected]>
>
> > Signed-off-by: Chester Lin <[email protected]>
> > ---
> > Changes in v2:
> > - Simply use generic 'struct pinfunction' rather than having extra 'struct
> > s32_pmx_func'.
> >
> > drivers/pinctrl/nxp/pinctrl-s32.h | 26 ++--------
> > drivers/pinctrl/nxp/pinctrl-s32cc.c | 76 +++++++++++++++--------------
> > 2 files changed, 45 insertions(+), 57 deletions(-)
> >
> > diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h
> > index 545bf16b988d..2f7aecd462e4 100644
> > --- a/drivers/pinctrl/nxp/pinctrl-s32.h
> > +++ b/drivers/pinctrl/nxp/pinctrl-s32.h
> > @@ -15,31 +15,15 @@ struct platform_device;
> >
> > /**
> > * struct s32_pin_group - describes an S32 pin group
> > - * @name: the name of this specific pin group
> > - * @npins: the number of pins in this group array, i.e. the number of
> > - * elements in pin_ids and pin_sss so we can iterate over that array
> > - * @pin_ids: an array of pin IDs in this group
> > - * @pin_sss: an array of source signal select configs paired with pin_ids
> > + * @data: generic data describes group name, number of pins, and a pin array in
> > + this group.
> > + * @pin_sss: an array of source signal select configs paired with pin array.
> > */
> > struct s32_pin_group {
> > - const char *name;
> > - unsigned int npins;
> > - unsigned int *pin_ids;
> > + struct pingroup data;
> > unsigned int *pin_sss;
> > };
> >
> > -/**
> > - * struct s32_pmx_func - describes S32 pinmux functions
> > - * @name: the name of this specific function
> > - * @groups: corresponding pin groups
> > - * @num_groups: the number of groups
> > - */
> > -struct s32_pmx_func {
> > - const char *name;
> > - const char **groups;
> > - unsigned int num_groups;
> > -};
> > -
> > /**
> > * struct s32_pin_range - pin ID range for each memory region.
> > * @start: start pin ID
> > @@ -56,7 +40,7 @@ struct s32_pinctrl_soc_info {
> > unsigned int npins;
> > struct s32_pin_group *groups;
> > unsigned int ngroups;
> > - struct s32_pmx_func *functions;
> > + struct pinfunction *functions;
> > unsigned int nfunctions;
> > unsigned int grp_index;
> > const struct s32_pin_range *mem_pin_ranges;
> > diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> > index cb8a0844c0fa..4ed0cc905232 100644
> > --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
> > +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
> > @@ -188,7 +188,7 @@ static const char *s32_get_group_name(struct pinctrl_dev *pctldev,
> > struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> > const struct s32_pinctrl_soc_info *info = ipctl->info;
> >
> > - return info->groups[selector].name;
> > + return info->groups[selector].data.name;
> > }
> >
> > static int s32_get_group_pins(struct pinctrl_dev *pctldev,
> > @@ -198,8 +198,8 @@ static int s32_get_group_pins(struct pinctrl_dev *pctldev,
> > struct s32_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
> > const struct s32_pinctrl_soc_info *info = ipctl->info;
> >
> > - *pins = info->groups[selector].pin_ids;
> > - *npins = info->groups[selector].npins;
> > + *pins = info->groups[selector].data.pins;
> > + *npins = info->groups[selector].data.npins;
> >
> > return 0;
> > }
> > @@ -314,23 +314,23 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
> > grp = &info->groups[group];
> >
> > dev_dbg(ipctl->dev, "set mux for function %s group %s\n",
> > - info->functions[selector].name, grp->name);
> > + info->functions[selector].name, grp->data.name);
> >
> > /* Check beforehand so we don't have a partial config. */
> > - for (i = 0; i < grp->npins; i++) {
> > - if (s32_check_pin(pctldev, grp->pin_ids[i]) != 0) {
> > + for (i = 0; i < grp->data.npins; i++) {
> > + if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
> > dev_err(info->dev, "invalid pin: %u in group: %u\n",
> > - grp->pin_ids[i], group);
> > + grp->data.pins[i], group);
> > return -EINVAL;
> > }
> > }
> >
> > - for (i = 0, ret = 0; i < grp->npins && !ret; i++) {
> > - ret = s32_regmap_update(pctldev, grp->pin_ids[i],
> > + for (i = 0, ret = 0; i < grp->data.npins && !ret; i++) {
> > + ret = s32_regmap_update(pctldev, grp->data.pins[i],
> > S32_MSCR_SSS_MASK, grp->pin_sss[i]);
> > if (ret) {
> > dev_err(info->dev, "Failed to set pin %u\n",
> > - grp->pin_ids[i]);
> > + grp->data.pins[i]);
> > return ret;
> > }
> > }
> > @@ -364,7 +364,7 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctldev,
> > const struct s32_pinctrl_soc_info *info = ipctl->info;
> >
> > *groups = info->functions[selector].groups;
> > - *num_groups = info->functions[selector].num_groups;
> > + *num_groups = info->functions[selector].ngroups;
> >
> > return 0;
> > }
> > @@ -602,8 +602,8 @@ static int s32_pconf_group_set(struct pinctrl_dev *pctldev, unsigned int selecto
> > int i, ret;
> >
> > grp = &info->groups[selector];
> > - for (i = 0; i < grp->npins; i++) {
> > - ret = s32_pinconf_mscr_update(pctldev, grp->pin_ids[i],
> > + for (i = 0; i < grp->data.npins; i++) {
> > + ret = s32_pinconf_mscr_update(pctldev, grp->data.pins[i],
> > configs, num_configs);
> > if (ret)
> > return ret;
> > @@ -637,9 +637,9 @@ static void s32_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
> >
> > seq_puts(s, "\n");
> > grp = &info->groups[selector];
> > - for (i = 0; i < grp->npins; i++) {
> > - name = pin_get_name(pctldev, grp->pin_ids[i]);
> > - ret = s32_regmap_read(pctldev, grp->pin_ids[i], &config);
> > + for (i = 0; i < grp->data.npins; i++) {
> > + name = pin_get_name(pctldev, grp->data.pins[i]);
> > + ret = s32_regmap_read(pctldev, grp->data.pins[i], &config);
> > if (ret)
> > return;
> > seq_printf(s, "%s: 0x%x\n", name, config);
> > @@ -732,6 +732,7 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
> > const __be32 *p;
> > struct device *dev;
> > struct property *prop;
> > + unsigned int *pins, *sss;
> > int i, npins;
> > u32 pinmux;
> >
> > @@ -740,38 +741,38 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
> > dev_dbg(dev, "group: %pOFn\n", np);
> >
> > /* Initialise group */
> > - grp->name = np->name;
> > + grp->data.name = np->name;
> >
> > npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
> > if (npins < 0) {
> > dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
> > - grp->name);
> > + grp->data.name);
> > return -EINVAL;
> > }
> > if (!npins) {
> > - dev_err(dev, "The group %s has no pins.\n", grp->name);
> > + dev_err(dev, "The group %s has no pins.\n", grp->data.name);
> > return -EINVAL;
> > }
> >
> > - grp->npins = npins;
> > + grp->data.npins = npins;
> >
> > - grp->pin_ids = devm_kcalloc(info->dev, grp->npins,
> > - sizeof(unsigned int), GFP_KERNEL);
> > - grp->pin_sss = devm_kcalloc(info->dev, grp->npins,
> > - sizeof(unsigned int), GFP_KERNEL);
> > - if (!grp->pin_ids || !grp->pin_sss)
> > + pins = devm_kcalloc(info->dev, npins, sizeof(*pins), GFP_KERNEL);
> > + sss = devm_kcalloc(info->dev, npins, sizeof(*sss), GFP_KERNEL);
> > + if (!pins || !sss)
> > return -ENOMEM;
> >
> > i = 0;
> > of_property_for_each_u32(np, "pinmux", prop, p, pinmux) {
> > - grp->pin_ids[i] = get_pin_no(pinmux);
> > - grp->pin_sss[i] = get_pin_func(pinmux);
> > + pins[i] = get_pin_no(pinmux);
> > + sss[i] = get_pin_func(pinmux);
> >
> > - dev_dbg(info->dev, "pin-id: 0x%x, sss: 0x%x",
> > - grp->pin_ids[i], grp->pin_sss[i]);
> > + dev_dbg(info->dev, "pin: 0x%x, sss: 0x%x", pins[i], sss[i]);
> > i++;
> > }
> >
> > + grp->data.pins = pins;
> > + grp->pin_sss = sss;
> > +
> > return 0;
> > }
> >
> > @@ -780,8 +781,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
> > u32 index)
> > {
> > struct device_node *child;
> > - struct s32_pmx_func *func;
> > + struct pinfunction *func;
> > struct s32_pin_group *grp;
> > + char **groups;
> > u32 i = 0;
> > int ret = 0;
> >
> > @@ -791,18 +793,18 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
> >
> > /* Initialise function */
> > func->name = np->name;
> > - func->num_groups = of_get_child_count(np);
> > - if (func->num_groups == 0) {
> > + func->ngroups = of_get_child_count(np);
> > + if (func->ngroups == 0) {
> > dev_err(info->dev, "no groups defined in %pOF\n", np);
> > return -EINVAL;
> > }
> > - func->groups = devm_kcalloc(info->dev, func->num_groups,
> > - sizeof(*func->groups), GFP_KERNEL);
> > - if (!func->groups)
> > + groups = devm_kcalloc(info->dev, func->ngroups,
> > + sizeof(*func->groups), GFP_KERNEL);
> > + if (!groups)
> > return -ENOMEM;
> >
> > for_each_child_of_node(np, child) {
> > - func->groups[i] = child->name;
> > + groups[i] = (char *)child->name;
> > grp = &info->groups[info->grp_index++];
> > ret = s32_pinctrl_parse_groups(child, grp, info);
> > if (ret)
> > @@ -810,6 +812,8 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
> > i++;
> > }
> >
> > + func->groups = (const char **)groups;
>
> Hmm... Why is casting needed?

It's used for fulfilling the type checking done by kbuild otherwise an error will occur:

drivers/pinctrl/nxp/pinctrl-s32cc.c:815:22: error: assignment to 'const char * const*' from incompatible pointer type 'char **' [-Werror=incompatible-pointer-types]

In 'struct pinfunction', the member 'groups' is declared as (const char * const *).

Regards,
Chester

>
> > return 0;
> > }
>
> --
> With Best Regards,
> Andy Shevchenko

2023-03-21 07:33:17

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v2 1/4] pinctrl: s32: use of_device_get_match_data() to get device data

On Tue, Mar 21, 2023 at 6:44 AM Chester Lin <[email protected]> wrote:
> On Mon, Mar 20, 2023 at 06:59:41PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:

...

> > > + soc_info = (struct s32_pinctrl_soc_info *)
> > > + of_device_get_match_data(&pdev->dev);
> >
> > Drop the ugly casting, it's not needed.
>
> Actually it's used for suppressing the compiler warning since some members in
> this soc_info need to be filled by pinctrl-s32cc.

Yes, that's one way to solve this.

...

> + info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
> + if (!info)
> + return -ENOMEM;
> +
> + memcpy(info, soc_data, sizeof(*info));

Right, but use devm_kmemdup() instead.

--
With Best Regards,
Andy Shevchenko

2023-03-21 07:40:09

by Andy Shevchenko

[permalink] [raw]
Subject: Re: [PATCH v2 4/4] pinctrl: s32cc: embed generic struct pingroup and pinfunction

On Tue, Mar 21, 2023 at 7:09 AM Chester Lin <[email protected]> wrote:
> On Mon, Mar 20, 2023 at 07:10:40PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <[email protected]> wrote:

...

> > > for_each_child_of_node(np, child) {
> > > - func->groups[i] = child->name;
> > > + groups[i] = (char *)child->name;

Here is also questionable casting.

...

> > > + func->groups = (const char **)groups;
> >
> > Hmm... Why is casting needed?
>
> It's used for fulfilling the type checking done by kbuild otherwise an error will occur:
>
> drivers/pinctrl/nxp/pinctrl-s32cc.c:815:22: error: assignment to 'const char * const*' from incompatible pointer type 'char **' [-Werror=incompatible-pointer-types]
>
> In 'struct pinfunction', the member 'groups' is declared as (const char * const *).

So, please decouple `struct pingroup` change to a separate patch and
hence `struct pinfunction` on its own.

After, consider changing types elsewhere that are following the types
in that data structures.

--
With Best Regards,
Andy Shevchenko