It turns out the recent DW PCIe-related patchset was merged in with
several relatively trivial issues left unsettled (noted by Bjorn and
Manivannan). All of these lefovers have been fixed in this patchset.
Namely the series starts with two bug-fixes. The first one concerns the
improper link-mode initialization in case if the CDM-check is enabled. The
second unfortunate mistake I made in the IP-core version type helper. In
particular instead of testing the IP-core version type the macro function
referred to the just IP-core version which obviously wasn't what I
intended.
Afterwards two @Mani-noted fixes follow. Firstly the dma-ranges related warning
message is fixed to start with "DMA-ranges" word instead of "Dma-ranges".
Secondly the Baikal-T1 PCIe Host driver is converted to perform the
asynchronous probe type which saved us of about 15% of bootup time if no any
PCIe peripheral device attached to the port.
Then the patchset contains the Baikal-T1 PCIe driver fix. The
corresponding patch removes the false error message printed during the
controller probe procedure. I accidentally added the unconditional
dev_err_probe() method invocation. It was obviously wrong.
Then two trivial cleanups are introduced. The first one concerns the
duplicated fast-link-mode flag unsetting. The second one implies
dropping a redundant empty line from the dw_pcie_link_set_max_speed()
function.
The series continues with a patch inspired by the last @Bjorn note
regarding the generic resources request interface. As @Bjorn correctly
said it would be nice to have the new interface used wider in the DW PCIe
subsystem. Aside with the Baikal-T1 PCIe Host driver the Toshiba Visconti
PCIe driver can be easily converted to using the generic clock names.
That's what is done in the noted patch.
The patchset is closed with a series of MAINTAINERS-list related patches.
Firstly after getting the DW PCIe RP/EP DT-schemas refactored I forgot to
update the MAINTAINER-list with the new files added in the framework of
that procedure. All the snps,dw-pcie* schemas shall be maintained by the
DW PCIe core driver maintainers. Secondly seeing how long it took for my
patchsets to review and not having any comments from the original driver
maintainers I'd suggest to add myself as the reviewer to the DW PCIe and
eDMA drivers. Thus hopefully the new updates review process will be
performed with much less latencies. For the same reason @Manivannan is
added to the maintainers list of the DW PCIe/eDMA drivers as he already
agreed to be in.
Link: https://lore.kernel.org/linux-pci/[email protected]/
Changelog v2:
- Rebase onto the kernel 6.3-rc2.
Link: https://lore.kernel.org/linux-pci/[email protected]/
Changelog v3:
- Drop the patch:
[PATCH v2 01/11] PCI: dwc: Fix port link CSR improper init if CDM check enabled
and rebase onto the already submitted by @Yoshihiro fix:
commit cdce67099117 ("PCI: dwc: Fix PORT_LINK_CONTROL update when CDM check enabled")
- Just resend.
Link: https://lore.kernel.org/linux-pci/[email protected]/
Changelog v4:
- Demote @Gustavo to being DW PCIe/eDMA drivers reviewer:
[PATCH v4 9/14] MAINTAINERS: Demote Gustavo Pimentel to DW PCIe core reviewer
[PATCH v4 12/14] MAINTAINERS: Demote Gustavo Pimentel to DW EDMA driver reviewer
- Add Manivannan to the DW PCIe/eDMA drivers maintainers list:
[PATCH v4 10/14] MAINTAINERS: Add Manivannan to DW PCIe core maintainers list
[PATCH v4 13/14] MAINTAINERS: Add Manivannan to DW eDMA driver maintainers list
Signed-off-by: Serge Semin <[email protected]>
Cc: Alexey Malahov <[email protected]>
Cc: Pavel Parkhomenko <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Serge Semin (14):
PCI: dwc: Fix erroneous version type test helper
PCI: dwc: Fix inbound iATU entries out-of-bounds warning message
PCI: bt1: Enable async probe type
PCI: bt1: Fix printing false error message
PCI: dwc: Drop duplicated fast-link-mode flag unsetting
PCI: dwc: Drop empty line from dw_pcie_link_set_max_speed()
PCI: visconti: Convert to using generic resources getter
MAINTAINERS: Add all generic DW PCIe RP/EP DT-schemas
MAINTAINERS: Demote Gustavo Pimentel to DW PCIe core reviewer
MAINTAINERS: Add Manivannan to DW PCIe core maintainers list
MAINTAINERS: Add myself as the DW PCIe core reviewer
MAINTAINERS: Demote Gustavo Pimentel to DW EDMA driver reviewer
MAINTAINERS: Add Manivannan to DW eDMA driver maintainers list
MAINTAINERS: Add myself as the DW eDMA driver reviewer
MAINTAINERS | 11 ++++--
drivers/pci/controller/dwc/pcie-bt1.c | 5 ++-
.../pci/controller/dwc/pcie-designware-host.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.c | 2 -
drivers/pci/controller/dwc/pcie-designware.h | 7 +++-
drivers/pci/controller/dwc/pcie-visconti.c | 37 +++++++++----------
6 files changed, 34 insertions(+), 30 deletions(-)
--
2.40.0
Recently the DT-schema of the DW PCIe Root Port and End-point controllers
has been refactored by detaching the common bindings into a separate
schema. The provided modification must be reflected in the MAINTAINERS
list so the patch submitters would be aware of the new files maintainers.
Let's do that by adding the maintained files wildcard pattern like
snps,dw-pcie*.yaml, which is applicable for all the old DW PCIe DT-schema
files and the new one.
Signed-off-by: Serge Semin <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
---
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ec57c42ed544..489fd4b4c7ae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16063,8 +16063,7 @@ M: Jingoo Han <[email protected]>
M: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
-F: Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
-F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
+F: Documentation/devicetree/bindings/pci/snps,dw-pcie*.yaml
F: drivers/pci/controller/dwc/*designware*
PCI DRIVER FOR TI DRA7XX/J721E
--
2.40.0
No actions have been spotted from the driver original maintainers for
almost two years now. It significantly delays the review process of the
relatively often incoming updates. Since that IP-core has been used in
several our SoCs adding myself to the list of reviewers will help in the
evolving the driver faster and in catching any potential problem as early
as possible.
Signed-off-by: Serge Semin <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 55f38818f783..dcdfe43ee383 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16062,6 +16062,7 @@ PCI DRIVER FOR SYNOPSYS DESIGNWARE
M: Jingoo Han <[email protected]>
M: Manivannan Sadhasivam <[email protected]>
R: Gustavo Pimentel <[email protected]>
+R: Serge Semin <[email protected]>
L: [email protected]
S: Maintained
F: Documentation/devicetree/bindings/pci/snps,dw-pcie*.yaml
--
2.40.0
Manivannan has been very active in reviewing and testing the bits coming
to the DW PCIe RP/EP core driver. Let's add him to the driver maintainers
list.
Signed-off-by: Serge Semin <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index c53424fdecc2..55f38818f783 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16060,6 +16060,7 @@ F: drivers/pci/controller/dwc/pci-exynos.c
PCI DRIVER FOR SYNOPSYS DESIGNWARE
M: Jingoo Han <[email protected]>
+M: Manivannan Sadhasivam <[email protected]>
R: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
--
2.40.0
No maintaining actions from Gustavo have been noticed for over a year.
Demote him to being the DW eDMA driver reviewer for now.
Signed-off-by: Serge Semin <[email protected]>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index dcdfe43ee383..b9d22e0a72be 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5861,7 +5861,7 @@ S: Orphan
F: drivers/mtd/nand/raw/denali*
DESIGNWARE EDMA CORE IP DRIVER
-M: Gustavo Pimentel <[email protected]>
+R: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
F: drivers/dma/dw-edma/
--
2.40.0
Manivannan has been very active in reviewing the bits coming to the DW
eDMA driver. Let's add him to the driver maintainers list.
Signed-off-by: Serge Semin <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b9d22e0a72be..afea4d421a7a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5861,6 +5861,7 @@ S: Orphan
F: drivers/mtd/nand/raw/denali*
DESIGNWARE EDMA CORE IP DRIVER
+M: Manivannan Sadhasivam <[email protected]>
R: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
--
2.40.0
The generic resources request infrastructure has been recently added to
the DW PCIe core driver. Since the DT-bindings of the Toshibo Visconti
PCIe Host controller is fully compatible with the generic names set let's
convert the driver to using that infrastructure. It won't take much effort
since the low-level device driver implies the resources request only with
no additional manipulations involving them. So just drop the locally
defined clocks request procedures, activate the generic resources request
capability and make sure the mandatory resources have been requested by
the DW PCIe core driver.
Suggested-by: Bjorn Helgaas <[email protected]>
Signed-off-by: Serge Semin <[email protected]>
---
drivers/pci/controller/dwc/pcie-visconti.c | 37 ++++++++++------------
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-visconti.c b/drivers/pci/controller/dwc/pcie-visconti.c
index 71026fefa366..ae1517b52c58 100644
--- a/drivers/pci/controller/dwc/pcie-visconti.c
+++ b/drivers/pci/controller/dwc/pcie-visconti.c
@@ -29,9 +29,6 @@ struct visconti_pcie {
void __iomem *ulreg_base;
void __iomem *smu_base;
void __iomem *mpu_base;
- struct clk *refclk;
- struct clk *coreclk;
- struct clk *auxclk;
};
#define PCIE_UL_REG_S_PCIE_MODE 0x00F4
@@ -198,6 +195,21 @@ static int visconti_pcie_host_init(struct dw_pcie_rp *pp)
int err;
u32 val;
+ if (!pcie->pci.core_clks[DW_PCIE_REF_CLK].clk) {
+ dev_err(pci->dev, "Missing ref clock source\n");
+ return -ENOENT;
+ }
+
+ if (!pcie->pci.core_clks[DW_PCIE_CORE_CLK].clk) {
+ dev_err(pci->dev, "Missing core clock source\n");
+ return -ENOENT;
+ }
+
+ if (!pcie->pci.core_clks[DW_PCIE_AUX_CLK].clk) {
+ dev_err(pci->dev, "Missing aux clock source\n");
+ return -ENOENT;
+ }
+
visconti_smu_writel(pcie,
PISMU_CKON_PCIE_AUX_CLK | PISMU_CKON_PCIE_MSTR_ACLK,
PISMU_CKON_PCIE);
@@ -242,8 +254,6 @@ static const struct dw_pcie_host_ops visconti_pcie_host_ops = {
static int visconti_get_resources(struct platform_device *pdev,
struct visconti_pcie *pcie)
{
- struct device *dev = &pdev->dev;
-
pcie->ulreg_base = devm_platform_ioremap_resource_byname(pdev, "ulreg");
if (IS_ERR(pcie->ulreg_base))
return PTR_ERR(pcie->ulreg_base);
@@ -256,21 +266,6 @@ static int visconti_get_resources(struct platform_device *pdev,
if (IS_ERR(pcie->mpu_base))
return PTR_ERR(pcie->mpu_base);
- pcie->refclk = devm_clk_get(dev, "ref");
- if (IS_ERR(pcie->refclk))
- return dev_err_probe(dev, PTR_ERR(pcie->refclk),
- "Failed to get ref clock\n");
-
- pcie->coreclk = devm_clk_get(dev, "core");
- if (IS_ERR(pcie->coreclk))
- return dev_err_probe(dev, PTR_ERR(pcie->coreclk),
- "Failed to get core clock\n");
-
- pcie->auxclk = devm_clk_get(dev, "aux");
- if (IS_ERR(pcie->auxclk))
- return dev_err_probe(dev, PTR_ERR(pcie->auxclk),
- "Failed to get aux clock\n");
-
return 0;
}
@@ -304,6 +299,8 @@ static int visconti_pcie_probe(struct platform_device *pdev)
pci->dev = dev;
pci->ops = &dw_pcie_ops;
+ dw_pcie_cap_set(pci, REQ_RES);
+
ret = visconti_get_resources(pdev, pcie);
if (ret)
return ret;
--
2.40.0
The driver original maintainer has been inactive for almost two years now.
It doesn't positively affect the new patches tests and reviews process.
Since the DW eDMA engine has been embedded into the PCIe controllers in
several our SoCs we will be interested in helping with the updates review.
Signed-off-by: Serge Semin <[email protected]>
Acked-by: Manivannan Sadhasivam <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index afea4d421a7a..75aae6ff4b0d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5863,6 +5863,7 @@ F: drivers/mtd/nand/raw/denali*
DESIGNWARE EDMA CORE IP DRIVER
M: Manivannan Sadhasivam <[email protected]>
R: Gustavo Pimentel <[email protected]>
+R: Serge Semin <[email protected]>
L: [email protected]
S: Maintained
F: drivers/dma/dw-edma/
--
2.40.0
No maintaining actions from Gustavo have been noticed for over two years.
Demote him to being the DW PCIe RP/EP driver reviewer for now.
Signed-off-by: Serge Semin <[email protected]>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 489fd4b4c7ae..c53424fdecc2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16060,7 +16060,7 @@ F: drivers/pci/controller/dwc/pci-exynos.c
PCI DRIVER FOR SYNOPSYS DESIGNWARE
M: Jingoo Han <[email protected]>
-M: Gustavo Pimentel <[email protected]>
+R: Gustavo Pimentel <[email protected]>
L: [email protected]
S: Maintained
F: Documentation/devicetree/bindings/pci/snps,dw-pcie*.yaml
--
2.40.0
Hi Bjorn, Vinod, Mani
On Fri, Apr 14, 2023 at 05:18:18AM +0300, Serge Semin wrote:
> It turns out the recent DW PCIe-related patchset was merged in with
> several relatively trivial issues left unsettled (noted by Bjorn and
> Manivannan). All of these lefovers have been fixed in this patchset.
> Namely the series starts with two bug-fixes. The first one concerns the
> improper link-mode initialization in case if the CDM-check is enabled. The
> second unfortunate mistake I made in the IP-core version type helper. In
> particular instead of testing the IP-core version type the macro function
> referred to the just IP-core version which obviously wasn't what I
> intended.
>
> Afterwards two @Mani-noted fixes follow. Firstly the dma-ranges related warning
> message is fixed to start with "DMA-ranges" word instead of "Dma-ranges".
> Secondly the Baikal-T1 PCIe Host driver is converted to perform the
> asynchronous probe type which saved us of about 15% of bootup time if no any
> PCIe peripheral device attached to the port.
>
> Then the patchset contains the Baikal-T1 PCIe driver fix. The
> corresponding patch removes the false error message printed during the
> controller probe procedure. I accidentally added the unconditional
> dev_err_probe() method invocation. It was obviously wrong.
>
> Then two trivial cleanups are introduced. The first one concerns the
> duplicated fast-link-mode flag unsetting. The second one implies
> dropping a redundant empty line from the dw_pcie_link_set_max_speed()
> function.
>
> The series continues with a patch inspired by the last @Bjorn note
> regarding the generic resources request interface. As @Bjorn correctly
> said it would be nice to have the new interface used wider in the DW PCIe
> subsystem. Aside with the Baikal-T1 PCIe Host driver the Toshiba Visconti
> PCIe driver can be easily converted to using the generic clock names.
> That's what is done in the noted patch.
>
> The patchset is closed with a series of MAINTAINERS-list related patches.
> Firstly after getting the DW PCIe RP/EP DT-schemas refactored I forgot to
> update the MAINTAINER-list with the new files added in the framework of
> that procedure. All the snps,dw-pcie* schemas shall be maintained by the
> DW PCIe core driver maintainers. Secondly seeing how long it took for my
> patchsets to review and not having any comments from the original driver
> maintainers I'd suggest to add myself as the reviewer to the DW PCIe and
> eDMA drivers. Thus hopefully the new updates review process will be
> performed with much less latencies. For the same reason @Manivannan is
> added to the maintainers list of the DW PCIe/eDMA drivers as he already
> agreed to be in.
@Bjorn, anything to say about this patchset? If you are ok with the
changes please merge in the PCI patches.
@Vinod, as you requested the series has been extended with the patches
based on v3 discussion. Please have a look.
@Mani, the series has been updated with the patches adding you as the
DW PCIe/eDMA maintainer as per your permission retrieved on v3.
-Serge(y)
>
> Link: https://lore.kernel.org/linux-pci/[email protected]/
> Changelog v2:
> - Rebase onto the kernel 6.3-rc2.
>
> Link: https://lore.kernel.org/linux-pci/[email protected]/
> Changelog v3:
> - Drop the patch:
> [PATCH v2 01/11] PCI: dwc: Fix port link CSR improper init if CDM check enabled
> and rebase onto the already submitted by @Yoshihiro fix:
> commit cdce67099117 ("PCI: dwc: Fix PORT_LINK_CONTROL update when CDM check enabled")
> - Just resend.
>
> Link: https://lore.kernel.org/linux-pci/[email protected]/
> Changelog v4:
> - Demote @Gustavo to being DW PCIe/eDMA drivers reviewer:
> [PATCH v4 9/14] MAINTAINERS: Demote Gustavo Pimentel to DW PCIe core reviewer
> [PATCH v4 12/14] MAINTAINERS: Demote Gustavo Pimentel to DW EDMA driver reviewer
> - Add Manivannan to the DW PCIe/eDMA drivers maintainers list:
> [PATCH v4 10/14] MAINTAINERS: Add Manivannan to DW PCIe core maintainers list
> [PATCH v4 13/14] MAINTAINERS: Add Manivannan to DW eDMA driver maintainers list
>
> Signed-off-by: Serge Semin <[email protected]>
> Cc: Alexey Malahov <[email protected]>
> Cc: Pavel Parkhomenko <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
>
> Serge Semin (14):
> PCI: dwc: Fix erroneous version type test helper
> PCI: dwc: Fix inbound iATU entries out-of-bounds warning message
> PCI: bt1: Enable async probe type
> PCI: bt1: Fix printing false error message
> PCI: dwc: Drop duplicated fast-link-mode flag unsetting
> PCI: dwc: Drop empty line from dw_pcie_link_set_max_speed()
> PCI: visconti: Convert to using generic resources getter
> MAINTAINERS: Add all generic DW PCIe RP/EP DT-schemas
> MAINTAINERS: Demote Gustavo Pimentel to DW PCIe core reviewer
> MAINTAINERS: Add Manivannan to DW PCIe core maintainers list
> MAINTAINERS: Add myself as the DW PCIe core reviewer
> MAINTAINERS: Demote Gustavo Pimentel to DW EDMA driver reviewer
> MAINTAINERS: Add Manivannan to DW eDMA driver maintainers list
> MAINTAINERS: Add myself as the DW eDMA driver reviewer
>
> MAINTAINERS | 11 ++++--
> drivers/pci/controller/dwc/pcie-bt1.c | 5 ++-
> .../pci/controller/dwc/pcie-designware-host.c | 2 +-
> drivers/pci/controller/dwc/pcie-designware.c | 2 -
> drivers/pci/controller/dwc/pcie-designware.h | 7 +++-
> drivers/pci/controller/dwc/pcie-visconti.c | 37 +++++++++----------
> 6 files changed, 34 insertions(+), 30 deletions(-)
>
> --
> 2.40.0
>
>