Fix label so that pre_disable_mmu_workaround() is called
before clearing sctlr_el1.M.
Fixes: 2ced0f30a426 ("arm64: head: Switch endianness before populating the ID map")
Signed-off-by: Neeraj Upadhyay <[email protected]>
---
arch/arm64/kernel/head.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index b98970907226..e92caebff46a 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -150,8 +150,8 @@ CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f )
pre_disable_mmu_workaround
msr sctlr_el2, x19
b 3f
- pre_disable_mmu_workaround
-2: msr sctlr_el1, x19
+2: pre_disable_mmu_workaround
+ msr sctlr_el1, x19
3: isb
mov x19, xzr
ret
--
2.17.1
On Tue, 25 Apr 2023 at 10:57, Neeraj Upadhyay <[email protected]> wrote:
>
> Fix label so that pre_disable_mmu_workaround() is called
> before clearing sctlr_el1.M.
>
> Fixes: 2ced0f30a426 ("arm64: head: Switch endianness before populating the ID map")
> Signed-off-by: Neeraj Upadhyay <[email protected]>
Acked-by: Ard Biesheuvel <[email protected]>
> ---
> arch/arm64/kernel/head.S | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index b98970907226..e92caebff46a 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -150,8 +150,8 @@ CPU_BE( tbz x19, #SCTLR_ELx_EE_SHIFT, 1f )
> pre_disable_mmu_workaround
> msr sctlr_el2, x19
> b 3f
> - pre_disable_mmu_workaround
> -2: msr sctlr_el1, x19
> +2: pre_disable_mmu_workaround
> + msr sctlr_el1, x19
> 3: isb
> mov x19, xzr
> ret
> --
> 2.17.1
>
On Tue, 25 Apr 2023 15:27:00 +0530, Neeraj Upadhyay wrote:
> Fix label so that pre_disable_mmu_workaround() is called
> before clearing sctlr_el1.M.
>
>
Applied to arm64 (for-next/core), thanks!
[1/1] arm64: Fix label placement in record_mmu_state()
https://git.kernel.org/arm64/c/4e8f6e44bce8
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev