Hi all,
Today's linux-next merge of the kvm-arm tree got a conflict in:
arch/arm64/kernel/cpufeature.c
between commits:
b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS")
c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap")
b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap")
from the arm64 tree and commit:
c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available")
from the kvm-arm tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc arch/arm64/kernel/cpufeature.c
index a74f41c7280f,4a2ab3f366de..000000000000
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@@ -2662,35 -2641,17 +2662,46 @@@ static const struct arm64_cpu_capabilit
.cpu_enable = cpu_enable_dit,
ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP)
},
+ {
+ .desc = "Memory Copy and Memory Set instructions",
+ .capability = ARM64_HAS_MOPS,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .matches = has_cpuid_feature,
+ .cpu_enable = cpu_enable_mops,
+ ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP)
+ },
+ {
+ .capability = ARM64_HAS_TCR2,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR3_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR3_EL1_TCRX_SHIFT,
+ .field_width = 4,
+ .min_field_value = ID_AA64MMFR3_EL1_TCRX_IMP,
+ .matches = has_cpuid_feature,
+ },
+ {
+ .desc = "Stage-1 Permission Indirection Extension (S1PIE)",
+ .capability = ARM64_HAS_S1PIE,
+ .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR3_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR3_EL1_S1PIE_SHIFT,
+ .field_width = 4,
+ .min_field_value = ID_AA64MMFR3_EL1_S1PIE_IMP,
+ .matches = has_cpuid_feature,
+ },
+ {
+ .desc = "Enhanced Virtualization Traps",
+ .capability = ARM64_HAS_EVT,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR2_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT,
+ .field_width = 4,
+ .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP,
+ .matches = has_cpuid_feature,
+ },
{},
};
On Tue, Jun 06, 2023 at 11:49:27AM +1000, Stephen Rothwell wrote:
> diff --cc arch/arm64/kernel/cpufeature.c
> index a74f41c7280f,4a2ab3f366de..000000000000
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@@ -2662,35 -2641,17 +2662,46 @@@ static const struct arm64_cpu_capabilit
> .cpu_enable = cpu_enable_dit,
> ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP)
> },
> + {
> + .desc = "Memory Copy and Memory Set instructions",
> + .capability = ARM64_HAS_MOPS,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_cpuid_feature,
> + .cpu_enable = cpu_enable_mops,
> + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP)
> + },
> + {
> + .capability = ARM64_HAS_TCR2,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .sys_reg = SYS_ID_AA64MMFR3_EL1,
> + .sign = FTR_UNSIGNED,
> + .field_pos = ID_AA64MMFR3_EL1_TCRX_SHIFT,
> + .field_width = 4,
> + .min_field_value = ID_AA64MMFR3_EL1_TCRX_IMP,
> + .matches = has_cpuid_feature,
> + },
> + {
> + .desc = "Stage-1 Permission Indirection Extension (S1PIE)",
> + .capability = ARM64_HAS_S1PIE,
> + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
> + .sys_reg = SYS_ID_AA64MMFR3_EL1,
> + .sign = FTR_UNSIGNED,
> + .field_pos = ID_AA64MMFR3_EL1_S1PIE_SHIFT,
> + .field_width = 4,
> + .min_field_value = ID_AA64MMFR3_EL1_S1PIE_IMP,
> + .matches = has_cpuid_feature,
> + },
> + {
> + .desc = "Enhanced Virtualization Traps",
> + .capability = ARM64_HAS_EVT,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .sys_reg = SYS_ID_AA64MMFR2_EL1,
> + .sign = FTR_UNSIGNED,
> + .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT,
> + .field_width = 4,
> + .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP,
> + .matches = has_cpuid_feature,
> + },
> {},
> };
Thanks Stephen. It looks fine.
--
Catalin
Hi all,
On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <[email protected]> wrote:
>
> Today's linux-next merge of the kvm-arm tree got a conflict in:
>
> arch/arm64/kernel/cpufeature.c
>
> between commits:
>
> b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS")
> c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap")
> b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap")
>
> from the arm64 tree and commit:
>
> c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available")
>
> from the kvm-arm tree.
>
> I fixed it up (see below) and can carry the fix as necessary. This
> is now fixed as far as linux-next is concerned, but any non trivial
> conflicts should be mentioned to your upstream maintainer when your tree
> is submitted for merging. You may also want to consider cooperating
> with the maintainer of the conflicting tree to minimise any particularly
> complex conflicts.
Commit b5a8e35236ee changed a bit, so the new resolution is below.
--
Cheers,
Stephen Rothwell
diff --cc arch/arm64/kernel/cpufeature.c
index c3bdb14bb4bd,4a2ab3f366de..000000000000
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@@ -2662,27 -2641,17 +2662,38 @@@ static const struct arm64_cpu_capabilit
.cpu_enable = cpu_enable_dit,
ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP)
},
+ {
+ .desc = "Memory Copy and Memory Set instructions",
+ .capability = ARM64_HAS_MOPS,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .matches = has_cpuid_feature,
+ .cpu_enable = cpu_enable_mops,
+ ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP)
+ },
+ {
+ .capability = ARM64_HAS_TCR2,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .matches = has_cpuid_feature,
+ ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP)
+ },
+ {
+ .desc = "Stage-1 Permission Indirection Extension (S1PIE)",
+ .capability = ARM64_HAS_S1PIE,
+ .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
+ .matches = has_cpuid_feature,
+ ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1PIE, IMP)
+ },
+ {
+ .desc = "Enhanced Virtualization Traps",
+ .capability = ARM64_HAS_EVT,
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .sys_reg = SYS_ID_AA64MMFR2_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT,
+ .field_width = 4,
+ .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP,
+ .matches = has_cpuid_feature,
+ },
{},
};
On Wed, Jun 07, 2023 at 11:05:21AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <[email protected]> wrote:
> >
> > Today's linux-next merge of the kvm-arm tree got a conflict in:
> >
> > arch/arm64/kernel/cpufeature.c
> >
> > between commits:
> >
> > b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS")
> > c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap")
> > b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap")
> >
> > from the arm64 tree and commit:
> >
> > c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available")
> >
> > from the kvm-arm tree.
> >
> > I fixed it up (see below) and can carry the fix as necessary. This
> > is now fixed as far as linux-next is concerned, but any non trivial
> > conflicts should be mentioned to your upstream maintainer when your tree
> > is submitted for merging. You may also want to consider cooperating
> > with the maintainer of the conflicting tree to minimise any particularly
> > complex conflicts.
>
> Commit b5a8e35236ee changed a bit, so the new resolution is below.
LGTM, thanks Stephen.
Catalin, I'm only planning on dragging in the MOPS branch as needed
due to some more involved conflicts that'll arise from KVM ID register
changes. Otherwise the resolution seems trivial enough and doesn't need
to be explicitly dealt with. Still learning the ropes, so all ears if
anyone disagrees :)
> diff --cc arch/arm64/kernel/cpufeature.c
> index c3bdb14bb4bd,4a2ab3f366de..000000000000
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@@ -2662,27 -2641,17 +2662,38 @@@ static const struct arm64_cpu_capabilit
> .cpu_enable = cpu_enable_dit,
> ARM64_CPUID_FIELDS(ID_AA64PFR0_EL1, DIT, IMP)
> },
> + {
> + .desc = "Memory Copy and Memory Set instructions",
> + .capability = ARM64_HAS_MOPS,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_cpuid_feature,
> + .cpu_enable = cpu_enable_mops,
> + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, MOPS, IMP)
> + },
> + {
> + .capability = ARM64_HAS_TCR2,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .matches = has_cpuid_feature,
> + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP)
> + },
> + {
> + .desc = "Stage-1 Permission Indirection Extension (S1PIE)",
> + .capability = ARM64_HAS_S1PIE,
> + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE,
> + .matches = has_cpuid_feature,
> + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1PIE, IMP)
> + },
> + {
> + .desc = "Enhanced Virtualization Traps",
> + .capability = ARM64_HAS_EVT,
> + .type = ARM64_CPUCAP_SYSTEM_FEATURE,
> + .sys_reg = SYS_ID_AA64MMFR2_EL1,
> + .sign = FTR_UNSIGNED,
> + .field_pos = ID_AA64MMFR2_EL1_EVT_SHIFT,
> + .field_width = 4,
> + .min_field_value = ID_AA64MMFR2_EL1_EVT_IMP,
> + .matches = has_cpuid_feature,
> + },
> {},
> };
>
--
Thanks,
Oliver
On Wed, Jun 07, 2023 at 05:33:53AM +0000, Oliver Upton wrote:
> On Wed, Jun 07, 2023 at 11:05:21AM +1000, Stephen Rothwell wrote:
> > On Tue, 6 Jun 2023 11:49:27 +1000 Stephen Rothwell <[email protected]> wrote:
> > > Today's linux-next merge of the kvm-arm tree got a conflict in:
> > >
> > > arch/arm64/kernel/cpufeature.c
> > >
> > > between commits:
> > >
> > > b7564127ffcb ("arm64: mops: detect and enable FEAT_MOPS")
> > > c1fa32c8f189 ("arm64: cpufeature: add TCR2 cpucap")
> > > b5a8e35236ee ("arm64: cpufeature: add Permission Indirection Extension cpucap")
> > >
> > > from the arm64 tree and commit:
> > >
> > > c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available")
> > >
> > > from the kvm-arm tree.
> > >
> > > I fixed it up (see below) and can carry the fix as necessary. This
> > > is now fixed as far as linux-next is concerned, but any non trivial
> > > conflicts should be mentioned to your upstream maintainer when your tree
> > > is submitted for merging. You may also want to consider cooperating
> > > with the maintainer of the conflicting tree to minimise any particularly
> > > complex conflicts.
> >
> > Commit b5a8e35236ee changed a bit, so the new resolution is below.
Thanks Stephen. I regenerated the arm64 for-next/feat_s1pie branch since
the old one was not archived on lore. While doing that, there were some
minor fixups.
> Catalin, I'm only planning on dragging in the MOPS branch as needed
> due to some more involved conflicts that'll arise from KVM ID register
> changes. Otherwise the resolution seems trivial enough and doesn't need
> to be explicitly dealt with. Still learning the ropes, so all ears if
> anyone disagrees :)
If there are trivial conflicts, we usually leave them in (Linus doesn't
mind). For anything non-obvious, feel free to pull the relevant branches
from the arm64 tree into the KVM one. I don't plan to rebase any of them
now.
--
Catalin