Convert the binding to DT schema format. It also updates the
reset-controller description.
Signed-off-by: Piyush Mehta <[email protected]>
---
- Addressed the Krzysztof review comment:
- Update DT binding to fix the dt_binding_check warning.
Link: https://lore.kernel.org/lkml/[email protected]/T/#m4abfe6287177d5fd09f781d298dd19d56aae5e27
---
.../bindings/reset/xlnx,zynqmp-reset.txt | 55 ----------------
.../bindings/reset/xlnx,zynqmp-reset.yaml | 64 +++++++++++++++++++
2 files changed, 64 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt
create mode 100644 Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt
deleted file mode 100644
index ed836868dbf1..000000000000
--- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt
+++ /dev/null
@@ -1,55 +0,0 @@
---------------------------------------------------------------------------
- = Zynq UltraScale+ MPSoC and Versal reset driver binding =
---------------------------------------------------------------------------
-The Zynq UltraScale+ MPSoC and Versal has several different resets.
-
-See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information
-about zynqmp resets.
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required Properties:
-- compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform
- "xlnx,versal-reset" for Versal platform
-- #reset-cells: Specifies the number of cells needed to encode reset
- line, should be 1
-
--------
-Example
--------
-
-firmware {
- zynqmp_firmware: zynqmp-firmware {
- compatible = "xlnx,zynqmp-firmware";
- method = "smc";
-
- zynqmp_reset: reset-controller {
- compatible = "xlnx,zynqmp-reset";
- #reset-cells = <1>;
- };
- };
-};
-
-Specifying reset lines connected to IP modules
-==============================================
-
-Device nodes that need access to reset lines should
-specify them as a reset phandle in their corresponding node as
-specified in reset.txt.
-
-For list of all valid reset indices for Zynq UltraScale+ MPSoC see
-<dt-bindings/reset/xlnx-zynqmp-resets.h>
-For list of all valid reset indices for Versal see
-<dt-bindings/reset/xlnx-versal-resets.h>
-
-Example:
-
-serdes: zynqmp_phy@fd400000 {
- ...
-
- resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
- reset-names = "sata_rst";
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
new file mode 100644
index 000000000000..a39b17599e05
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/xlnx,zynqmp-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Zynq UltraScale+ MPSoC and Versal reset binding
+
+maintainers:
+ - Piyush Mehta <[email protected]>
+
+description: |
+ The Zynq UltraScale+ MPSoC and Versal has several different resets.
+
+ The PS reset subsystem is responsible for handling the external reset
+ input to the device and that all internal reset requirements are met
+ for the system (as a whole) and for the functional units.
+
+ Please also refer to reset.txt in this directory for common reset
+ controller binding usage. Device nodes that need access to reset
+ lines should specify them as a reset phandle in their corresponding
+ node as specified in reset.txt.
+
+ For list of all valid reset indices for Zynq UltraScale+ MPSoC
+ <dt-bindings/reset/xlnx-zynqmp-resets.h>
+
+ For list of all valid reset indices for Versal
+ <dt-bindings/reset/xlnx-versal-resets.h>
+
+properties:
+ compatible:
+ enum:
+ - xlnx,zynqmp-reset
+ - xlnx,versal-reset
+
+ "#reset-cells":
+ const: 1
+
+required:
+ - compatible
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
+
+ firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ zynqmp_reset: reset-controller {
+ compatible = "xlnx,zynqmp-reset";
+ #reset-cells = <1>;
+ };
+ };
+ };
+
+ /* Specifying sata reset control of devices */
+ sata {
+ resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
+ reset-names = "sata_rst";
+ };
+
+...
--
2.25.1
On 09/06/2023 13:04, Piyush Mehta wrote:
> Convert the binding to DT schema format. It also updates the
> reset-controller description.
>
> Signed-off-by: Piyush Mehta <[email protected]>
> ---
> - Addressed the Krzysztof review comment:
> - Update DT binding to fix the dt_binding_check warning.
>
> Link: https://lore.kernel.org/lkml/[email protected]/T/#m4abfe6287177d5fd09f781d298dd19d56aae5e27
> ---
> .../bindings/reset/xlnx,zynqmp-reset.txt | 55 ----------------
> .../bindings/reset/xlnx,zynqmp-reset.yaml | 64 +++++++++++++++++++
You forgot to update xlnx,zynqmp-firmware.yaml. It was wrong from the
beginning, but now you can fix it in this commit.
Best regards,
Krzysztof
On 09/06/2023 13:04, Piyush Mehta wrote:
> Convert the binding to DT schema format. It also updates the
> reset-controller description.
>
> Signed-off-by: Piyush Mehta <[email protected]>
> ---
> - Addressed the Krzysztof review comment:
> - Update DT binding to fix the dt_binding_check warning.
>
...
> diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
> new file mode 100644
> index 000000000000..a39b17599e05
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/xlnx,zynqmp-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Zynq UltraScale+ MPSoC and Versal reset binding
Drop "binding"
> +
> +maintainers:
> + - Piyush Mehta <[email protected]>
> +
> +description: |
> + The Zynq UltraScale+ MPSoC and Versal has several different resets.
> +
> + The PS reset subsystem is responsible for handling the external reset
> + input to the device and that all internal reset requirements are met
> + for the system (as a whole) and for the functional units.
> +
> + Please also refer to reset.txt in this directory for common reset
> + controller binding usage. Device nodes that need access to reset
> + lines should specify them as a reset phandle in their corresponding
> + node as specified in reset.txt.
> +
> + For list of all valid reset indices for Zynq UltraScale+ MPSoC
> + <dt-bindings/reset/xlnx-zynqmp-resets.h>
> +
> + For list of all valid reset indices for Versal
> + <dt-bindings/reset/xlnx-versal-resets.h>
> +
> +properties:
> + compatible:
> + enum:
> + - xlnx,zynqmp-reset
> + - xlnx,versal-reset
> +
> + "#reset-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
Drop, won't be needed after removing unrelated parts.
> +
> + firmware {
Drop
> + zynqmp_firmware: zynqmp-firmware {
Drop, three level of indentations for that simple reset-controller...
> + zynqmp_reset: reset-controller {
> + compatible = "xlnx,zynqmp-reset";
> + #reset-cells = <1>;
> + };
> + };
> + };
> +
> + /* Specifying sata reset control of devices */
> + sata {
> + resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
> + reset-names = "sata_rst";
> + };
Drop this - not related.
> +
> +...
Best regards,
Krzysztof