2023-07-03 09:45:27

by Xianwei Zhao

[permalink] [raw]
Subject: [PATCH 0/3] Power: C3: add power domain driver

From: Xianwei Zhao <[email protected]>

This patchset adds power controller driver support for Amlogic C3 SoC.
The power domains registers can be accessed in the secure world only.

Xianwei Zhao (3):
dt-bindings: power: add Amlogic C3 power domains
soc: c3: Add support for power domains controller
arm64: dts: add support for C3 power domain controller

.../power/amlogic,meson-sec-pwrc.yaml | 3 +-
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 10 +++++++
drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++-
include/dt-bindings/power/amlogic-c3-power.h | 26 +++++++++++++++++
4 files changed, 65 insertions(+), 2 deletions(-)
create mode 100644 include/dt-bindings/power/amlogic-c3-power.h


base-commit: 057889cb4244096ea5abcbe76ffd4d311c3078fe
--
2.37.1



2023-07-03 09:45:53

by Xianwei Zhao

[permalink] [raw]
Subject: [PATCH 1/3] dt-bindings: power: add Amlogic C3 power domains

From: Xianwei Zhao <[email protected]>

Add devicetree binding document and related header file for Amlogic C3 secure power domains.

Signed-off-by: Xianwei Zhao <[email protected]>
---
.../power/amlogic,meson-sec-pwrc.yaml | 3 ++-
include/dt-bindings/power/amlogic-c3-power.h | 26 +++++++++++++++++++
2 files changed, 28 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/power/amlogic-c3-power.h

diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
index eab21bb2050a..d80bbedfe3aa 100644
--- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
+++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
@@ -12,7 +12,7 @@ maintainers:
- Jianxin Pan <[email protected]>

description: |+
- Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node
+ Secure Power Domains used in Meson A1/C1/S4 & C3 SoCs, and should be the child node
of secure-monitor.

properties:
@@ -20,6 +20,7 @@ properties:
enum:
- amlogic,meson-a1-pwrc
- amlogic,meson-s4-pwrc
+ - amlogic,c3-pwrc

"#power-domain-cells":
const: 1
diff --git a/include/dt-bindings/power/amlogic-c3-power.h b/include/dt-bindings/power/amlogic-c3-power.h
new file mode 100644
index 000000000000..3403e7c0b49d
--- /dev/null
+++ b/include/dt-bindings/power/amlogic-c3-power.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
+/*
+ * Copyright (c) 2023 Amlogic, Inc.
+ * Author: hongyu chen1 <[email protected]>
+ */
+#ifndef _DT_BINDINGS_AMLOGIC_C3_POWER_H
+#define _DT_BINDINGS_AMLOGIC_C3_POWER_H
+
+#define PWRC_C3_NNA_ID 0
+#define PWRC_C3_AUDIO_ID 1
+#define PWRC_C3_RESV_SEC_ID 2
+#define PWRC_C3_SDIOA_ID 3
+#define PWRC_C3_EMMC_ID 4
+#define PWRC_C3_USB_COMB_ID 5
+#define PWRC_C3_SDCARD_ID 6
+#define PWRC_C3_ETH_ID 7
+#define PWRC_C3_RESV0_ID 8
+#define PWRC_C3_GE2D_ID 9
+#define PWRC_C3_CVE_ID 10
+#define PWRC_C3_GDC_WRAP_ID 11
+#define PWRC_C3_ISP_TOP_ID 12
+#define PWRC_C3_MIPI_ISP_WRAP_ID 13
+#define PWRC_C3_VCODEC_ID 14
+
+#endif
+

base-commit: 057889cb4244096ea5abcbe76ffd4d311c3078fe
--
2.37.1


2023-07-03 10:02:56

by Xianwei Zhao

[permalink] [raw]
Subject: [PATCH 3/3] arm64: dts: add support for C3 power domain controller

From: Xianwei Zhao <[email protected]>

Enable power domain controller for Amlogic C3 SoC

Signed-off-by: Xianwei Zhao <[email protected]>
---
arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
index 60ad4f3eef9d..826c51b1aff6 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
@@ -47,6 +47,16 @@ xtal: xtal-clk {
#clock-cells = <0>;
};

+ sm: secure-monitor {
+ compatible = "amlogic,meson-gxbb-sm";
+
+ pwrc: power-controller {
+ compatible = "amlogic,c3-pwrc";
+ #power-domain-cells = <1>;
+ status = "okay";
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <2>;
--
2.37.1


2023-07-03 10:03:27

by Xianwei Zhao

[permalink] [raw]
Subject: [PATCH 2/3] soc: c3: Add support for power domains controller

From: Xianwei Zhao <[email protected]>

Add support for C3 Power controller. C3 power control
registers are in secure domain, and should be accessed by SMC.

Signed-off-by: Xianwei Zhao <[email protected]>
---
drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
index 25b4b71df9b8..39ccc8f2e630 100644
--- a/drivers/soc/amlogic/meson-secure-pwrc.c
+++ b/drivers/soc/amlogic/meson-secure-pwrc.c
@@ -12,6 +12,7 @@
#include <linux/pm_domain.h>
#include <dt-bindings/power/meson-a1-power.h>
#include <dt-bindings/power/meson-s4-power.h>
+#include <dt-bindings/power/amlogic-c3-power.h>
#include <linux/arm-smccc.h>
#include <linux/firmware/meson/meson_sm.h>
#include <linux/module.h>
@@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
SEC_PD(S4_AUDIO, 0),
};

+static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
+ SEC_PD(C3_NNA, 0),
+ SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON),
+ SEC_PD(C3_VCODEC, 0),
+};
+
static int meson_secure_pwrc_probe(struct platform_device *pdev)
{
int i;
@@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct platform_device *pdev)
for (i = 0 ; i < match->count ; ++i) {
struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];

- if (!match->domains[i].index)
+ if (!match->domains[i].name)
continue;

dom->pwrc = pwrc;
@@ -207,6 +224,11 @@ static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
.count = ARRAY_SIZE(s4_pwrc_domains),
};

+static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = {
+ .domains = c3_pwrc_domains,
+ .count = ARRAY_SIZE(c3_pwrc_domains),
+};
+
static const struct of_device_id meson_secure_pwrc_match_table[] = {
{
.compatible = "amlogic,meson-a1-pwrc",
@@ -216,6 +238,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = {
.compatible = "amlogic,meson-s4-pwrc",
.data = &meson_secure_s4_pwrc_data,
},
+ {
+ .compatible = "amlogic,c3-pwrc",
+ .data = &amlogic_secure_c3_pwrc_data,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
--
2.37.1


2023-07-03 13:45:05

by Neil Armstrong

[permalink] [raw]
Subject: Re: [PATCH 2/3] soc: c3: Add support for power domains controller

Hi,

On 03/07/2023 11:31, =Xianwei Zhao wrote:
> From: Xianwei Zhao <[email protected]>
>
> Add support for C3 Power controller. C3 power control
> registers are in secure domain, and should be accessed by SMC.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++-
> 1 file changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
> index 25b4b71df9b8..39ccc8f2e630 100644
> --- a/drivers/soc/amlogic/meson-secure-pwrc.c
> +++ b/drivers/soc/amlogic/meson-secure-pwrc.c
> @@ -12,6 +12,7 @@
> #include <linux/pm_domain.h>
> #include <dt-bindings/power/meson-a1-power.h>
> #include <dt-bindings/power/meson-s4-power.h>
> +#include <dt-bindings/power/amlogic-c3-power.h>
> #include <linux/arm-smccc.h>
> #include <linux/firmware/meson/meson_sm.h>
> #include <linux/module.h>
> @@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
> SEC_PD(S4_AUDIO, 0),
> };
>
> +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
> + SEC_PD(C3_NNA, 0),
> + SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON),
> + SEC_PD(C3_VCODEC, 0),
> +};

Please move this struct before _s4_

> +
> static int meson_secure_pwrc_probe(struct platform_device *pdev)
> {
> int i;
> @@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct platform_device *pdev)
> for (i = 0 ; i < match->count ; ++i) {
> struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
>
> - if (!match->domains[i].index)
> + if (!match->domains[i].name)

Is this change necessary ? If yes please move it to another patch
and explain it's purpose. If it fixes something, add a Fixes tag so
it can be backported.

Thanks,
Neil

> continue;
>
> dom->pwrc = pwrc;
> @@ -207,6 +224,11 @@ static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
> .count = ARRAY_SIZE(s4_pwrc_domains),
> };
>
> +static struct meson_secure_pwrc_domain_data amlogic_secure_c3_pwrc_data = {
> + .domains = c3_pwrc_domains,
> + .count = ARRAY_SIZE(c3_pwrc_domains),
> +};

Please move this struct before _s4_

> +
> static const struct of_device_id meson_secure_pwrc_match_table[] = {
> {
> .compatible = "amlogic,meson-a1-pwrc",
> @@ -216,6 +238,10 @@ static const struct of_device_id meson_secure_pwrc_match_table[] = {
> .compatible = "amlogic,meson-s4-pwrc",
> .data = &meson_secure_s4_pwrc_data,
> },
> + {
> + .compatible = "amlogic,c3-pwrc",
> + .data = &amlogic_secure_c3_pwrc_data,
> + },

Please move this entry before _s4_

> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);

Thanks,
Neil


2023-07-03 13:53:48

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm64: dts: add support for C3 power domain controller

On 03/07/2023 11:31, =Xianwei Zhao wrote:
> From: Xianwei Zhao <[email protected]>
>
> Enable power domain controller for Amlogic C3 SoC
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> index 60ad4f3eef9d..826c51b1aff6 100644
> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
> @@ -47,6 +47,16 @@ xtal: xtal-clk {
> #clock-cells = <0>;
> };
>
> + sm: secure-monitor {
> + compatible = "amlogic,meson-gxbb-sm";
> +
> + pwrc: power-controller {
> + compatible = "amlogic,c3-pwrc";
> + #power-domain-cells = <1>;
> + status = "okay";

Why do you need it? okay is by default.

Best regards,
Krzysztof


2023-07-03 13:55:38

by Krzysztof Kozlowski

[permalink] [raw]
Subject: Re: [PATCH 1/3] dt-bindings: power: add Amlogic C3 power domains

On 03/07/2023 11:31, =Xianwei Zhao wrote:
> From: Xianwei Zhao <[email protected]>
>
> Add devicetree binding document and related header file for Amlogic C3 secure power domains.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> .../power/amlogic,meson-sec-pwrc.yaml | 3 ++-
> include/dt-bindings/power/amlogic-c3-power.h | 26 +++++++++++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/power/amlogic-c3-power.h
>
> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> index eab21bb2050a..d80bbedfe3aa 100644
> --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
> @@ -12,7 +12,7 @@ maintainers:
> - Jianxin Pan <[email protected]>
>
> description: |+
> - Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node
> + Secure Power Domains used in Meson A1/C1/S4 & C3 SoCs, and should be the child node
> of secure-monitor.
>
> properties:
> @@ -20,6 +20,7 @@ properties:
> enum:
> - amlogic,meson-a1-pwrc
> - amlogic,meson-s4-pwrc
> + - amlogic,c3-pwrc
>
> "#power-domain-cells":
> const: 1
> diff --git a/include/dt-bindings/power/amlogic-c3-power.h b/include/dt-bindings/power/amlogic-c3-power.h
> new file mode 100644
> index 000000000000..3403e7c0b49d
> --- /dev/null
> +++ b/include/dt-bindings/power/amlogic-c3-power.h

Filename matching compatibles, please.

> @@ -0,0 +1,26 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
> +/*
> + * Copyright (c) 2023 Amlogic, Inc.
> + * Author: hongyu chen1 <[email protected]>
> + */
> +#ifndef _DT_BINDINGS_AMLOGIC_C3_POWER_H
> +#define _DT_BINDINGS_AMLOGIC_C3_POWER_H
> +
> +#define PWRC_C3_NNA_ID 0
> +#define PWRC_C3_AUDIO_ID 1
> +#define PWRC_C3_RESV_SEC_ID 2
> +#define PWRC_C3_SDIOA_ID 3
> +#define PWRC_C3_EMMC_ID 4
> +#define PWRC_C3_USB_COMB_ID 5
> +#define PWRC_C3_SDCARD_ID 6
> +#define PWRC_C3_ETH_ID 7
> +#define PWRC_C3_RESV0_ID 8
> +#define PWRC_C3_GE2D_ID 9
> +#define PWRC_C3_CVE_ID 10
> +#define PWRC_C3_GDC_WRAP_ID 11
> +#define PWRC_C3_ISP_TOP_ID 12
> +#define PWRC_C3_MIPI_ISP_WRAP_ID 13
> +#define PWRC_C3_VCODEC_ID 14
> +
> +#endif
> +

No need for stray blank line.

Best regards,
Krzysztof


2023-07-03 20:02:27

by Dmitry Rokosov

[permalink] [raw]
Subject: Re: [PATCH 2/3] soc: c3: Add support for power domains controller

On Mon, Jul 03, 2023 at 03:29:31PM +0200, Neil Armstrong wrote:
> Hi,
>
> On 03/07/2023 11:31, =Xianwei Zhao wrote:
> > From: Xianwei Zhao <[email protected]>
> >
> > Add support for C3 Power controller. C3 power control
> > registers are in secure domain, and should be accessed by SMC.
> >
> > Signed-off-by: Xianwei Zhao <[email protected]>
> > ---
> > drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++-
> > 1 file changed, 27 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
> > index 25b4b71df9b8..39ccc8f2e630 100644
> > --- a/drivers/soc/amlogic/meson-secure-pwrc.c
> > +++ b/drivers/soc/amlogic/meson-secure-pwrc.c
> > @@ -12,6 +12,7 @@
> > #include <linux/pm_domain.h>
> > #include <dt-bindings/power/meson-a1-power.h>
> > #include <dt-bindings/power/meson-s4-power.h>
> > +#include <dt-bindings/power/amlogic-c3-power.h>
> > #include <linux/arm-smccc.h>
> > #include <linux/firmware/meson/meson_sm.h>
> > #include <linux/module.h>
> > @@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
> > SEC_PD(S4_AUDIO, 0),
> > };
> > +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
> > + SEC_PD(C3_NNA, 0),
> > + SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON),
> > + SEC_PD(C3_VCODEC, 0),
> > +};
>
> Please move this struct before _s4_
>
> > +
> > static int meson_secure_pwrc_probe(struct platform_device *pdev)
> > {
> > int i;
> > @@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct platform_device *pdev)
> > for (i = 0 ; i < match->count ; ++i) {
> > struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
> > - if (!match->domains[i].index)
> > + if (!match->domains[i].name)
>
> Is this change necessary ? If yes please move it to another patch
> and explain it's purpose. If it fixes something, add a Fixes tag so
> it can be backported.
>
> Thanks,
> Neil
>

I suppose, this change fixes the situation with SEC_PD(C3_NNA, 0)
domain, because it has index == 0.
May be it's better to introduce the separate struct member for that? For
example, 'present' (true or false).
I think code would be more readable and clean.

[...]

--
Thank you,
Dmitry

2023-07-04 02:22:50

by Xianwei Zhao

[permalink] [raw]
Subject: Re: [PATCH 1/3] dt-bindings: power: add Amlogic C3 power domains

Hi Krzystof,
Thanks for your reply.

On 2023/7/3 21:12, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 03/07/2023 11:31, =Xianwei Zhao wrote:
>> From: Xianwei Zhao <[email protected]>
>>
>> Add devicetree binding document and related header file for Amlogic C3 secure power domains.
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>> .../power/amlogic,meson-sec-pwrc.yaml | 3 ++-
>> include/dt-bindings/power/amlogic-c3-power.h | 26 +++++++++++++++++++
>> 2 files changed, 28 insertions(+), 1 deletion(-)
>> create mode 100644 include/dt-bindings/power/amlogic-c3-power.h
>>
>> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
>> index eab21bb2050a..d80bbedfe3aa 100644
>> --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
>> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml
>> @@ -12,7 +12,7 @@ maintainers:
>> - Jianxin Pan <[email protected]>
>>
>> description: |+
>> - Secure Power Domains used in Meson A1/C1/S4 SoCs, and should be the child node
>> + Secure Power Domains used in Meson A1/C1/S4 & C3 SoCs, and should be the child node
>> of secure-monitor.
>>
>> properties:
>> @@ -20,6 +20,7 @@ properties:
>> enum:
>> - amlogic,meson-a1-pwrc
>> - amlogic,meson-s4-pwrc
>> + - amlogic,c3-pwrc
>>
>> "#power-domain-cells":
>> const: 1
>> diff --git a/include/dt-bindings/power/amlogic-c3-power.h b/include/dt-bindings/power/amlogic-c3-power.h
>> new file mode 100644
>> index 000000000000..3403e7c0b49d
>> --- /dev/null
>> +++ b/include/dt-bindings/power/amlogic-c3-power.h
>
> Filename matching compatibles, please.
Will do.
>
>> @@ -0,0 +1,26 @@
>> +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
>> +/*
>> + * Copyright (c) 2023 Amlogic, Inc.
>> + * Author: hongyu chen1 <[email protected]>
>> + */
>> +#ifndef _DT_BINDINGS_AMLOGIC_C3_POWER_H
>> +#define _DT_BINDINGS_AMLOGIC_C3_POWER_H
>> +
>> +#define PWRC_C3_NNA_ID 0
>> +#define PWRC_C3_AUDIO_ID 1
>> +#define PWRC_C3_RESV_SEC_ID 2
>> +#define PWRC_C3_SDIOA_ID 3
>> +#define PWRC_C3_EMMC_ID 4
>> +#define PWRC_C3_USB_COMB_ID 5
>> +#define PWRC_C3_SDCARD_ID 6
>> +#define PWRC_C3_ETH_ID 7
>> +#define PWRC_C3_RESV0_ID 8
>> +#define PWRC_C3_GE2D_ID 9
>> +#define PWRC_C3_CVE_ID 10
>> +#define PWRC_C3_GDC_WRAP_ID 11
>> +#define PWRC_C3_ISP_TOP_ID 12
>> +#define PWRC_C3_MIPI_ISP_WRAP_ID 13
>> +#define PWRC_C3_VCODEC_ID 14
>> +
>> +#endif
>> +
>
> No need for stray blank line.
Will do.
>
> Best regards,
> Krzysztof
>

2023-07-04 02:26:28

by Xianwei Zhao

[permalink] [raw]
Subject: Re: [PATCH 2/3] soc: c3: Add support for power domains controller

Hi Neil,
Thanks for your reply.

On 2023/7/3 21:29, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 03/07/2023 11:31, =Xianwei Zhao wrote:
>> From: Xianwei Zhao <[email protected]>
>>
>> Add support for C3 Power controller. C3 power control
>> registers are in secure domain, and should be accessed by SMC.
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>>   drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++-
>>   1 file changed, 27 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c
>> b/drivers/soc/amlogic/meson-secure-pwrc.c
>> index 25b4b71df9b8..39ccc8f2e630 100644
>> --- a/drivers/soc/amlogic/meson-secure-pwrc.c
>> +++ b/drivers/soc/amlogic/meson-secure-pwrc.c
>> @@ -12,6 +12,7 @@
>>   #include <linux/pm_domain.h>
>>   #include <dt-bindings/power/meson-a1-power.h>
>>   #include <dt-bindings/power/meson-s4-power.h>
>> +#include <dt-bindings/power/amlogic-c3-power.h>
>>   #include <linux/arm-smccc.h>
>>   #include <linux/firmware/meson/meson_sm.h>
>>   #include <linux/module.h>
>> @@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc
>> s4_pwrc_domains[] = {
>>       SEC_PD(S4_AUDIO,        0),
>>   };
>>
>> +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
>> +     SEC_PD(C3_NNA,  0),
>> +     SEC_PD(C3_AUDIO,        GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_SDIOA,        GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_SDCARD,       GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_ETH,  GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_CVE,  GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_GDC_WRAP,     GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_ISP_TOP,              GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON),
>> +     SEC_PD(C3_VCODEC,       0),
>> +};
>
> Please move this struct before _s4_
>
Will do.
>> +
>>   static int meson_secure_pwrc_probe(struct platform_device *pdev)
>>   {
>>       int i;
>> @@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct
>> platform_device *pdev)
>>       for (i = 0 ; i < match->count ; ++i) {
>>               struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
>>
>> -             if (!match->domains[i].index)
>> +             if (!match->domains[i].name)
>
> Is this change necessary ? If yes please move it to another patch
> and explain it's purpose. If it fixes something, add a Fixes tag so
> it can be backported.
>
This variable for C3 could be equal to zero. I will move it to another
patch.
> Thanks,
> Neil
>
>>                       continue;
>>
>>               dom->pwrc = pwrc;
>> @@ -207,6 +224,11 @@ static struct meson_secure_pwrc_domain_data
>> meson_secure_s4_pwrc_data = {
>>       .count = ARRAY_SIZE(s4_pwrc_domains),
>>   };
>>
>> +static struct meson_secure_pwrc_domain_data
>> amlogic_secure_c3_pwrc_data = {
>> +     .domains = c3_pwrc_domains,
>> +     .count = ARRAY_SIZE(c3_pwrc_domains),
>> +};
>
> Please move this struct before _s4_
>
>> +
>>   static const struct of_device_id meson_secure_pwrc_match_table[] = {
>>       {
>>               .compatible = "amlogic,meson-a1-pwrc",
>> @@ -216,6 +238,10 @@ static const struct of_device_id
>> meson_secure_pwrc_match_table[] = {
>>               .compatible = "amlogic,meson-s4-pwrc",
>>               .data = &meson_secure_s4_pwrc_data,
>>       },
>> +     {
>> +             .compatible = "amlogic,c3-pwrc",
>> +             .data = &amlogic_secure_c3_pwrc_data,
>> +     },
>
> Please move this entry before _s4_Will do.
>
>>       { /* sentinel */ }
>>   };
>>   MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
>
> Thanks,
> Neil
>

2023-07-04 02:40:38

by Xianwei Zhao

[permalink] [raw]
Subject: Re: [PATCH 3/3] arm64: dts: add support for C3 power domain controller

Hi Krzysztof,
Thanks for your reply.

On 2023/7/3 21:12, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 03/07/2023 11:31, =Xianwei Zhao wrote:
>> From: Xianwei Zhao <[email protected]>
>>
>> Enable power domain controller for Amlogic C3 SoC
>>
>> Signed-off-by: Xianwei Zhao <[email protected]>
>> ---
>> arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 10 ++++++++++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
>> index 60ad4f3eef9d..826c51b1aff6 100644
>> --- a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi
>> @@ -47,6 +47,16 @@ xtal: xtal-clk {
>> #clock-cells = <0>;
>> };
>>
>> + sm: secure-monitor {
>> + compatible = "amlogic,meson-gxbb-sm";
>> +
>> + pwrc: power-controller {
>> + compatible = "amlogic,c3-pwrc";
>> + #power-domain-cells = <1>;
>> + status = "okay";
>
> Why do you need it? okay is by default.Will move "status" in next version.
>
> Best regards,
> Krzysztof
>

2023-07-04 03:17:15

by Xianwei Zhao

[permalink] [raw]
Subject: Re: [PATCH 2/3] soc: c3: Add support for power domains controller

Hi Dmitry,
Thanks for your advise.

On 2023/7/4 03:37, Dmitry Rokosov wrote:
> [ EXTERNAL EMAIL ]
>
> On Mon, Jul 03, 2023 at 03:29:31PM +0200, Neil Armstrong wrote:
>> Hi,
>>
>> On 03/07/2023 11:31, =Xianwei Zhao wrote:
>>> From: Xianwei Zhao <[email protected]>
>>>
>>> Add support for C3 Power controller. C3 power control
>>> registers are in secure domain, and should be accessed by SMC.
>>>
>>> Signed-off-by: Xianwei Zhao <[email protected]>
>>> ---
>>> drivers/soc/amlogic/meson-secure-pwrc.c | 28 ++++++++++++++++++++++++-
>>> 1 file changed, 27 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
>>> index 25b4b71df9b8..39ccc8f2e630 100644
>>> --- a/drivers/soc/amlogic/meson-secure-pwrc.c
>>> +++ b/drivers/soc/amlogic/meson-secure-pwrc.c
>>> @@ -12,6 +12,7 @@
>>> #include <linux/pm_domain.h>
>>> #include <dt-bindings/power/meson-a1-power.h>
>>> #include <dt-bindings/power/meson-s4-power.h>
>>> +#include <dt-bindings/power/amlogic-c3-power.h>
>>> #include <linux/arm-smccc.h>
>>> #include <linux/firmware/meson/meson_sm.h>
>>> #include <linux/module.h>
>>> @@ -132,6 +133,22 @@ static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
>>> SEC_PD(S4_AUDIO, 0),
>>> };
>>> +static struct meson_secure_pwrc_domain_desc c3_pwrc_domains[] = {
>>> + SEC_PD(C3_NNA, 0),
>>> + SEC_PD(C3_AUDIO, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_SDIOA, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_EMMC, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_USB_COMB, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_SDCARD, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_ETH, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_GE2D, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_CVE, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_GDC_WRAP, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_ISP_TOP, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_MIPI_ISP_WRAP, GENPD_FLAG_ALWAYS_ON),
>>> + SEC_PD(C3_VCODEC, 0),
>>> +};
>>
>> Please move this struct before _s4_
>>
>>> +
>>> static int meson_secure_pwrc_probe(struct platform_device *pdev)
>>> {
>>> int i;
>>> @@ -179,7 +196,7 @@ static int meson_secure_pwrc_probe(struct platform_device *pdev)
>>> for (i = 0 ; i < match->count ; ++i) {
>>> struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
>>> - if (!match->domains[i].index)
>>> + if (!match->domains[i].name)
>>
>> Is this change necessary ? If yes please move it to another patch
>> and explain it's purpose. If it fixes something, add a Fixes tag so
>> it can be backported.
>>
>> Thanks,
>> Neil
>>
>
> I suppose, this change fixes the situation with SEC_PD(C3_NNA, 0)
> domain, because it has index == 0.
That's true.
> May be it's better to introduce the separate struct member for that? For
> example, 'present' (true or false).
> I think code would be more readable and clean.
> > [...]
>
> --
> Thank you,
> Dmitry