This series adds spi device mode functionality to geni based Qupv3.
The common header file contains spi slave related registers and masks.
Praveen Talari (2):
soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3
spi: spi-geni-qcom: Add SPI Device mode support for GENI based QuPv3
---
v6 -> v7:
- Corrected author mail
v5 -> v6:
- Added code comments
- Dropped get_spi_master api
v4 -> v5:
- Addressed review comments in driver
v3 -> v4:
- Used existing property spi-slave
- Hence dropped dt-binding changes
v2 -> v3:
- Modified commit message
- Addressed comment on dt-binding
v1 -> v2:
- Added dt-binding change for spi slave
- Modified commit message
- Addressed review comments in driver
drivers/spi/spi-geni-qcom.c | 53 ++++++++++++++++++++++++++++----
include/linux/soc/qcom/geni-se.h | 9 ++++++
2 files changed, 56 insertions(+), 6 deletions(-)
--
2.17.1
Add device mode supported registers and masks.
Signed-off-by: Praveen Talari <[email protected]>
---
v6 -> v7:
- corrected author mail
v2 -> v3:
- modified commit message to use device mode instead of slave mode
v1 -> v2:
- modified commit message
---
include/linux/soc/qcom/geni-se.h | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h
index 821a19135bb6..29e06905bc1f 100644
--- a/include/linux/soc/qcom/geni-se.h
+++ b/include/linux/soc/qcom/geni-se.h
@@ -35,6 +35,7 @@ enum geni_se_protocol_type {
GENI_SE_UART,
GENI_SE_I2C,
GENI_SE_I3C,
+ GENI_SE_SPI_SLAVE,
};
struct geni_wrapper;
@@ -73,12 +74,14 @@ struct geni_se {
/* Common SE registers */
#define GENI_FORCE_DEFAULT_REG 0x20
+#define GENI_OUTPUT_CTRL 0x24
#define SE_GENI_STATUS 0x40
#define GENI_SER_M_CLK_CFG 0x48
#define GENI_SER_S_CLK_CFG 0x4c
#define GENI_IF_DISABLE_RO 0x64
#define GENI_FW_REVISION_RO 0x68
#define SE_GENI_CLK_SEL 0x7c
+#define SE_GENI_CFG_SEQ_START 0x84
#define SE_GENI_DMA_MODE_EN 0x258
#define SE_GENI_M_CMD0 0x600
#define SE_GENI_M_CMD_CTRL_REG 0x604
@@ -111,6 +114,9 @@ struct geni_se {
/* GENI_FORCE_DEFAULT_REG fields */
#define FORCE_DEFAULT BIT(0)
+/* GENI_OUTPUT_CTRL fields */
+#define GENI_IO_MUX_0_EN BIT(0)
+
/* GENI_STATUS fields */
#define M_GENI_CMD_ACTIVE BIT(0)
#define S_GENI_CMD_ACTIVE BIT(12)
@@ -130,6 +136,9 @@ struct geni_se {
/* GENI_CLK_SEL fields */
#define CLK_SEL_MSK GENMASK(2, 0)
+/* SE_GENI_CFG_SEQ_START fields */
+#define START_TRIGGER BIT(0)
+
/* SE_GENI_DMA_MODE_EN */
#define GENI_DMA_MODE_EN BIT(0)
--
2.17.1
Hi,
LGTM...
On 7/14/2023 9:52 AM, Praveen Talari wrote:
> This series adds spi device mode functionality to geni based Qupv3.
> The common header file contains spi slave related registers and masks.
>
> Praveen Talari (2):
> soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3
> spi: spi-geni-qcom: Add SPI Device mode support for GENI based QuPv3
> ---
> v6 -> v7:
> - Corrected author mail
>
> v5 -> v6:
> - Added code comments
> - Dropped get_spi_master api
>
> v4 -> v5:
> - Addressed review comments in driver
>
> v3 -> v4:
> - Used existing property spi-slave
> - Hence dropped dt-binding changes
>
> v2 -> v3:
> - Modified commit message
> - Addressed comment on dt-binding
>
> v1 -> v2:
> - Added dt-binding change for spi slave
> - Modified commit message
> - Addressed review comments in driver
>
> drivers/spi/spi-geni-qcom.c | 53 ++++++++++++++++++++++++++++----
> include/linux/soc/qcom/geni-se.h | 9 ++++++
> 2 files changed, 56 insertions(+), 6 deletions(-)
Reviewed-by: Vijaya Krishna Nivarthi <[email protected]>
On Fri, Jul 14, 2023 at 09:52:02AM +0530, Praveen Talari wrote:
> Add device mode supported registers and masks.
Does it make sense for me to take this one via spi given how trivial it
is?
On Fri, 14 Jul 2023 09:52:01 +0530, Praveen Talari wrote:
> This series adds spi device mode functionality to geni based Qupv3.
> The common header file contains spi slave related registers and masks.
>
> Praveen Talari (2):
>
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/2] soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3
commit: 59bbe86bb212b618ec2b50434f54bb4cfc704f44
[2/2] spi: spi-geni-qcom: Add SPI Device mode support for GENI based QuPv3
commit: d7f74cc31a89a45d4c7deaa5f759661a07a183d6
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
On Thu, Jul 20, 2023 at 02:11:42PM +0100, Mark Brown wrote:
> On Fri, Jul 14, 2023 at 09:52:02AM +0530, Praveen Talari wrote:
> > Add device mode supported registers and masks.
>
> Does it make sense for me to take this one via spi given how trivial it
> is?
Sounds good to me.
Acked-by: Bjorn Andersson <[email protected]>
Regards,
Bjorn