Conversion from ftgmac100.txt to yaml format version.
Signed-off-by: Ivan Mikhaylov <[email protected]>
---
.../bindings/net/faraday,ftgmac100.yaml | 104 ++++++++++++++++++
.../devicetree/bindings/net/ftgmac100.txt | 67 -----------
2 files changed, 104 insertions(+), 67 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
delete mode 100644 Documentation/devicetree/bindings/net/ftgmac100.txt
diff --git a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
new file mode 100644
index 000000000000..965e6db38970
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Faraday Technology FTGMAC100 gigabit ethernet controller
+
+allOf:
+ - $ref: ethernet-controller.yaml#
+
+maintainers:
+ - Po-Yu Chuang <[email protected]>
+
+properties:
+ compatible:
+ oneOf:
+ - const: faraday,ftgmac100
+ - items:
+ - enum:
+ - aspeed,ast2400-mac
+ - aspeed,ast2500-mac
+ - aspeed,ast2600-mac
+ - const: faraday,ftgmac100
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: MAC IP clock
+ - description: RMII RCLK gate for AST2500/2600
+
+ clock-names:
+ minItems: 1
+ maxItems: 2
+ contains:
+ enum:
+ - MACCLK
+ - RCLK
+
+ phy-mode:
+ enum:
+ - rgmii
+ - rmii
+
+ phy-handle: true
+
+ use-ncsi:
+ description:
+ Use the NC-SI stack instead of an MDIO PHY. Currently assumes
+ rmii (100bT) but kept as a separate property in case NC-SI grows support
+ for a gigabit link.
+ type: boolean
+
+ no-hw-checksum:
+ description:
+ Used to disable HW checksum support. Here for backward
+ compatibility as the driver now should have correct defaults based on
+ the SoC.
+ type: boolean
+ deprecated: true
+
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@1e660000 {
+ compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ use-ncsi;
+ };
+
+ ethernet@1e680000 {
+ compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
+ reg = <0x1e680000 0x180>;
+ interrupts = <2>;
+
+ phy-handle = <&phy>;
+ phy-mode = "rgmii";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/ftgmac100.txt b/Documentation/devicetree/bindings/net/ftgmac100.txt
deleted file mode 100644
index 29234021f601..000000000000
--- a/Documentation/devicetree/bindings/net/ftgmac100.txt
+++ /dev/null
@@ -1,67 +0,0 @@
-* Faraday Technology FTGMAC100 gigabit ethernet controller
-
-Required properties:
-- compatible: "faraday,ftgmac100"
-
- Must also contain one of these if used as part of an Aspeed AST2400
- or 2500 family SoC as they have some subtle tweaks to the
- implementation:
-
- - "aspeed,ast2400-mac"
- - "aspeed,ast2500-mac"
- - "aspeed,ast2600-mac"
-
-- reg: Address and length of the register set for the device
-- interrupts: Should contain ethernet controller interrupt
-
-Optional properties:
-- phy-handle: See ethernet.txt file in the same directory.
-- phy-mode: See ethernet.txt file in the same directory. If the property is
- absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
- aspeed parts. Other (unknown) parts will accept any value.
-- use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes
- rmii (100bT) but kept as a separate property in case NC-SI grows support
- for a gigabit link.
-- no-hw-checksum: Used to disable HW checksum support. Here for backward
- compatibility as the driver now should have correct defaults based on
- the SoC.
-- clocks: In accordance with the generic clock bindings. Must describe the MAC
- IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
- required MAC clock must be the first cell.
-- clock-names:
-
- - "MACCLK": The MAC IP clock
- - "RCLK": Clock gate for the RMII RCLK
-
-Optional subnodes:
-- mdio: See mdio.txt file in the same directory.
-
-Example:
-
- mac0: ethernet@1e660000 {
- compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
- reg = <0x1e660000 0x180>;
- interrupts = <2>;
- use-ncsi;
- };
-
-Example with phy-handle:
-
- mac1: ethernet@1e680000 {
- compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
- reg = <0x1e680000 0x180>;
- interrupts = <2>;
-
- phy-handle = <&phy>;
- phy-mode = "rgmii";
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
- };
- };
--
2.41.0
CC: Conor
in case the missing CC is the reason for higher than usual
review latency :)
On Mon, 31 Jul 2023 10:44:26 +0300 Ivan Mikhaylov wrote:
> Conversion from ftgmac100.txt to yaml format version.
>
> Signed-off-by: Ivan Mikhaylov <[email protected]>
> ---
> .../bindings/net/faraday,ftgmac100.yaml | 104 ++++++++++++++++++
> .../devicetree/bindings/net/ftgmac100.txt | 67 -----------
> 2 files changed, 104 insertions(+), 67 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
> delete mode 100644 Documentation/devicetree/bindings/net/ftgmac100.txt
>
> diff --git a/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
> new file mode 100644
> index 000000000000..965e6db38970
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/faraday,ftgmac100.yaml
> @@ -0,0 +1,104 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/faraday,ftgmac100.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Faraday Technology FTGMAC100 gigabit ethernet controller
> +
> +allOf:
> + - $ref: ethernet-controller.yaml#
> +
> +maintainers:
> + - Po-Yu Chuang <[email protected]>
> +
> +properties:
> + compatible:
> + oneOf:
> + - const: faraday,ftgmac100
> + - items:
> + - enum:
> + - aspeed,ast2400-mac
> + - aspeed,ast2500-mac
> + - aspeed,ast2600-mac
> + - const: faraday,ftgmac100
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + items:
> + - description: MAC IP clock
> + - description: RMII RCLK gate for AST2500/2600
> +
> + clock-names:
> + minItems: 1
> + maxItems: 2
> + contains:
> + enum:
> + - MACCLK
> + - RCLK
> +
> + phy-mode:
> + enum:
> + - rgmii
> + - rmii
> +
> + phy-handle: true
> +
> + use-ncsi:
> + description:
> + Use the NC-SI stack instead of an MDIO PHY. Currently assumes
> + rmii (100bT) but kept as a separate property in case NC-SI grows support
> + for a gigabit link.
> + type: boolean
> +
> + no-hw-checksum:
> + description:
> + Used to disable HW checksum support. Here for backward
> + compatibility as the driver now should have correct defaults based on
> + the SoC.
> + type: boolean
> + deprecated: true
> +
> + mdio:
> + $ref: /schemas/net/mdio.yaml#
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet@1e660000 {
> + compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
> + reg = <0x1e660000 0x180>;
> + interrupts = <2>;
> + use-ncsi;
> + };
> +
> + ethernet@1e680000 {
> + compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
> + reg = <0x1e680000 0x180>;
> + interrupts = <2>;
> +
> + phy-handle = <&phy>;
> + phy-mode = "rgmii";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + phy: ethernet-phy@1 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <1>;
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/net/ftgmac100.txt b/Documentation/devicetree/bindings/net/ftgmac100.txt
> deleted file mode 100644
> index 29234021f601..000000000000
> --- a/Documentation/devicetree/bindings/net/ftgmac100.txt
> +++ /dev/null
> @@ -1,67 +0,0 @@
> -* Faraday Technology FTGMAC100 gigabit ethernet controller
> -
> -Required properties:
> -- compatible: "faraday,ftgmac100"
> -
> - Must also contain one of these if used as part of an Aspeed AST2400
> - or 2500 family SoC as they have some subtle tweaks to the
> - implementation:
> -
> - - "aspeed,ast2400-mac"
> - - "aspeed,ast2500-mac"
> - - "aspeed,ast2600-mac"
> -
> -- reg: Address and length of the register set for the device
> -- interrupts: Should contain ethernet controller interrupt
> -
> -Optional properties:
> -- phy-handle: See ethernet.txt file in the same directory.
> -- phy-mode: See ethernet.txt file in the same directory. If the property is
> - absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
> - aspeed parts. Other (unknown) parts will accept any value.
> -- use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes
> - rmii (100bT) but kept as a separate property in case NC-SI grows support
> - for a gigabit link.
> -- no-hw-checksum: Used to disable HW checksum support. Here for backward
> - compatibility as the driver now should have correct defaults based on
> - the SoC.
> -- clocks: In accordance with the generic clock bindings. Must describe the MAC
> - IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
> - required MAC clock must be the first cell.
> -- clock-names:
> -
> - - "MACCLK": The MAC IP clock
> - - "RCLK": Clock gate for the RMII RCLK
> -
> -Optional subnodes:
> -- mdio: See mdio.txt file in the same directory.
> -
> -Example:
> -
> - mac0: ethernet@1e660000 {
> - compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
> - reg = <0x1e660000 0x180>;
> - interrupts = <2>;
> - use-ncsi;
> - };
> -
> -Example with phy-handle:
> -
> - mac1: ethernet@1e680000 {
> - compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
> - reg = <0x1e680000 0x180>;
> - interrupts = <2>;
> -
> - phy-handle = <&phy>;
> - phy-mode = "rgmii";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - phy: ethernet-phy@1 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <1>;
> - };
> - };
> - };
On Fri, Aug 04, 2023 at 01:20:34PM -0700, Jakub Kicinski wrote:
> CC: Conor
>
> in case the missing CC is the reason for higher than usual
> review latency :)
You even CCed the +dt address so the mail ended up in the right place!
I doubt not having me on CC is the reason for the delay, seems to be a
pattern that the conversion patches end up being Rob's to look at. I at
least find them more difficult to review than new bindings.
It looks like Rob's comments on v(N-1) were resolved, but something here
looks odd to me.
> > + clocks:
> > + minItems: 1
> > + items:
> > + - description: MAC IP clock
> > + - description: RMII RCLK gate for AST2500/2600
> > +
> > + clock-names:
> > + minItems: 1
> > + maxItems: 2
> > + contains:
> > + enum:
> > + - MACCLK
> > + - RCLK
I don't really understand the pattern being used here.
> > -- clocks: In accordance with the generic clock bindings. Must describe the MAC
> > - IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
> > - required MAC clock must be the first cell.
The order in the original binding was strict & the MAC clock had to come
first. What's in the new yaml one is more permissive & I think it should
be
clock-names:
minItems: 1
items:
- const: MACCLK
- const: RCLK
unless of course I am missing something that is...
> > -- clock-names:
> > -
> > - - "MACCLK": The MAC IP clock
> > - - "RCLK": Clock gate for the RMII RCLK