From hardware perspective:
- i.MX8ULP/93 GPIO supports two interrupts, 1st for Trustzone non-secure irq,
2nd for Trustzone secure irq.
- i.MX8ULP/93 only has one register base
The current linux gpio-vf610.c could work with i.MX8ULP/i.MX93, it is
because some trick did in device tree node with offset added to base:
reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
But actually the register base should be 0x2d010000.
So i.MX8ULP/93 is not HW compatible with i.MX7ULP.
i.MX93 GPIO is directly derived from i.MX8ULP, so make i.MX93 compatible
with i.MX8ULP. i.MX95 GPIO is same as i.MX93, so also compatible with
i.MX8ULP
There maybe dtbs_check failure if only test the 1st patch. After
the patchset applied, no failure.
To make avoid break old bindings from work, update the driver
to support both old/new bindings.
---
Changes in v5:
- Add R-b for patch 1, 2
- Simplify code a bit more in patch 4 pPer Marco's comments
- Update patch 5 to only drop port->sdata check, since patch 4 is changed.
- Link to v4: https://lore.kernel.org/r/[email protected]
Changes in v4:
Change to minItems for allOf: else: interrupts
Update commit log for patch 4/6
Follow Marco's comments for patch 4/6
Add a new patch 5/6 Per Marco's comments.
Changes in v3:
Update patch v2 2/6
Update commit log in patch v2 5/6
Add A-b from DT maintainer for patch v2 1/6, 3/6
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Update bindings with describe items, add one reg base for i.MX8ULP/93
- Update driver to support one reg base, support both new/old bindings
- Add a new patch 1 to update gpio-ranges found in dtbs_check
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Peng Fan (7):
dt-bindings: gpio: vf610: update gpio-ranges
dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
dt-bindings: gpio: vf610: add i.MX95 compatible
gpio: vf610: add i.MX8ULP of_device_id entry
gpio: vf610: simplify code by dropping data check
arm64: dts: imx8ulp: update gpio node
arm64: dts: imx93: update gpio node
.../devicetree/bindings/gpio/gpio-vf610.yaml | 40 +++++++++++++---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 +++++----
arch/arm64/boot/dts/freescale/imx93.dtsi | 28 +++++++-----
drivers/gpio/gpio-vf610.c | 53 ++++++++++++++++++----
4 files changed, 105 insertions(+), 37 deletions(-)
---
base-commit: e143016b56ecb0fcda5bb6026b0a25fe55274f56
change-id: 20230914-vf610-gpio-46edacd2b513
Best regards,
--
Peng Fan <[email protected]>
From: Peng Fan <[email protected]>
All of_device_id entries has valid data, so code simplified
a bit by dropping the data check.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/gpio/gpio-vf610.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index 8e12706c0b22..c03dfda41d4c 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -100,7 +100,7 @@ static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
unsigned long mask = BIT(gpio);
unsigned long offset = GPIO_PDIR;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
mask &= vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
if (mask)
offset = GPIO_PDOR;
@@ -124,7 +124,7 @@ static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
unsigned long mask = BIT(gpio);
u32 val;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
val &= ~mask;
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
@@ -140,7 +140,7 @@ static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
unsigned long mask = BIT(gpio);
u32 val;
- if (port->sdata && port->sdata->have_paddr) {
+ if (port->sdata->have_paddr) {
val = vf610_gpio_readl(port->gpio_base + GPIO_PDDR);
val |= mask;
vf610_gpio_writel(val, port->gpio_base + GPIO_PDDR);
--
2.37.1
From: Peng Fan <[email protected]>
i.MX8ULP/93 GPIO supports similar feature as i.MX7ULP GPIO, but i.MX8ULP is
actually not hardware compatible with i.MX7ULP. i.MX8ULP only has one
register base, not two bases. i.MX8ULP and i.MX93 actually has two
interrupts for each gpio controller, one for Trustzone non-secure world,
one for secure world.
Although the Linux Kernel driver gpio-vf610.c could work with
fsl,imx7ulp-gpio compatible, it is based on some tricks did in device tree
with some offset added to base address.
Add a new of_device_id entry for i.MX8ULP. But to make the driver could
also support old bindings, check the compatible string first, before
check the device data.
Signed-off-by: Peng Fan <[email protected]>
---
drivers/gpio/gpio-vf610.c | 47 ++++++++++++++++++++++++++++++++++++++++-------
1 file changed, 40 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
index dbc7ba0ee72c..8e12706c0b22 100644
--- a/drivers/gpio/gpio-vf610.c
+++ b/drivers/gpio/gpio-vf610.c
@@ -25,6 +25,7 @@
struct fsl_gpio_soc_data {
/* SoCs has a Port Data Direction Register (PDDR) */
bool have_paddr;
+ bool have_dual_base;
};
struct vf610_gpio_port {
@@ -60,13 +61,26 @@ struct vf610_gpio_port {
#define PORT_INT_EITHER_EDGE 0xb
#define PORT_INT_LOGIC_ONE 0xc
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+#define IMX8ULP_BASE_OFF 0x80
+
+static const struct fsl_gpio_soc_data vf610_data = {
+ .have_dual_base = true,
+};
+
static const struct fsl_gpio_soc_data imx_data = {
.have_paddr = true,
+ .have_dual_base = true,
+};
+
+static const struct fsl_gpio_soc_data imx8ulp_data = {
+ .have_paddr = true,
};
static const struct of_device_id vf610_gpio_dt_ids[] = {
- { .compatible = "fsl,vf610-gpio", .data = NULL, },
+ { .compatible = "fsl,vf610-gpio", .data = &vf610_data },
{ .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
+ { .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, },
{ /* sentinel */ }
};
@@ -263,19 +277,38 @@ static int vf610_gpio_probe(struct platform_device *pdev)
struct gpio_irq_chip *girq;
int i;
int ret;
+ bool dual_base;
port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
if (!port)
return -ENOMEM;
port->sdata = of_device_get_match_data(dev);
- port->base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(port->base))
- return PTR_ERR(port->base);
- port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
- if (IS_ERR(port->gpio_base))
- return PTR_ERR(port->gpio_base);
+ dual_base = port->sdata->have_dual_base;
+
+ /* support old compatible strings */
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
+ dual_base = true;
+
+ if (dual_base) {
+ port->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(port->base))
+ return PTR_ERR(port->base);
+
+ port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
+ if (IS_ERR(port->gpio_base))
+ return PTR_ERR(port->gpio_base);
+ } else {
+ port->base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(port->base))
+ return PTR_ERR(port->base);
+
+ port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
+ port->base = port->base + IMX8ULP_BASE_OFF;
+ }
port->irq = platform_get_irq(pdev, 0);
if (port->irq < 0)
--
2.37.1
From: Peng Fan <[email protected]>
Per binding doc, i.MX93 GPIO supports two interrupts and one register
base, compatible with i.MX8ULP. The current fsl,imx7ulp-gpio compatible
could work for i.MX93 in gpio-vf610.c driver, it is based on the base
address are splited into two with offset added in device tree node.
Now following hardware design, using one register base in device tree node.
This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX93 GPIO.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 6f85a05ee7e1..4b111b8c1931 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -825,11 +825,12 @@ usdhc3: mmc@428b0000 {
};
gpio2: gpio@43810080 {
- compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
- reg = <0x43810080 0x1000>, <0x43810040 0x40>;
+ compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+ reg = <0x43810000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO2_GATE>,
@@ -839,11 +840,12 @@ gpio2: gpio@43810080 {
};
gpio3: gpio@43820080 {
- compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
- reg = <0x43820080 0x1000>, <0x43820040 0x40>;
+ compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+ reg = <0x43820000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO3_GATE>,
@@ -854,11 +856,12 @@ gpio3: gpio@43820080 {
};
gpio4: gpio@43830080 {
- compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
- reg = <0x43830080 0x1000>, <0x43830040 0x40>;
+ compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+ reg = <0x43830000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO4_GATE>,
@@ -868,11 +871,12 @@ gpio4: gpio@43830080 {
};
gpio1: gpio@47400080 {
- compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
- reg = <0x47400080 0x1000>, <0x47400040 0x40>;
+ compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
+ reg = <0x47400000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&clk IMX93_CLK_GPIO1_GATE>,
--
2.37.1
From: Peng Fan <[email protected]>
i.MX93 supports four gpio-ranges at max. To fix below issue:
"gpio@43820080: gpio-ranges: [[30, 0, 84, 8], [30, 8, 66, 18],
[30, 26, 34, 2], [30, 28, 0, 4]] is too long"
Update the gpio-ranges property
Acked-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 7c2d152e8617..59427d97adf5 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -59,7 +59,8 @@ properties:
- const: port
gpio-ranges:
- maxItems: 1
+ minItems: 1
+ maxItems: 4
patternProperties:
"^.+-hog(-[0-9]+)?$":
--
2.37.1
From: Peng Fan <[email protected]>
Add i.MX95 compatible string which is compatible with i.MX8ULP
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
Documentation/devicetree/bindings/gpio/gpio-vf610.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
index 21199bf221ef..a27f92950257 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml
@@ -28,6 +28,7 @@ properties:
- items:
- enum:
- fsl,imx93-gpio
+ - fsl,imx95-gpio
- const: fsl,imx8ulp-gpio
reg:
--
2.37.1
From: Peng Fan <[email protected]>
The i.MX8ULP GPIO supports two interrupts and one register base,
the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
gpio-vf610.c driver, it is based on the base address are splited
into two with offset added in device tree node. Now following
hardware design, using one register base in device tree node.
This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX8ULP GPIO.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8a6596d5a581..3921fdace792 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -484,11 +484,12 @@ fec: ethernet@29950000 {
};
gpioe: gpio@2d000080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d000080 0x1000>, <0x2d000040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOE>,
@@ -498,11 +499,12 @@ gpioe: gpio@2d000080 {
};
gpiof: gpio@2d010080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d010000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOF>,
@@ -533,11 +535,12 @@ pcc5: clock-controller@2da70000 {
};
gpiod: gpio@2e200080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2e200080 0x1000>, <0x2e200040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2e200000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc5 IMX8ULP_CLK_RGPIOD>,
--
2.37.1
On Sun, Oct 1, 2023 at 10:23 AM Peng Fan (OSS) <[email protected]> wrote:
>
> From: Peng Fan <[email protected]>
>
> i.MX8ULP/93 GPIO supports similar feature as i.MX7ULP GPIO, but i.MX8ULP is
> actually not hardware compatible with i.MX7ULP. i.MX8ULP only has one
> register base, not two bases. i.MX8ULP and i.MX93 actually has two
> interrupts for each gpio controller, one for Trustzone non-secure world,
> one for secure world.
>
> Although the Linux Kernel driver gpio-vf610.c could work with
> fsl,imx7ulp-gpio compatible, it is based on some tricks did in device tree
> with some offset added to base address.
>
> Add a new of_device_id entry for i.MX8ULP. But to make the driver could
> also support old bindings, check the compatible string first, before
> check the device data.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> drivers/gpio/gpio-vf610.c | 47 ++++++++++++++++++++++++++++++++++++++++-------
> 1 file changed, 40 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
> index dbc7ba0ee72c..8e12706c0b22 100644
> --- a/drivers/gpio/gpio-vf610.c
> +++ b/drivers/gpio/gpio-vf610.c
> @@ -25,6 +25,7 @@
> struct fsl_gpio_soc_data {
> /* SoCs has a Port Data Direction Register (PDDR) */
> bool have_paddr;
> + bool have_dual_base;
> };
>
> struct vf610_gpio_port {
> @@ -60,13 +61,26 @@ struct vf610_gpio_port {
> #define PORT_INT_EITHER_EDGE 0xb
> #define PORT_INT_LOGIC_ONE 0xc
>
> +#define IMX8ULP_GPIO_BASE_OFF 0x40
> +#define IMX8ULP_BASE_OFF 0x80
> +
> +static const struct fsl_gpio_soc_data vf610_data = {
> + .have_dual_base = true,
> +};
> +
> static const struct fsl_gpio_soc_data imx_data = {
> .have_paddr = true,
> + .have_dual_base = true,
> +};
> +
> +static const struct fsl_gpio_soc_data imx8ulp_data = {
> + .have_paddr = true,
> };
>
> static const struct of_device_id vf610_gpio_dt_ids[] = {
> - { .compatible = "fsl,vf610-gpio", .data = NULL, },
> + { .compatible = "fsl,vf610-gpio", .data = &vf610_data },
> { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
> + { .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, },
> { /* sentinel */ }
> };
>
> @@ -263,19 +277,38 @@ static int vf610_gpio_probe(struct platform_device *pdev)
> struct gpio_irq_chip *girq;
> int i;
> int ret;
> + bool dual_base;
>
> port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> if (!port)
> return -ENOMEM;
>
> port->sdata = of_device_get_match_data(dev);
> - port->base = devm_platform_ioremap_resource(pdev, 0);
> - if (IS_ERR(port->base))
> - return PTR_ERR(port->base);
>
> - port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> - if (IS_ERR(port->gpio_base))
> - return PTR_ERR(port->gpio_base);
> + dual_base = port->sdata->have_dual_base;
> +
> + /* support old compatible strings */
> + if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
> + (device_is_compatible(dev, "fsl,imx93-gpio") ||
Why not just add this compatible to vf610_gpio_dt_ids?
Bart
> + (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
> + dual_base = true;
> +
> + if (dual_base) {
> + port->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(port->base))
> + return PTR_ERR(port->base);
> +
> + port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> + if (IS_ERR(port->gpio_base))
> + return PTR_ERR(port->gpio_base);
> + } else {
> + port->base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(port->base))
> + return PTR_ERR(port->base);
> +
> + port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
> + port->base = port->base + IMX8ULP_BASE_OFF;
> + }
>
> port->irq = platform_get_irq(pdev, 0);
> if (port->irq < 0)
>
> --
> 2.37.1
>
> Subject: Re: [PATCH v5 4/7] gpio: vf610: add i.MX8ULP of_device_id entry
>
> On Sun, Oct 1, 2023 at 10:23 AM Peng Fan (OSS) <[email protected]>
> wrote:
> >
> > From: Peng Fan <[email protected]>
> >
> > i.MX8ULP/93 GPIO supports similar feature as i.MX7ULP GPIO, but
> > i.MX8ULP is actually not hardware compatible with i.MX7ULP. i.MX8ULP
> > only has one register base, not two bases. i.MX8ULP and i.MX93
> > actually has two interrupts for each gpio controller, one for
> > Trustzone non-secure world, one for secure world.
> >
> > Although the Linux Kernel driver gpio-vf610.c could work with
> > fsl,imx7ulp-gpio compatible, it is based on some tricks did in device
> > tree with some offset added to base address.
> >
> > Add a new of_device_id entry for i.MX8ULP. But to make the driver
> > could also support old bindings, check the compatible string first,
> > before check the device data.
> >
> > Signed-off-by: Peng Fan <[email protected]>
> > ---
> > drivers/gpio/gpio-vf610.c | 47
> > ++++++++++++++++++++++++++++++++++++++++-------
> > 1 file changed, 40 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
> > index dbc7ba0ee72c..8e12706c0b22 100644
> > --- a/drivers/gpio/gpio-vf610.c
> > +++ b/drivers/gpio/gpio-vf610.c
> > @@ -25,6 +25,7 @@
> > struct fsl_gpio_soc_data {
> > /* SoCs has a Port Data Direction Register (PDDR) */
> > bool have_paddr;
> > + bool have_dual_base;
> > };
> >
> > struct vf610_gpio_port {
> > @@ -60,13 +61,26 @@ struct vf610_gpio_port {
> > #define PORT_INT_EITHER_EDGE 0xb
> > #define PORT_INT_LOGIC_ONE 0xc
> >
> > +#define IMX8ULP_GPIO_BASE_OFF 0x40
> > +#define IMX8ULP_BASE_OFF 0x80
> > +
> > +static const struct fsl_gpio_soc_data vf610_data = {
> > + .have_dual_base = true,
> > +};
> > +
> > static const struct fsl_gpio_soc_data imx_data = {
> > .have_paddr = true,
> > + .have_dual_base = true,
> > +};
> > +
> > +static const struct fsl_gpio_soc_data imx8ulp_data = {
> > + .have_paddr = true,
> > };
> >
> > static const struct of_device_id vf610_gpio_dt_ids[] = {
> > - { .compatible = "fsl,vf610-gpio", .data = NULL, },
> > + { .compatible = "fsl,vf610-gpio", .data = &vf610_data },
> > { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
> > + { .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, },
> > { /* sentinel */ }
> > };
> >
> > @@ -263,19 +277,38 @@ static int vf610_gpio_probe(struct
> platform_device *pdev)
> > struct gpio_irq_chip *girq;
> > int i;
> > int ret;
> > + bool dual_base;
> >
> > port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> > if (!port)
> > return -ENOMEM;
> >
> > port->sdata = of_device_get_match_data(dev);
> > - port->base = devm_platform_ioremap_resource(pdev, 0);
> > - if (IS_ERR(port->base))
> > - return PTR_ERR(port->base);
> >
> > - port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> > - if (IS_ERR(port->gpio_base))
> > - return PTR_ERR(port->gpio_base);
> > + dual_base = port->sdata->have_dual_base;
> > +
> > + /* support old compatible strings */
> > + if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
> > + (device_is_compatible(dev, "fsl,imx93-gpio") ||
>
> Why not just add this compatible to vf610_gpio_dt_ids?
"fsl,imx93-gpio", "fsl,imx7ulp-gpio" is not a correct entry
combination. This is to support legacy old compatible
strings.
Thanks,
Peng.
>
> Bart
>
> > + (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
> > + dual_base = true;
> > +
> > + if (dual_base) {
> > + port->base = devm_platform_ioremap_resource(pdev, 0);
> > + if (IS_ERR(port->base))
> > + return PTR_ERR(port->base);
> > +
> > + port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> > + if (IS_ERR(port->gpio_base))
> > + return PTR_ERR(port->gpio_base);
> > + } else {
> > + port->base = devm_platform_ioremap_resource(pdev, 0);
> > + if (IS_ERR(port->base))
> > + return PTR_ERR(port->base);
> > +
> > + port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
> > + port->base = port->base + IMX8ULP_BASE_OFF;
> > + }
> >
> > port->irq = platform_get_irq(pdev, 0);
> > if (port->irq < 0)
> >
> > --
> > 2.37.1
> >
Hi Peng,
On 23-10-02, Peng Fan wrote:
> > Subject: Re: [PATCH v5 4/7] gpio: vf610: add i.MX8ULP of_device_id entry
> >
> > On Sun, Oct 1, 2023 at 10:23 AM Peng Fan (OSS) <[email protected]>
> > wrote:
> > >
> > > From: Peng Fan <[email protected]>
> > >
> > > i.MX8ULP/93 GPIO supports similar feature as i.MX7ULP GPIO, but
> > > i.MX8ULP is actually not hardware compatible with i.MX7ULP. i.MX8ULP
> > > only has one register base, not two bases. i.MX8ULP and i.MX93
> > > actually has two interrupts for each gpio controller, one for
> > > Trustzone non-secure world, one for secure world.
> > >
> > > Although the Linux Kernel driver gpio-vf610.c could work with
> > > fsl,imx7ulp-gpio compatible, it is based on some tricks did in device
> > > tree with some offset added to base address.
> > >
> > > Add a new of_device_id entry for i.MX8ULP. But to make the driver
> > > could also support old bindings, check the compatible string first,
> > > before check the device data.
> > >
> > > Signed-off-by: Peng Fan <[email protected]>
> > > ---
> > > drivers/gpio/gpio-vf610.c | 47
> > > ++++++++++++++++++++++++++++++++++++++++-------
> > > 1 file changed, 40 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c
> > > index dbc7ba0ee72c..8e12706c0b22 100644
> > > --- a/drivers/gpio/gpio-vf610.c
> > > +++ b/drivers/gpio/gpio-vf610.c
> > > @@ -25,6 +25,7 @@
> > > struct fsl_gpio_soc_data {
> > > /* SoCs has a Port Data Direction Register (PDDR) */
> > > bool have_paddr;
> > > + bool have_dual_base;
> > > };
> > >
> > > struct vf610_gpio_port {
> > > @@ -60,13 +61,26 @@ struct vf610_gpio_port {
> > > #define PORT_INT_EITHER_EDGE 0xb
> > > #define PORT_INT_LOGIC_ONE 0xc
> > >
> > > +#define IMX8ULP_GPIO_BASE_OFF 0x40
> > > +#define IMX8ULP_BASE_OFF 0x80
> > > +
> > > +static const struct fsl_gpio_soc_data vf610_data = {
> > > + .have_dual_base = true,
> > > +};
> > > +
> > > static const struct fsl_gpio_soc_data imx_data = {
> > > .have_paddr = true,
> > > + .have_dual_base = true,
> > > +};
> > > +
> > > +static const struct fsl_gpio_soc_data imx8ulp_data = {
> > > + .have_paddr = true,
> > > };
> > >
> > > static const struct of_device_id vf610_gpio_dt_ids[] = {
> > > - { .compatible = "fsl,vf610-gpio", .data = NULL, },
> > > + { .compatible = "fsl,vf610-gpio", .data = &vf610_data },
> > > { .compatible = "fsl,imx7ulp-gpio", .data = &imx_data, },
> > > + { .compatible = "fsl,imx8ulp-gpio", .data = &imx8ulp_data, },
> > > { /* sentinel */ }
> > > };
> > >
> > > @@ -263,19 +277,38 @@ static int vf610_gpio_probe(struct
> > platform_device *pdev)
> > > struct gpio_irq_chip *girq;
> > > int i;
> > > int ret;
> > > + bool dual_base;
> > >
> > > port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
> > > if (!port)
> > > return -ENOMEM;
> > >
> > > port->sdata = of_device_get_match_data(dev);
> > > - port->base = devm_platform_ioremap_resource(pdev, 0);
> > > - if (IS_ERR(port->base))
> > > - return PTR_ERR(port->base);
> > >
> > > - port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> > > - if (IS_ERR(port->gpio_base))
> > > - return PTR_ERR(port->gpio_base);
> > > + dual_base = port->sdata->have_dual_base;
> > > +
> > > + /* support old compatible strings */
> > > + if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
> > > + (device_is_compatible(dev, "fsl,imx93-gpio") ||
> >
> > Why not just add this compatible to vf610_gpio_dt_ids?
>
> "fsl,imx93-gpio", "fsl,imx7ulp-gpio" is not a correct entry
> combination. This is to support legacy old compatible
> strings.
The "/* support old compatible strings */" may a bit misleading here?
Should we be a bit more verbose for the reader of the code, e.g.:
/*
* Handle legacy compatible combinations which used two
* reg values for the i.MX8ULP and i.MX93.
*/
Regards,
Marco
>
> Thanks,
> Peng.
> >
> > Bart
> >
> > > + (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
> > > + dual_base = true;
> > > +
> > > + if (dual_base) {
> > > + port->base = devm_platform_ioremap_resource(pdev, 0);
> > > + if (IS_ERR(port->base))
> > > + return PTR_ERR(port->base);
> > > +
> > > + port->gpio_base = devm_platform_ioremap_resource(pdev, 1);
> > > + if (IS_ERR(port->gpio_base))
> > > + return PTR_ERR(port->gpio_base);
> > > + } else {
> > > + port->base = devm_platform_ioremap_resource(pdev, 0);
> > > + if (IS_ERR(port->base))
> > > + return PTR_ERR(port->base);
> > > +
> > > + port->gpio_base = port->base + IMX8ULP_GPIO_BASE_OFF;
> > > + port->base = port->base + IMX8ULP_BASE_OFF;
> > > + }
> > >
> > > port->irq = platform_get_irq(pdev, 0);
> > > if (port->irq < 0)
> > >
> > > --
> > > 2.37.1
> > >
On Sun, Oct 1, 2023 at 10:23 AM Peng Fan (OSS) <[email protected]> wrote:
>
> From hardware perspective:
> - i.MX8ULP/93 GPIO supports two interrupts, 1st for Trustzone non-secure irq,
> 2nd for Trustzone secure irq.
> - i.MX8ULP/93 only has one register base
>
> The current linux gpio-vf610.c could work with i.MX8ULP/i.MX93, it is
> because some trick did in device tree node with offset added to base:
> reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
> But actually the register base should be 0x2d010000.
>
> So i.MX8ULP/93 is not HW compatible with i.MX7ULP.
>
> i.MX93 GPIO is directly derived from i.MX8ULP, so make i.MX93 compatible
> with i.MX8ULP. i.MX95 GPIO is same as i.MX93, so also compatible with
> i.MX8ULP
>
> There maybe dtbs_check failure if only test the 1st patch. After
> the patchset applied, no failure.
>
> To make avoid break old bindings from work, update the driver
> to support both old/new bindings.
>
> ---
> Changes in v5:
> - Add R-b for patch 1, 2
> - Simplify code a bit more in patch 4 pPer Marco's comments
> - Update patch 5 to only drop port->sdata check, since patch 4 is changed.
> - Link to v4: https://lore.kernel.org/r/[email protected]
>
> Changes in v4:
> Change to minItems for allOf: else: interrupts
> Update commit log for patch 4/6
> Follow Marco's comments for patch 4/6
> Add a new patch 5/6 Per Marco's comments.
>
> Changes in v3:
> Update patch v2 2/6
> Update commit log in patch v2 5/6
> Add A-b from DT maintainer for patch v2 1/6, 3/6
> - Link to v2: https://lore.kernel.org/r/[email protected]
>
> Changes in v2:
> - Update bindings with describe items, add one reg base for i.MX8ULP/93
> - Update driver to support one reg base, support both new/old bindings
> - Add a new patch 1 to update gpio-ranges found in dtbs_check
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Peng Fan (7):
> dt-bindings: gpio: vf610: update gpio-ranges
> dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
> dt-bindings: gpio: vf610: add i.MX95 compatible
> gpio: vf610: add i.MX8ULP of_device_id entry
> gpio: vf610: simplify code by dropping data check
> arm64: dts: imx8ulp: update gpio node
> arm64: dts: imx93: update gpio node
>
> .../devicetree/bindings/gpio/gpio-vf610.yaml | 40 +++++++++++++---
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 +++++----
> arch/arm64/boot/dts/freescale/imx93.dtsi | 28 +++++++-----
> drivers/gpio/gpio-vf610.c | 53 ++++++++++++++++++----
> 4 files changed, 105 insertions(+), 37 deletions(-)
> ---
> base-commit: e143016b56ecb0fcda5bb6026b0a25fe55274f56
> change-id: 20230914-vf610-gpio-46edacd2b513
>
> Best regards,
> --
> Peng Fan <[email protected]>
>
This looks good enough. I applied patches 1-5. If you could send a
follow-up with a comment clarification for patch 4/5, that would be
great.
Thanks,
Bart
Hi Shawn,
> Subject: [PATCH v5 0/7] gpio: update i.MX93/8ULP and support i.MX95
GPIO maintainers has picked up patch 1-5, would you pick patch 6,7?
Thanks,
Peng.
>
> From hardware perspective:
> - i.MX8ULP/93 GPIO supports two interrupts, 1st for Trustzone non-secure irq,
> 2nd for Trustzone secure irq.
> - i.MX8ULP/93 only has one register base
>
> The current linux gpio-vf610.c could work with i.MX8ULP/i.MX93, it is
> because some trick did in device tree node with offset added to base:
> reg = <0x2d010080 0x1000>, <0x2d010040 0x40>; But actually the register
> base should be 0x2d010000.
>
> So i.MX8ULP/93 is not HW compatible with i.MX7ULP.
>
> i.MX93 GPIO is directly derived from i.MX8ULP, so make i.MX93 compatible
> with i.MX8ULP. i.MX95 GPIO is same as i.MX93, so also compatible with
> i.MX8ULP
>
> There maybe dtbs_check failure if only test the 1st patch. After the patchset
> applied, no failure.
>
> To make avoid break old bindings from work, update the driver to support
> both old/new bindings.
>
> ---
> Changes in v5:
> - Add R-b for patch 1, 2
> - Simplify code a bit more in patch 4 pPer Marco's comments
> - Update patch 5 to only drop port->sdata check, since patch 4 is changed.
> - Link to v4: https://lore.kernel.org/r/20230926-vf610-gpio-v4-0-
> [email protected]
>
> Changes in v4:
> Change to minItems for allOf: else: interrupts Update commit log for patch
> 4/6 Follow Marco's comments for patch 4/6 Add a new patch 5/6 Per
> Marco's comments.
>
> Changes in v3:
> Update patch v2 2/6
> Update commit log in patch v2 5/6
> Add A-b from DT maintainer for patch v2 1/6, 3/6
> - Link to v2: https://lore.kernel.org/r/20230916-vf610-gpio-v2-0-
> [email protected]
>
> Changes in v2:
> - Update bindings with describe items, add one reg base for i.MX8ULP/93
> - Update driver to support one reg base, support both new/old bindings
> - Add a new patch 1 to update gpio-ranges found in dtbs_check
> - Link to v1: https://lore.kernel.org/r/20230914-vf610-gpio-v1-0-
> [email protected]
>
> ---
> Peng Fan (7):
> dt-bindings: gpio: vf610: update gpio-ranges
> dt-bindings: gpio: vf610: correct i.MX8ULP and i.MX93
> dt-bindings: gpio: vf610: add i.MX95 compatible
> gpio: vf610: add i.MX8ULP of_device_id entry
> gpio: vf610: simplify code by dropping data check
> arm64: dts: imx8ulp: update gpio node
> arm64: dts: imx93: update gpio node
>
> .../devicetree/bindings/gpio/gpio-vf610.yaml | 40 +++++++++++++---
> arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 +++++----
> arch/arm64/boot/dts/freescale/imx93.dtsi | 28 +++++++-----
> drivers/gpio/gpio-vf610.c | 53 ++++++++++++++++++----
> 4 files changed, 105 insertions(+), 37 deletions(-)
> ---
> base-commit: e143016b56ecb0fcda5bb6026b0a25fe55274f56
> change-id: 20230914-vf610-gpio-46edacd2b513
>
> Best regards,
> --
> Peng Fan <[email protected]>
On Sun, Oct 01, 2023 at 04:27:57PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> The i.MX8ULP GPIO supports two interrupts and one register base,
> the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
> gpio-vf610.c driver, it is based on the base address are splited
> into two with offset added in device tree node. Now following
> hardware design, using one register base in device tree node.
>
> This may break users who use compatible fsl,imx7ulp-gpio to enable
> i.MX8ULP GPIO.
>
> Signed-off-by: Peng Fan <[email protected]>
Applied, thanks!
On Sun, Oct 01, 2023 at 04:27:58PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Per binding doc, i.MX93 GPIO supports two interrupts and one register
> base, compatible with i.MX8ULP. The current fsl,imx7ulp-gpio compatible
> could work for i.MX93 in gpio-vf610.c driver, it is based on the base
> address are splited into two with offset added in device tree node.
>
> Now following hardware design, using one register base in device tree node.
>
> This may break users who use compatible fsl,imx7ulp-gpio to enable
> i.MX93 GPIO.
>
> Signed-off-by: Peng Fan <[email protected]>
Applied, thanks!